drivers/mtd/nand/omap-nand-flash.c

   1 /*
   2  * drivers/mtd/nand/omap-nand-flash.c
   3  *
   4  * Copyright (c) 2004 Texas Instruments, Jian Zhang <jzhang@ti.com>
   5  * Copyright (c) 2004 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/ioport.h>
  14 #include <linux/delay.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/types.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/nand.h>
  21 #include <linux/mtd/partitions.h>
  22
  23 #include <asm/io.h>
  24 #include <asm/hardware.h>
  25 #include <asm/mach-types.h>
  26 #include <asm/mach/flash.h>
  27 #include <asm/arch/tc.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/arch/hardware.h>
  31
  32 #define DRIVER_NAME     "omapnand"
  33
  34 #ifdef CONFIG_MTD_PARTITIONS
  35 static const char *part_probes[] = { "cmdlinepart", NULL };
  36 #endif
  37
  38 struct omap_nand_info {
  39         struct omap_nand_platform_data *pdata;
  40         struct mtd_partition    *parts;
  41         struct mtd_info         mtd;
  42         struct nand_chip        nand;
  43 };
  44
  45 /*
  46  *      hardware specific access to control-lines
  47  *      NOTE:  boards may use different bits for these!!
  48  *
  49  *      ctrl:
  50  *      NAND_NCE: bit 0 - don't care
  51  *      NAND_CLE: bit 1 -> bit 1  (0x0002)
  52  *      NAND_ALE: bit 2 -> bit 2  (0x0004)
  53  */
  54
  55 static void omap_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  56 {
  57         struct nand_chip *chip = mtd->priv;
  58         unsigned long mask;
  59
  60         if (cmd == NAND_CMD_NONE)
  61                 return;
  62
  63         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
  64         if (ctrl & NAND_ALE)
  65                 mask |= 0x04;
  66         writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
  67 }
  68
  69 static int omap_nand_dev_ready(struct mtd_info *mtd)
  70 {
  71         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd);
  72
  73         return info->pdata->dev_ready(info->pdata);
  74 }
  75
  76 static int __devinit omap_nand_probe(struct platform_device *pdev)
  77 {
  78         struct omap_nand_info           *info;
  79         struct omap_nand_platform_data  *pdata = pdev->dev.platform_data;
  80         struct resource                 *res = pdev->resource;
  81         unsigned long                   size = res->end - res->start + 1;
  82         int                             err;
  83
  84         info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
  85         if (!info)
  86                 return -ENOMEM;
  87
  88         if (!request_mem_region(res->start, size, pdev->dev.driver->name)) {
  89                 err = -EBUSY;
  90                 goto out_free_info;
  91         }
  92
  93         info->nand.IO_ADDR_R = ioremap(res->start, size);
  94         if (!info->nand.IO_ADDR_R) {
  95                 err = -ENOMEM;
  96                 goto out_release_mem_region;
  97         }
  98         info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
  99         info->nand.cmd_ctrl = omap_nand_hwcontrol;
 100         info->nand.ecc.mode = NAND_ECC_SOFT;
 101         info->nand.options = pdata->options;
 102         if (pdata->dev_ready)
 103                 info->nand.dev_ready = omap_nand_dev_ready;
 104         else
 105                 info->nand.chip_delay = 20;
 106
 107         info->mtd.name = pdev->dev.bus_id;
 108         info->mtd.priv = &info->nand;
 109
 110         info->pdata = pdata;
 111
 112         /* DIP switches on H2 and some other boards change between 8 and 16 bit
 113          * bus widths for flash.  Try the other width if the first try fails.
 114          */
 115         if (nand_scan(&info->mtd, 1)) {
 116                 info->nand.options ^= NAND_BUSWIDTH_16;
 117                 if (nand_scan(&info->mtd, 1)) {
 118                         err = -ENXIO;
 119                         goto out_iounmap;
 120                 }
 121         }
 122         info->mtd.owner = THIS_MODULE;
 123
 124 #ifdef CONFIG_MTD_PARTITIONS
 125         err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
 126         if (err > 0)
 127                 add_mtd_partitions(&info->mtd, info->parts, err);
 128         else if (err < 0 && pdata->parts)
 129                 add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts);
 130         else
 131 #endif
 132                 add_mtd_device(&info->mtd);
 133
 134         platform_set_drvdata(pdev, info);
 135
 136         return 0;
 137
 138 out_iounmap:
 139         iounmap(info->nand.IO_ADDR_R);
 140 out_release_mem_region:
 141         release_mem_region(res->start, size);
 142 out_free_info:
 143         kfree(info);
 144
 145         return err;
 146 }
 147
 148 static int omap_nand_remove(struct platform_device *pdev)
 149 {
 150         struct omap_nand_info *info = platform_get_drvdata(pdev);
 151
 152         platform_set_drvdata(pdev, NULL);
 153         /* Release NAND device, its internal structures and partitions */
 154         nand_release(&info->mtd);
 155         iounmap(info->nand.IO_ADDR_R);
 156         kfree(info);
 157         return 0;
 158 }
 159
 160 static struct platform_driver omap_nand_driver = {
 161         .probe          = omap_nand_probe,
 162         .remove         = omap_nand_remove,
 163         .driver         = {
 164                 .name   = DRIVER_NAME,
 165         },
 166 };
 167 MODULE_ALIAS(DRIVER_NAME);
 168
 169 static int __init omap_nand_init(void)
 170 {
 171         return platform_driver_register(&omap_nand_driver);
 172 }
 173
 174 static void __exit omap_nand_exit(void)
 175 {
 176         platform_driver_unregister(&omap_nand_driver);
 177 }
 178
 179 module_init(omap_nand_init);
 180 module_exit(omap_nand_exit);
 181
 182 MODULE_LICENSE("GPL");
 183 MODULE_AUTHOR("Jian Zhang <jzhang@ti.com> (and others)");
 184 MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");
 185