drivers/mtd/nand/omap-nand-flash.c

   1 /*
   2  * drivers/mtd/nand/omap-nand-flash.c
   3  *
   4  * Copyright (c) 2004 Texas Instruments, Jian Zhang <jzhang@ti.com>
   5  * Copyright (c) 2004 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/ioport.h>
  14 #include <linux/delay.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/types.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/nand.h>
  21 #include <linux/mtd/partitions.h>
  22
  23 #include <asm/io.h>
  24 #include <mach/hardware.h>
  25 #include <asm/mach-types.h>
  26 #include <asm/mach/flash.h>
  27 #include <mach/tc.h>
  28
  29 #include <asm/io.h>
  30 #include <mach/hardware.h>
  31 #include <mach/nand.h>
  32
  33 #define DRIVER_NAME     "omapnand"
  34
  35 #ifdef CONFIG_MTD_PARTITIONS
  36 static const char *part_probes[] = { "cmdlinepart", NULL };
  37 #endif
  38
  39 struct omap_nand_info {
  40         struct omap_nand_platform_data *pdata;
  41         struct mtd_partition    *parts;
  42         struct mtd_info         mtd;
  43         struct nand_chip        nand;
  44 };
  45
  46 /*
  47  *      hardware specific access to control-lines
  48  *      NOTE:  boards may use different bits for these!!
  49  *
  50  *      ctrl:
  51  *      NAND_NCE: bit 0 - don't care
  52  *      NAND_CLE: bit 1 -> bit 1  (0x0002)
  53  *      NAND_ALE: bit 2 -> bit 2  (0x0004)
  54  */
  55
  56 static void omap_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  57 {
  58         struct nand_chip *chip = mtd->priv;
  59         unsigned long mask;
  60
  61         if (cmd == NAND_CMD_NONE)
  62                 return;
  63
  64         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
  65         if (ctrl & NAND_ALE)
  66                 mask |= 0x04;
  67         writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
  68 }
  69
  70 static int omap_nand_dev_ready(struct mtd_info *mtd)
  71 {
  72         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd);
  73
  74         return info->pdata->dev_ready(info->pdata);
  75 }
  76
  77 static int __devinit omap_nand_probe(struct platform_device *pdev)
  78 {
  79         struct omap_nand_info           *info;
  80         struct omap_nand_platform_data  *pdata = pdev->dev.platform_data;
  81         struct resource                 *res = pdev->resource;
  82         unsigned long                   size = res->end - res->start + 1;
  83         int                             err;
  84
  85         info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
  86         if (!info)
  87                 return -ENOMEM;
  88
  89         if (!request_mem_region(res->start, size, pdev->dev.driver->name)) {
  90                 err = -EBUSY;
  91                 goto out_free_info;
  92         }
  93
  94         info->nand.IO_ADDR_R = ioremap(res->start, size);
  95         if (!info->nand.IO_ADDR_R) {
  96                 err = -ENOMEM;
  97                 goto out_release_mem_region;
  98         }
  99         info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
 100         info->nand.cmd_ctrl = omap_nand_hwcontrol;
 101         info->nand.ecc.mode = NAND_ECC_SOFT;
 102         info->nand.options = pdata->options;
 103         if (pdata->dev_ready)
 104                 info->nand.dev_ready = omap_nand_dev_ready;
 105         else
 106                 info->nand.chip_delay = 20;
 107
 108         info->mtd.name = pdev->dev.bus_id;
 109         info->mtd.priv = &info->nand;
 110
 111         info->pdata = pdata;
 112
 113         /* DIP switches on H2 and some other boards change between 8 and 16 bit
 114          * bus widths for flash.  Try the other width if the first try fails.
 115          */
 116         if (nand_scan(&info->mtd, 1)) {
 117                 info->nand.options ^= NAND_BUSWIDTH_16;
 118                 if (nand_scan(&info->mtd, 1)) {
 119                         err = -ENXIO;
 120                         goto out_iounmap;
 121                 }
 122         }
 123         info->mtd.owner = THIS_MODULE;
 124
 125 #ifdef CONFIG_MTD_PARTITIONS
 126         err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
 127         if (err > 0)
 128                 add_mtd_partitions(&info->mtd, info->parts, err);
 129         else if (err < 0 && pdata->parts)
 130                 add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts);
 131         else
 132 #endif
 133                 add_mtd_device(&info->mtd);
 134
 135         platform_set_drvdata(pdev, info);
 136
 137         return 0;
 138
 139 out_iounmap:
 140         iounmap(info->nand.IO_ADDR_R);
 141 out_release_mem_region:
 142         release_mem_region(res->start, size);
 143 out_free_info:
 144         kfree(info);
 145
 146         return err;
 147 }
 148
 149 static int omap_nand_remove(struct platform_device *pdev)
 150 {
 151         struct omap_nand_info *info = platform_get_drvdata(pdev);
 152
 153         platform_set_drvdata(pdev, NULL);
 154         /* Release NAND device, its internal structures and partitions */
 155         nand_release(&info->mtd);
 156         iounmap(info->nand.IO_ADDR_R);
 157         kfree(info);
 158         return 0;
 159 }
 160
 161 static struct platform_driver omap_nand_driver = {
 162         .probe          = omap_nand_probe,
 163         .remove         = omap_nand_remove,
 164         .driver         = {
 165                 .name   = DRIVER_NAME,
 166         },
 167 };
 168 MODULE_ALIAS(DRIVER_NAME);
 169
 170 static int __init omap_nand_init(void)
 171 {
 172         return platform_driver_register(&omap_nand_driver);
 173 }
 174
 175 static void __exit omap_nand_exit(void)
 176 {
 177         platform_driver_unregister(&omap_nand_driver);
 178 }
 179
 180 module_init(omap_nand_init);
 181 module_exit(omap_nand_exit);
 182
 183 MODULE_LICENSE("GPL");
 184 MODULE_AUTHOR("Jian Zhang <jzhang@ti.com> (and others)");
 185 MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");
 186