drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  */
  25
  26 #include <linux/init.h>
  27 #include <linux/types.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/vmalloc.h>
  31 #include <asm/div64.h>
  32 #include <linux/slab.h>
  33 #include <linux/errno.h>
  34 #include <linux/string.h>
  35 #include <linux/mtd/mtd.h>
  36 #include <linux/mtd/nand.h>
  37 #include <linux/mtd/partitions.h>
  38 #include <linux/delay.h>
  39 #include <linux/list.h>
  40 #include <linux/random.h>
  41
  42 /* Default simulator parameters values */
  43 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  44     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  45     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  46     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  47 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  48 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  49 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  50 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  51 #endif
  52
  53 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  54 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  55 #endif
  56 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  57 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  58 #endif
  59 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  60 #define CONFIG_NANDSIM_ERASE_DELAY 2
  61 #endif
  62 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  63 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  64 #endif
  65 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  66 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  67 #endif
  68 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  69 #define CONFIG_NANDSIM_BUS_WIDTH  8
  70 #endif
  71 #ifndef CONFIG_NANDSIM_DO_DELAYS
  72 #define CONFIG_NANDSIM_DO_DELAYS  0
  73 #endif
  74 #ifndef CONFIG_NANDSIM_LOG
  75 #define CONFIG_NANDSIM_LOG        0
  76 #endif
  77 #ifndef CONFIG_NANDSIM_DBG
  78 #define CONFIG_NANDSIM_DBG        0
  79 #endif
  80
  81 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
  82 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
  83 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
  84 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
  85 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  86 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  87 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  88 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  89 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  90 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  91 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  92 static uint log            = CONFIG_NANDSIM_LOG;
  93 static uint dbg            = CONFIG_NANDSIM_DBG;
  94 static unsigned long parts[MAX_MTD_DEVICES];
  95 static unsigned int parts_num;
  96 static char *badblocks = NULL;
  97 static char *weakblocks = NULL;
  98 static char *weakpages = NULL;
  99 static unsigned int bitflips = 0;
 100 static char *gravepages = NULL;
 101 static unsigned int rptwear = 0;
 102 static unsigned int overridesize = 0;
 103
 104 module_param(first_id_byte,  uint, 0400);
 105 module_param(second_id_byte, uint, 0400);
 106 module_param(third_id_byte,  uint, 0400);
 107 module_param(fourth_id_byte, uint, 0400);
 108 module_param(access_delay,   uint, 0400);
 109 module_param(programm_delay, uint, 0400);
 110 module_param(erase_delay,    uint, 0400);
 111 module_param(output_cycle,   uint, 0400);
 112 module_param(input_cycle,    uint, 0400);
 113 module_param(bus_width,      uint, 0400);
 114 module_param(do_delays,      uint, 0400);
 115 module_param(log,            uint, 0400);
 116 module_param(dbg,            uint, 0400);
 117 module_param_array(parts, ulong, &parts_num, 0400);
 118 module_param(badblocks,      charp, 0400);
 119 module_param(weakblocks,     charp, 0400);
 120 module_param(weakpages,      charp, 0400);
 121 module_param(bitflips,       uint, 0400);
 122 module_param(gravepages,     charp, 0400);
 123 module_param(rptwear,        uint, 0400);
 124 module_param(overridesize,   uint, 0400);
 125
 126 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
 127 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
 128 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
 129 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
 130 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microiseconds)");
 131 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 132 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 133 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanodeconds)");
 134 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanodeconds)");
 135 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 136 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 137 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 138 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 139 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 140 /* Page and erase block positions for the following parameters are independent of any partitions */
 141 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 142 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 143                                  " separated by commas e.g. 113:2 means eb 113"
 144                                  " can be erased only twice before failing");
 145 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 146                                  " separated by commas e.g. 1401:2 means page 1401"
 147                                  " can be written only twice before failing");
 148 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 149 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 150                                  " separated by commas e.g. 1401:2 means page 1401"
 151                                  " can be read only twice before failing");
 152 MODULE_PARM_DESC(rptwear,        "Number of erases inbetween reporting wear, if not zero");
 153 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
 154                                  "The size is specified in erase blocks and as the exponent of a power of two"
 155                                  " e.g. 5 means a size of 32 erase blocks");
 156
 157 /* The largest possible page size */
 158 #define NS_LARGEST_PAGE_SIZE    2048
 159
 160 /* The prefix for simulator output */
 161 #define NS_OUTPUT_PREFIX "[nandsim]"
 162
 163 /* Simulator's output macros (logging, debugging, warning, error) */
 164 #define NS_LOG(args...) \
 165         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 166 #define NS_DBG(args...) \
 167         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 168 #define NS_WARN(args...) \
 169         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 170 #define NS_ERR(args...) \
 171         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 172 #define NS_INFO(args...) \
 173         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
 174
 175 /* Busy-wait delay macros (microseconds, milliseconds) */
 176 #define NS_UDELAY(us) \
 177         do { if (do_delays) udelay(us); } while(0)
 178 #define NS_MDELAY(us) \
 179         do { if (do_delays) mdelay(us); } while(0)
 180
 181 /* Is the nandsim structure initialized ? */
 182 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 183
 184 /* Good operation completion status */
 185 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 186
 187 /* Operation failed completion status */
 188 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 189
 190 /* Calculate the page offset in flash RAM image by (row, column) address */
 191 #define NS_RAW_OFFSET(ns) \
 192         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
 193
 194 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 195 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 196
 197 /* After a command is input, the simulator goes to one of the following states */
 198 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 199 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 200 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 201 #define STATE_CMD_PAGEPROG     0x00000004 /* start page programm */
 202 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 203 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 204 #define STATE_CMD_STATUS       0x00000007 /* read status */
 205 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
 206 #define STATE_CMD_SEQIN        0x00000009 /* sequential data imput */
 207 #define STATE_CMD_READID       0x0000000A /* read ID */
 208 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 209 #define STATE_CMD_RESET        0x0000000C /* reset */
 210 #define STATE_CMD_RNDOUT       0x0000000D /* random output command */
 211 #define STATE_CMD_RNDOUTSTART  0x0000000E /* random output start command */
 212 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 213
 214 /* After an address is input, the simulator goes to one of these states */
 215 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 216 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 217 #define STATE_ADDR_COLUMN      0x00000030 /* column address was accepted */
 218 #define STATE_ADDR_ZERO        0x00000040 /* one byte zero address was accepted */
 219 #define STATE_ADDR_MASK        0x00000070 /* address states mask */
 220
 221 /* Durind data input/output the simulator is in these states */
 222 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 223 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 224
 225 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 226 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 227 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 228 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
 229 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 230
 231 /* Previous operation is done, ready to accept new requests */
 232 #define STATE_READY            0x00000000
 233
 234 /* This state is used to mark that the next state isn't known yet */
 235 #define STATE_UNKNOWN          0x10000000
 236
 237 /* Simulator's actions bit masks */
 238 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 239 #define ACTION_PRGPAGE   0x00200000 /* programm the internal buffer to flash */
 240 #define ACTION_SECERASE  0x00300000 /* erase sector */
 241 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 242 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 243 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 244 #define ACTION_MASK      0x00700000 /* action mask */
 245
 246 #define NS_OPER_NUM      13 /* Number of operations supported by the simulator */
 247 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 248
 249 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 250 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
 251 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 252 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 253 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 254 #define OPT_AUTOINCR     0x00000020 /* page number auto inctimentation is possible */
 255 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 256 #define OPT_LARGEPAGE    (OPT_PAGE2048) /* 2048-byte page chips */
 257 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 258
 259 /* Remove action bits ftom state */
 260 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 261
 262 /*
 263  * Maximum previous states which need to be saved. Currently saving is
 264  * only needed for page programm operation with preceeded read command
 265  * (which is only valid for 512-byte pages).
 266  */
 267 #define NS_MAX_PREVSTATES 1
 268
 269 /*
 270  * A union to represent flash memory contents and flash buffer.
 271  */
 272 union ns_mem {
 273         u_char *byte;    /* for byte access */
 274         uint16_t *word;  /* for 16-bit word access */
 275 };
 276
 277 /*
 278  * The structure which describes all the internal simulator data.
 279  */
 280 struct nandsim {
 281         struct mtd_partition partitions[MAX_MTD_DEVICES];
 282         unsigned int nbparts;
 283
 284         uint busw;              /* flash chip bus width (8 or 16) */
 285         u_char ids[4];          /* chip's ID bytes */
 286         uint32_t options;       /* chip's characteristic bits */
 287         uint32_t state;         /* current chip state */
 288         uint32_t nxstate;       /* next expected state */
 289
 290         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 291         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 292         uint16_t npstates;      /* number of previous states saved */
 293         uint16_t stateidx;      /* current state index */
 294
 295         /* The simulated NAND flash pages array */
 296         union ns_mem *pages;
 297
 298         /* Internal buffer of page + OOB size bytes */
 299         union ns_mem buf;
 300
 301         /* NAND flash "geometry" */
 302         struct nandsin_geometry {
 303                 uint64_t totsz;     /* total flash size, bytes */
 304                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 305                 uint pgsz;          /* NAND flash page size, bytes */
 306                 uint oobsz;         /* page OOB area size, bytes */
 307                 uint64_t totszoob;  /* total flash size including OOB, bytes */
 308                 uint pgszoob;       /* page size including OOB , bytes*/
 309                 uint secszoob;      /* sector size including OOB, bytes */
 310                 uint pgnum;         /* total number of pages */
 311                 uint pgsec;         /* number of pages per sector */
 312                 uint secshift;      /* bits number in sector size */
 313                 uint pgshift;       /* bits number in page size */
 314                 uint oobshift;      /* bits number in OOB size */
 315                 uint pgaddrbytes;   /* bytes per page address */
 316                 uint secaddrbytes;  /* bytes per sector address */
 317                 uint idbytes;       /* the number ID bytes that this chip outputs */
 318         } geom;
 319
 320         /* NAND flash internal registers */
 321         struct nandsim_regs {
 322                 unsigned command; /* the command register */
 323                 u_char   status;  /* the status register */
 324                 uint     row;     /* the page number */
 325                 uint     column;  /* the offset within page */
 326                 uint     count;   /* internal counter */
 327                 uint     num;     /* number of bytes which must be processed */
 328                 uint     off;     /* fixed page offset */
 329         } regs;
 330
 331         /* NAND flash lines state */
 332         struct ns_lines_status {
 333                 int ce;  /* chip Enable */
 334                 int cle; /* command Latch Enable */
 335                 int ale; /* address Latch Enable */
 336                 int wp;  /* write Protect */
 337         } lines;
 338 };
 339
 340 /*
 341  * Operations array. To perform any operation the simulator must pass
 342  * through the correspondent states chain.
 343  */
 344 static struct nandsim_operations {
 345         uint32_t reqopts;  /* options which are required to perform the operation */
 346         uint32_t states[NS_OPER_STATES]; /* operation's states */
 347 } ops[NS_OPER_NUM] = {
 348         /* Read page + OOB from the beginning */
 349         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 350                         STATE_DATAOUT, STATE_READY}},
 351         /* Read page + OOB from the second half */
 352         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 353                         STATE_DATAOUT, STATE_READY}},
 354         /* Read OOB */
 355         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 356                         STATE_DATAOUT, STATE_READY}},
 357         /* Programm page starting from the beginning */
 358         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 359                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 360         /* Programm page starting from the beginning */
 361         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 362                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 363         /* Programm page starting from the second half */
 364         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 365                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 366         /* Programm OOB */
 367         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 368                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 369         /* Erase sector */
 370         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 371         /* Read status */
 372         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 373         /* Read multi-plane status */
 374         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
 375         /* Read ID */
 376         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 377         /* Large page devices read page */
 378         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 379                                STATE_DATAOUT, STATE_READY}},
 380         /* Large page devices random page read */
 381         {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
 382                                STATE_DATAOUT, STATE_READY}},
 383 };
 384
 385 struct weak_block {
 386         struct list_head list;
 387         unsigned int erase_block_no;
 388         unsigned int max_erases;
 389         unsigned int erases_done;
 390 };
 391
 392 static LIST_HEAD(weak_blocks);
 393
 394 struct weak_page {
 395         struct list_head list;
 396         unsigned int page_no;
 397         unsigned int max_writes;
 398         unsigned int writes_done;
 399 };
 400
 401 static LIST_HEAD(weak_pages);
 402
 403 struct grave_page {
 404         struct list_head list;
 405         unsigned int page_no;
 406         unsigned int max_reads;
 407         unsigned int reads_done;
 408 };
 409
 410 static LIST_HEAD(grave_pages);
 411
 412 static unsigned long *erase_block_wear = NULL;
 413 static unsigned int wear_eb_count = 0;
 414 static unsigned long total_wear = 0;
 415 static unsigned int rptwear_cnt = 0;
 416
 417 /* MTD structure for NAND controller */
 418 static struct mtd_info *nsmtd;
 419
 420 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
 421
 422 /*
 423  * Allocate array of page pointers and initialize the array to NULL
 424  * pointers.
 425  *
 426  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 427  */
 428 static int alloc_device(struct nandsim *ns)
 429 {
 430         int i;
 431
 432         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 433         if (!ns->pages) {
 434                 NS_ERR("alloc_map: unable to allocate page array\n");
 435                 return -ENOMEM;
 436         }
 437         for (i = 0; i < ns->geom.pgnum; i++) {
 438                 ns->pages[i].byte = NULL;
 439         }
 440
 441         return 0;
 442 }
 443
 444 /*
 445  * Free any allocated pages, and free the array of page pointers.
 446  */
 447 static void free_device(struct nandsim *ns)
 448 {
 449         int i;
 450
 451         if (ns->pages) {
 452                 for (i = 0; i < ns->geom.pgnum; i++) {
 453                         if (ns->pages[i].byte)
 454                                 kfree(ns->pages[i].byte);
 455                 }
 456                 vfree(ns->pages);
 457         }
 458 }
 459
 460 static char *get_partition_name(int i)
 461 {
 462         char buf[64];
 463         sprintf(buf, "NAND simulator partition %d", i);
 464         return kstrdup(buf, GFP_KERNEL);
 465 }
 466
 467 static u_int64_t divide(u_int64_t n, u_int32_t d)
 468 {
 469         do_div(n, d);
 470         return n;
 471 }
 472
 473 /*
 474  * Initialize the nandsim structure.
 475  *
 476  * RETURNS: 0 if success, -ERRNO if failure.
 477  */
 478 static int init_nandsim(struct mtd_info *mtd)
 479 {
 480         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
 481         struct nandsim   *ns   = (struct nandsim *)(chip->priv);
 482         int i, ret = 0;
 483         u_int64_t remains;
 484         u_int64_t next_offset;
 485
 486         if (NS_IS_INITIALIZED(ns)) {
 487                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 488                 return -EIO;
 489         }
 490
 491         /* Force mtd to not do delays */
 492         chip->chip_delay = 0;
 493
 494         /* Initialize the NAND flash parameters */
 495         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 496         ns->geom.totsz    = mtd->size;
 497         ns->geom.pgsz     = mtd->writesize;
 498         ns->geom.oobsz    = mtd->oobsize;
 499         ns->geom.secsz    = mtd->erasesize;
 500         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 501         ns->geom.pgnum    = divide(ns->geom.totsz, ns->geom.pgsz);
 502         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
 503         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 504         ns->geom.pgshift  = chip->page_shift;
 505         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
 506         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 507         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 508         ns->options = 0;
 509
 510         if (ns->geom.pgsz == 256) {
 511                 ns->options |= OPT_PAGE256;
 512         }
 513         else if (ns->geom.pgsz == 512) {
 514                 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
 515                 if (ns->busw == 8)
 516                         ns->options |= OPT_PAGE512_8BIT;
 517         } else if (ns->geom.pgsz == 2048) {
 518                 ns->options |= OPT_PAGE2048;
 519         } else {
 520                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 521                 return -EIO;
 522         }
 523
 524         if (ns->options & OPT_SMALLPAGE) {
 525                 if (ns->geom.totsz <= (32 << 20)) {
 526                         ns->geom.pgaddrbytes  = 3;
 527                         ns->geom.secaddrbytes = 2;
 528                 } else {
 529                         ns->geom.pgaddrbytes  = 4;
 530                         ns->geom.secaddrbytes = 3;
 531                 }
 532         } else {
 533                 if (ns->geom.totsz <= (128 << 20)) {
 534                         ns->geom.pgaddrbytes  = 4;
 535                         ns->geom.secaddrbytes = 2;
 536                 } else {
 537                         ns->geom.pgaddrbytes  = 5;
 538                         ns->geom.secaddrbytes = 3;
 539                 }
 540         }
 541
 542         /* Fill the partition_info structure */
 543         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 544                 NS_ERR("too many partitions.\n");
 545                 ret = -EINVAL;
 546                 goto error;
 547         }
 548         remains = ns->geom.totsz;
 549         next_offset = 0;
 550         for (i = 0; i < parts_num; ++i) {
 551                 u_int64_t part_sz = (u_int64_t)parts[i] * ns->geom.secsz;
 552
 553                 if (!part_sz || part_sz > remains) {
 554                         NS_ERR("bad partition size.\n");
 555                         ret = -EINVAL;
 556                         goto error;
 557                 }
 558                 ns->partitions[i].name   = get_partition_name(i);
 559                 ns->partitions[i].offset = next_offset;
 560                 ns->partitions[i].size   = part_sz;
 561                 next_offset += ns->partitions[i].size;
 562                 remains -= ns->partitions[i].size;
 563         }
 564         ns->nbparts = parts_num;
 565         if (remains) {
 566                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 567                         NS_ERR("too many partitions.\n");
 568                         ret = -EINVAL;
 569                         goto error;
 570                 }
 571                 ns->partitions[i].name   = get_partition_name(i);
 572                 ns->partitions[i].offset = next_offset;
 573                 ns->partitions[i].size   = remains;
 574                 ns->nbparts += 1;
 575         }
 576
 577         /* Detect how many ID bytes the NAND chip outputs */
 578         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 579                 if (second_id_byte != nand_flash_ids[i].id)
 580                         continue;
 581                 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
 582                         ns->options |= OPT_AUTOINCR;
 583         }
 584
 585         if (ns->busw == 16)
 586                 NS_WARN("16-bit flashes support wasn't tested\n");
 587
 588         printk("flash size: %llu MiB\n",
 589                         (unsigned long long)ns->geom.totsz >> 20);
 590         printk("page size: %u bytes\n",         ns->geom.pgsz);
 591         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 592         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 593         printk("pages number: %u\n",            ns->geom.pgnum);
 594         printk("pages per sector: %u\n",        ns->geom.pgsec);
 595         printk("bus width: %u\n",               ns->busw);
 596         printk("bits in sector size: %u\n",     ns->geom.secshift);
 597         printk("bits in page size: %u\n",       ns->geom.pgshift);
 598         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
 599         printk("flash size with OOB: %llu KiB\n",
 600                         (unsigned long long)ns->geom.totszoob >> 10);
 601         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 602         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 603         printk("options: %#x\n",                ns->options);
 604
 605         if ((ret = alloc_device(ns)) != 0)
 606                 goto error;
 607
 608         /* Allocate / initialize the internal buffer */
 609         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 610         if (!ns->buf.byte) {
 611                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 612                         ns->geom.pgszoob);
 613                 ret = -ENOMEM;
 614                 goto error;
 615         }
 616         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 617
 618         return 0;
 619
 620 error:
 621         free_device(ns);
 622
 623         return ret;
 624 }
 625
 626 /*
 627  * Free the nandsim structure.
 628  */
 629 static void free_nandsim(struct nandsim *ns)
 630 {
 631         kfree(ns->buf.byte);
 632         free_device(ns);
 633
 634         return;
 635 }
 636
 637 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 638 {
 639         char *w;
 640         int zero_ok;
 641         unsigned int erase_block_no;
 642         loff_t offset;
 643
 644         if (!badblocks)
 645                 return 0;
 646         w = badblocks;
 647         do {
 648                 zero_ok = (*w == '0' ? 1 : 0);
 649                 erase_block_no = simple_strtoul(w, &w, 0);
 650                 if (!zero_ok && !erase_block_no) {
 651                         NS_ERR("invalid badblocks.\n");
 652                         return -EINVAL;
 653                 }
 654                 offset = erase_block_no * ns->geom.secsz;
 655                 if (mtd->block_markbad(mtd, offset)) {
 656                         NS_ERR("invalid badblocks.\n");
 657                         return -EINVAL;
 658                 }
 659                 if (*w == ',')
 660                         w += 1;
 661         } while (*w);
 662         return 0;
 663 }
 664
 665 static int parse_weakblocks(void)
 666 {
 667         char *w;
 668         int zero_ok;
 669         unsigned int erase_block_no;
 670         unsigned int max_erases;
 671         struct weak_block *wb;
 672
 673         if (!weakblocks)
 674                 return 0;
 675         w = weakblocks;
 676         do {
 677                 zero_ok = (*w == '0' ? 1 : 0);
 678                 erase_block_no = simple_strtoul(w, &w, 0);
 679                 if (!zero_ok && !erase_block_no) {
 680                         NS_ERR("invalid weakblocks.\n");
 681                         return -EINVAL;
 682                 }
 683                 max_erases = 3;
 684                 if (*w == ':') {
 685                         w += 1;
 686                         max_erases = simple_strtoul(w, &w, 0);
 687                 }
 688                 if (*w == ',')
 689                         w += 1;
 690                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 691                 if (!wb) {
 692                         NS_ERR("unable to allocate memory.\n");
 693                         return -ENOMEM;
 694                 }
 695                 wb->erase_block_no = erase_block_no;
 696                 wb->max_erases = max_erases;
 697                 list_add(&wb->list, &weak_blocks);
 698         } while (*w);
 699         return 0;
 700 }
 701
 702 static int erase_error(unsigned int erase_block_no)
 703 {
 704         struct weak_block *wb;
 705
 706         list_for_each_entry(wb, &weak_blocks, list)
 707                 if (wb->erase_block_no == erase_block_no) {
 708                         if (wb->erases_done >= wb->max_erases)
 709                                 return 1;
 710                         wb->erases_done += 1;
 711                         return 0;
 712                 }
 713         return 0;
 714 }
 715
 716 static int parse_weakpages(void)
 717 {
 718         char *w;
 719         int zero_ok;
 720         unsigned int page_no;
 721         unsigned int max_writes;
 722         struct weak_page *wp;
 723
 724         if (!weakpages)
 725                 return 0;
 726         w = weakpages;
 727         do {
 728                 zero_ok = (*w == '0' ? 1 : 0);
 729                 page_no = simple_strtoul(w, &w, 0);
 730                 if (!zero_ok && !page_no) {
 731                         NS_ERR("invalid weakpagess.\n");
 732                         return -EINVAL;
 733                 }
 734                 max_writes = 3;
 735                 if (*w == ':') {
 736                         w += 1;
 737                         max_writes = simple_strtoul(w, &w, 0);
 738                 }
 739                 if (*w == ',')
 740                         w += 1;
 741                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 742                 if (!wp) {
 743                         NS_ERR("unable to allocate memory.\n");
 744                         return -ENOMEM;
 745                 }
 746                 wp->page_no = page_no;
 747                 wp->max_writes = max_writes;
 748                 list_add(&wp->list, &weak_pages);
 749         } while (*w);
 750         return 0;
 751 }
 752
 753 static int write_error(unsigned int page_no)
 754 {
 755         struct weak_page *wp;
 756
 757         list_for_each_entry(wp, &weak_pages, list)
 758                 if (wp->page_no == page_no) {
 759                         if (wp->writes_done >= wp->max_writes)
 760                                 return 1;
 761                         wp->writes_done += 1;
 762                         return 0;
 763                 }
 764         return 0;
 765 }
 766
 767 static int parse_gravepages(void)
 768 {
 769         char *g;
 770         int zero_ok;
 771         unsigned int page_no;
 772         unsigned int max_reads;
 773         struct grave_page *gp;
 774
 775         if (!gravepages)
 776                 return 0;
 777         g = gravepages;
 778         do {
 779                 zero_ok = (*g == '0' ? 1 : 0);
 780                 page_no = simple_strtoul(g, &g, 0);
 781                 if (!zero_ok && !page_no) {
 782                         NS_ERR("invalid gravepagess.\n");
 783                         return -EINVAL;
 784                 }
 785                 max_reads = 3;
 786                 if (*g == ':') {
 787                         g += 1;
 788                         max_reads = simple_strtoul(g, &g, 0);
 789                 }
 790                 if (*g == ',')
 791                         g += 1;
 792                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 793                 if (!gp) {
 794                         NS_ERR("unable to allocate memory.\n");
 795                         return -ENOMEM;
 796                 }
 797                 gp->page_no = page_no;
 798                 gp->max_reads = max_reads;
 799                 list_add(&gp->list, &grave_pages);
 800         } while (*g);
 801         return 0;
 802 }
 803
 804 static int read_error(unsigned int page_no)
 805 {
 806         struct grave_page *gp;
 807
 808         list_for_each_entry(gp, &grave_pages, list)
 809                 if (gp->page_no == page_no) {
 810                         if (gp->reads_done >= gp->max_reads)
 811                                 return 1;
 812                         gp->reads_done += 1;
 813                         return 0;
 814                 }
 815         return 0;
 816 }
 817
 818 static void free_lists(void)
 819 {
 820         struct list_head *pos, *n;
 821         list_for_each_safe(pos, n, &weak_blocks) {
 822                 list_del(pos);
 823                 kfree(list_entry(pos, struct weak_block, list));
 824         }
 825         list_for_each_safe(pos, n, &weak_pages) {
 826                 list_del(pos);
 827                 kfree(list_entry(pos, struct weak_page, list));
 828         }
 829         list_for_each_safe(pos, n, &grave_pages) {
 830                 list_del(pos);
 831                 kfree(list_entry(pos, struct grave_page, list));
 832         }
 833         kfree(erase_block_wear);
 834 }
 835
 836 static int setup_wear_reporting(struct mtd_info *mtd)
 837 {
 838         size_t mem;
 839
 840         if (!rptwear)
 841                 return 0;
 842         wear_eb_count = divide(mtd->size, mtd->erasesize);
 843         mem = wear_eb_count * sizeof(unsigned long);
 844         if (mem / sizeof(unsigned long) != wear_eb_count) {
 845                 NS_ERR("Too many erase blocks for wear reporting\n");
 846                 return -ENOMEM;
 847         }
 848         erase_block_wear = kzalloc(mem, GFP_KERNEL);
 849         if (!erase_block_wear) {
 850                 NS_ERR("Too many erase blocks for wear reporting\n");
 851                 return -ENOMEM;
 852         }
 853         return 0;
 854 }
 855
 856 static void update_wear(unsigned int erase_block_no)
 857 {
 858         unsigned long wmin = -1, wmax = 0, avg;
 859         unsigned long deciles[10], decile_max[10], tot = 0;
 860         unsigned int i;
 861
 862         if (!erase_block_wear)
 863                 return;
 864         total_wear += 1;
 865         if (total_wear == 0)
 866                 NS_ERR("Erase counter total overflow\n");
 867         erase_block_wear[erase_block_no] += 1;
 868         if (erase_block_wear[erase_block_no] == 0)
 869                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
 870         rptwear_cnt += 1;
 871         if (rptwear_cnt < rptwear)
 872                 return;
 873         rptwear_cnt = 0;
 874         /* Calc wear stats */
 875         for (i = 0; i < wear_eb_count; ++i) {
 876                 unsigned long wear = erase_block_wear[i];
 877                 if (wear < wmin)
 878                         wmin = wear;
 879                 if (wear > wmax)
 880                         wmax = wear;
 881                 tot += wear;
 882         }
 883         for (i = 0; i < 9; ++i) {
 884                 deciles[i] = 0;
 885                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
 886         }
 887         deciles[9] = 0;
 888         decile_max[9] = wmax;
 889         for (i = 0; i < wear_eb_count; ++i) {
 890                 int d;
 891                 unsigned long wear = erase_block_wear[i];
 892                 for (d = 0; d < 10; ++d)
 893                         if (wear <= decile_max[d]) {
 894                                 deciles[d] += 1;
 895                                 break;
 896                         }
 897         }
 898         avg = tot / wear_eb_count;
 899         /* Output wear report */
 900         NS_INFO("*** Wear Report ***\n");
 901         NS_INFO("Total numbers of erases:  %lu\n", tot);
 902         NS_INFO("Number of erase blocks:   %u\n", wear_eb_count);
 903         NS_INFO("Average number of erases: %lu\n", avg);
 904         NS_INFO("Maximum number of erases: %lu\n", wmax);
 905         NS_INFO("Minimum number of erases: %lu\n", wmin);
 906         for (i = 0; i < 10; ++i) {
 907                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
 908                 if (from > decile_max[i])
 909                         continue;
 910                 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
 911                         from,
 912                         decile_max[i],
 913                         deciles[i]);
 914         }
 915         NS_INFO("*** End of Wear Report ***\n");
 916 }
 917
 918 /*
 919  * Returns the string representation of 'state' state.
 920  */
 921 static char *get_state_name(uint32_t state)
 922 {
 923         switch (NS_STATE(state)) {
 924                 case STATE_CMD_READ0:
 925                         return "STATE_CMD_READ0";
 926                 case STATE_CMD_READ1:
 927                         return "STATE_CMD_READ1";
 928                 case STATE_CMD_PAGEPROG:
 929                         return "STATE_CMD_PAGEPROG";
 930                 case STATE_CMD_READOOB:
 931                         return "STATE_CMD_READOOB";
 932                 case STATE_CMD_READSTART:
 933                         return "STATE_CMD_READSTART";
 934                 case STATE_CMD_ERASE1:
 935                         return "STATE_CMD_ERASE1";
 936                 case STATE_CMD_STATUS:
 937                         return "STATE_CMD_STATUS";
 938                 case STATE_CMD_STATUS_M:
 939                         return "STATE_CMD_STATUS_M";
 940                 case STATE_CMD_SEQIN:
 941                         return "STATE_CMD_SEQIN";
 942                 case STATE_CMD_READID:
 943                         return "STATE_CMD_READID";
 944                 case STATE_CMD_ERASE2:
 945                         return "STATE_CMD_ERASE2";
 946                 case STATE_CMD_RESET:
 947                         return "STATE_CMD_RESET";
 948                 case STATE_CMD_RNDOUT:
 949                         return "STATE_CMD_RNDOUT";
 950                 case STATE_CMD_RNDOUTSTART:
 951                         return "STATE_CMD_RNDOUTSTART";
 952                 case STATE_ADDR_PAGE:
 953                         return "STATE_ADDR_PAGE";
 954                 case STATE_ADDR_SEC:
 955                         return "STATE_ADDR_SEC";
 956                 case STATE_ADDR_ZERO:
 957                         return "STATE_ADDR_ZERO";
 958                 case STATE_ADDR_COLUMN:
 959                         return "STATE_ADDR_COLUMN";
 960                 case STATE_DATAIN:
 961                         return "STATE_DATAIN";
 962                 case STATE_DATAOUT:
 963                         return "STATE_DATAOUT";
 964                 case STATE_DATAOUT_ID:
 965                         return "STATE_DATAOUT_ID";
 966                 case STATE_DATAOUT_STATUS:
 967                         return "STATE_DATAOUT_STATUS";
 968                 case STATE_DATAOUT_STATUS_M:
 969                         return "STATE_DATAOUT_STATUS_M";
 970                 case STATE_READY:
 971                         return "STATE_READY";
 972                 case STATE_UNKNOWN:
 973                         return "STATE_UNKNOWN";
 974         }
 975
 976         NS_ERR("get_state_name: unknown state, BUG\n");
 977         return NULL;
 978 }
 979
 980 /*
 981  * Check if command is valid.
 982  *
 983  * RETURNS: 1 if wrong command, 0 if right.
 984  */
 985 static int check_command(int cmd)
 986 {
 987         switch (cmd) {
 988
 989         case NAND_CMD_READ0:
 990         case NAND_CMD_READ1:
 991         case NAND_CMD_READSTART:
 992         case NAND_CMD_PAGEPROG:
 993         case NAND_CMD_READOOB:
 994         case NAND_CMD_ERASE1:
 995         case NAND_CMD_STATUS:
 996         case NAND_CMD_SEQIN:
 997         case NAND_CMD_READID:
 998         case NAND_CMD_ERASE2:
 999         case NAND_CMD_RESET:
1000         case NAND_CMD_RNDOUT:
1001         case NAND_CMD_RNDOUTSTART:
1002                 return 0;
1003
1004         case NAND_CMD_STATUS_MULTI:
1005         default:
1006                 return 1;
1007         }
1008 }
1009
1010 /*
1011  * Returns state after command is accepted by command number.
1012  */
1013 static uint32_t get_state_by_command(unsigned command)
1014 {
1015         switch (command) {
1016                 case NAND_CMD_READ0:
1017                         return STATE_CMD_READ0;
1018                 case NAND_CMD_READ1:
1019                         return STATE_CMD_READ1;
1020                 case NAND_CMD_PAGEPROG:
1021                         return STATE_CMD_PAGEPROG;
1022                 case NAND_CMD_READSTART:
1023                         return STATE_CMD_READSTART;
1024                 case NAND_CMD_READOOB:
1025                         return STATE_CMD_READOOB;
1026                 case NAND_CMD_ERASE1:
1027                         return STATE_CMD_ERASE1;
1028                 case NAND_CMD_STATUS:
1029                         return STATE_CMD_STATUS;
1030                 case NAND_CMD_STATUS_MULTI:
1031                         return STATE_CMD_STATUS_M;
1032                 case NAND_CMD_SEQIN:
1033                         return STATE_CMD_SEQIN;
1034                 case NAND_CMD_READID:
1035                         return STATE_CMD_READID;
1036                 case NAND_CMD_ERASE2:
1037                         return STATE_CMD_ERASE2;
1038                 case NAND_CMD_RESET:
1039                         return STATE_CMD_RESET;
1040                 case NAND_CMD_RNDOUT:
1041                         return STATE_CMD_RNDOUT;
1042                 case NAND_CMD_RNDOUTSTART:
1043                         return STATE_CMD_RNDOUTSTART;
1044         }
1045
1046         NS_ERR("get_state_by_command: unknown command, BUG\n");
1047         return 0;
1048 }
1049
1050 /*
1051  * Move an address byte to the correspondent internal register.
1052  */
1053 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1054 {
1055         uint byte = (uint)bt;
1056
1057         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1058                 ns->regs.column |= (byte << 8 * ns->regs.count);
1059         else {
1060                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1061                                                 ns->geom.pgaddrbytes +
1062                                                 ns->geom.secaddrbytes));
1063         }
1064
1065         return;
1066 }
1067
1068 /*
1069  * Switch to STATE_READY state.
1070  */
1071 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1072 {
1073         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1074
1075         ns->state       = STATE_READY;
1076         ns->nxstate     = STATE_UNKNOWN;
1077         ns->op          = NULL;
1078         ns->npstates    = 0;
1079         ns->stateidx    = 0;
1080         ns->regs.num    = 0;
1081         ns->regs.count  = 0;
1082         ns->regs.off    = 0;
1083         ns->regs.row    = 0;
1084         ns->regs.column = 0;
1085         ns->regs.status = status;
1086 }
1087
1088 /*
1089  * If the operation isn't known yet, try to find it in the global array
1090  * of supported operations.
1091  *
1092  * Operation can be unknown because of the following.
1093  *   1. New command was accepted and this is the firs call to find the
1094  *      correspondent states chain. In this case ns->npstates = 0;
1095  *   2. There is several operations which begin with the same command(s)
1096  *      (for example program from the second half and read from the
1097  *      second half operations both begin with the READ1 command). In this
1098  *      case the ns->pstates[] array contains previous states.
1099  *
1100  * Thus, the function tries to find operation containing the following
1101  * states (if the 'flag' parameter is 0):
1102  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1103  *
1104  * If (one and only one) matching operation is found, it is accepted (
1105  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1106  * zeroed).
1107  *
1108  * If there are several maches, the current state is pushed to the
1109  * ns->pstates.
1110  *
1111  * The operation can be unknown only while commands are input to the chip.
1112  * As soon as address command is accepted, the operation must be known.
1113  * In such situation the function is called with 'flag' != 0, and the
1114  * operation is searched using the following pattern:
1115  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1116  *
1117  * It is supposed that this pattern must either match one operation on
1118  * none. There can't be ambiguity in that case.
1119  *
1120  * If no matches found, the functions does the following:
1121  *   1. if there are saved states present, try to ignore them and search
1122  *      again only using the last command. If nothing was found, switch
1123  *      to the STATE_READY state.
1124  *   2. if there are no saved states, switch to the STATE_READY state.
1125  *
1126  * RETURNS: -2 - no matched operations found.
1127  *          -1 - several matches.
1128  *           0 - operation is found.
1129  */
1130 static int find_operation(struct nandsim *ns, uint32_t flag)
1131 {
1132         int opsfound = 0;
1133         int i, j, idx = 0;
1134
1135         for (i = 0; i < NS_OPER_NUM; i++) {
1136
1137                 int found = 1;
1138
1139                 if (!(ns->options & ops[i].reqopts))
1140                         /* Ignore operations we can't perform */
1141                         continue;
1142
1143                 if (flag) {
1144                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1145                                 continue;
1146                 } else {
1147                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1148                                 continue;
1149                 }
1150
1151                 for (j = 0; j < ns->npstates; j++)
1152                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1153                                 && (ns->options & ops[idx].reqopts)) {
1154                                 found = 0;
1155                                 break;
1156                         }
1157
1158                 if (found) {
1159                         idx = i;
1160                         opsfound += 1;
1161                 }
1162         }
1163
1164         if (opsfound == 1) {
1165                 /* Exact match */
1166                 ns->op = &ops[idx].states[0];
1167                 if (flag) {
1168                         /*
1169                          * In this case the find_operation function was
1170                          * called when address has just began input. But it isn't
1171                          * yet fully input and the current state must
1172                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1173                          * state must be the next state (ns->nxstate).
1174                          */
1175                         ns->stateidx = ns->npstates - 1;
1176                 } else {
1177                         ns->stateidx = ns->npstates;
1178                 }
1179                 ns->npstates = 0;
1180                 ns->state = ns->op[ns->stateidx];
1181                 ns->nxstate = ns->op[ns->stateidx + 1];
1182                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1183                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1184                 return 0;
1185         }
1186
1187         if (opsfound == 0) {
1188                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1189                 if (ns->npstates != 0) {
1190                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1191                                         get_state_name(ns->state));
1192                         ns->npstates = 0;
1193                         return find_operation(ns, 0);
1194
1195                 }
1196                 NS_DBG("find_operation: no operations found\n");
1197                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1198                 return -2;
1199         }
1200
1201         if (flag) {
1202                 /* This shouldn't happen */
1203                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1204                 return -2;
1205         }
1206
1207         NS_DBG("find_operation: there is still ambiguity\n");
1208
1209         ns->pstates[ns->npstates++] = ns->state;
1210
1211         return -1;
1212 }
1213
1214 /*
1215  * Returns a pointer to the current page.
1216  */
1217 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1218 {
1219         return &(ns->pages[ns->regs.row]);
1220 }
1221
1222 /*
1223  * Retuns a pointer to the current byte, within the current page.
1224  */
1225 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1226 {
1227         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1228 }
1229
1230 /*
1231  * Fill the NAND buffer with data read from the specified page.
1232  */
1233 static void read_page(struct nandsim *ns, int num)
1234 {
1235         union ns_mem *mypage;
1236
1237         mypage = NS_GET_PAGE(ns);
1238         if (mypage->byte == NULL) {
1239                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1240                 memset(ns->buf.byte, 0xFF, num);
1241         } else {
1242                 unsigned int page_no = ns->regs.row;
1243                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1244                         ns->regs.row, ns->regs.column + ns->regs.off);
1245                 if (read_error(page_no)) {
1246                         int i;
1247                         memset(ns->buf.byte, 0xFF, num);
1248                         for (i = 0; i < num; ++i)
1249                                 ns->buf.byte[i] = random32();
1250                         NS_WARN("simulating read error in page %u\n", page_no);
1251                         return;
1252                 }
1253                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1254                 if (bitflips && random32() < (1 << 22)) {
1255                         int flips = 1;
1256                         if (bitflips > 1)
1257                                 flips = (random32() % (int) bitflips) + 1;
1258                         while (flips--) {
1259                                 int pos = random32() % (num * 8);
1260                                 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1261                                 NS_WARN("read_page: flipping bit %d in page %d "
1262                                         "reading from %d ecc: corrected=%u failed=%u\n",
1263                                         pos, ns->regs.row, ns->regs.column + ns->regs.off,
1264                                         nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1265                         }
1266                 }
1267         }
1268 }
1269
1270 /*
1271  * Erase all pages in the specified sector.
1272  */
1273 static void erase_sector(struct nandsim *ns)
1274 {
1275         union ns_mem *mypage;
1276         int i;
1277
1278         mypage = NS_GET_PAGE(ns);
1279         for (i = 0; i < ns->geom.pgsec; i++) {
1280                 if (mypage->byte != NULL) {
1281                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1282                         kfree(mypage->byte);
1283                         mypage->byte = NULL;
1284                 }
1285                 mypage++;
1286         }
1287 }
1288
1289 /*
1290  * Program the specified page with the contents from the NAND buffer.
1291  */
1292 static int prog_page(struct nandsim *ns, int num)
1293 {
1294         int i;
1295         union ns_mem *mypage;
1296         u_char *pg_off;
1297
1298         mypage = NS_GET_PAGE(ns);
1299         if (mypage->byte == NULL) {
1300                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1301                 /*
1302                  * We allocate memory with GFP_NOFS because a flash FS may
1303                  * utilize this. If it is holding an FS lock, then gets here,
1304                  * then kmalloc runs writeback which goes to the FS again
1305                  * and deadlocks. This was seen in practice.
1306                  */
1307                 mypage->byte = kmalloc(ns->geom.pgszoob, GFP_NOFS);
1308                 if (mypage->byte == NULL) {
1309                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1310                         return -1;
1311                 }
1312                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1313         }
1314
1315         pg_off = NS_PAGE_BYTE_OFF(ns);
1316         for (i = 0; i < num; i++)
1317                 pg_off[i] &= ns->buf.byte[i];
1318
1319         return 0;
1320 }
1321
1322 /*
1323  * If state has any action bit, perform this action.
1324  *
1325  * RETURNS: 0 if success, -1 if error.
1326  */
1327 static int do_state_action(struct nandsim *ns, uint32_t action)
1328 {
1329         int num;
1330         int busdiv = ns->busw == 8 ? 1 : 2;
1331         unsigned int erase_block_no, page_no;
1332
1333         action &= ACTION_MASK;
1334
1335         /* Check that page address input is correct */
1336         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1337                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1338                 return -1;
1339         }
1340
1341         switch (action) {
1342
1343         case ACTION_CPY:
1344                 /*
1345                  * Copy page data to the internal buffer.
1346                  */
1347
1348                 /* Column shouldn't be very large */
1349                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1350                         NS_ERR("do_state_action: column number is too large\n");
1351                         break;
1352                 }
1353                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1354                 read_page(ns, num);
1355
1356                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1357                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1358
1359                 if (ns->regs.off == 0)
1360                         NS_LOG("read page %d\n", ns->regs.row);
1361                 else if (ns->regs.off < ns->geom.pgsz)
1362                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1363                 else
1364                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1365
1366                 NS_UDELAY(access_delay);
1367                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1368
1369                 break;
1370
1371         case ACTION_SECERASE:
1372                 /*
1373                  * Erase sector.
1374                  */
1375
1376                 if (ns->lines.wp) {
1377                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1378                         return -1;
1379                 }
1380
1381                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1382                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1383                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1384                         return -1;
1385                 }
1386
1387                 ns->regs.row = (ns->regs.row <<
1388                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1389                 ns->regs.column = 0;
1390
1391                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1392
1393                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1394                                 ns->regs.row, NS_RAW_OFFSET(ns));
1395                 NS_LOG("erase sector %u\n", erase_block_no);
1396
1397                 erase_sector(ns);
1398
1399                 NS_MDELAY(erase_delay);
1400
1401                 if (erase_block_wear)
1402                         update_wear(erase_block_no);
1403
1404                 if (erase_error(erase_block_no)) {
1405                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1406                         return -1;
1407                 }
1408
1409                 break;
1410
1411         case ACTION_PRGPAGE:
1412                 /*
1413                  * Programm page - move internal buffer data to the page.
1414                  */
1415
1416                 if (ns->lines.wp) {
1417                         NS_WARN("do_state_action: device is write-protected, programm\n");
1418                         return -1;
1419                 }
1420
1421                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1422                 if (num != ns->regs.count) {
1423                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1424                                         ns->regs.count, num);
1425                         return -1;
1426                 }
1427
1428                 if (prog_page(ns, num) == -1)
1429                         return -1;
1430
1431                 page_no = ns->regs.row;
1432
1433                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1434                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1435                 NS_LOG("programm page %d\n", ns->regs.row);
1436
1437                 NS_UDELAY(programm_delay);
1438                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1439
1440                 if (write_error(page_no)) {
1441                         NS_WARN("simulating write failure in page %u\n", page_no);
1442                         return -1;
1443                 }
1444
1445                 break;
1446
1447         case ACTION_ZEROOFF:
1448                 NS_DBG("do_state_action: set internal offset to 0\n");
1449                 ns->regs.off = 0;
1450                 break;
1451
1452         case ACTION_HALFOFF:
1453                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1454                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1455                                 "byte page size 8x chips\n");
1456                         return -1;
1457                 }
1458                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1459                 ns->regs.off = ns->geom.pgsz/2;
1460                 break;
1461
1462         case ACTION_OOBOFF:
1463                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1464                 ns->regs.off = ns->geom.pgsz;
1465                 break;
1466
1467         default:
1468                 NS_DBG("do_state_action: BUG! unknown action\n");
1469         }
1470
1471         return 0;
1472 }
1473
1474 /*
1475  * Switch simulator's state.
1476  */
1477 static void switch_state(struct nandsim *ns)
1478 {
1479         if (ns->op) {
1480                 /*
1481                  * The current operation have already been identified.
1482                  * Just follow the states chain.
1483                  */
1484
1485                 ns->stateidx += 1;
1486                 ns->state = ns->nxstate;
1487                 ns->nxstate = ns->op[ns->stateidx + 1];
1488
1489                 NS_DBG("switch_state: operation is known, switch to the next state, "
1490                         "state: %s, nxstate: %s\n",
1491                         get_state_name(ns->state), get_state_name(ns->nxstate));
1492
1493                 /* See, whether we need to do some action */
1494                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1495                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1496                         return;
1497                 }
1498
1499         } else {
1500                 /*
1501                  * We don't yet know which operation we perform.
1502                  * Try to identify it.
1503                  */
1504
1505                 /*
1506                  *  The only event causing the switch_state function to
1507                  *  be called with yet unknown operation is new command.
1508                  */
1509                 ns->state = get_state_by_command(ns->regs.command);
1510
1511                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1512
1513                 if (find_operation(ns, 0) != 0)
1514                         return;
1515
1516                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1517                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1518                         return;
1519                 }
1520         }
1521
1522         /* For 16x devices column means the page offset in words */
1523         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1524                 NS_DBG("switch_state: double the column number for 16x device\n");
1525                 ns->regs.column <<= 1;
1526         }
1527
1528         if (NS_STATE(ns->nxstate) == STATE_READY) {
1529                 /*
1530                  * The current state is the last. Return to STATE_READY
1531                  */
1532
1533                 u_char status = NS_STATUS_OK(ns);
1534
1535                 /* In case of data states, see if all bytes were input/output */
1536                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1537                         && ns->regs.count != ns->regs.num) {
1538                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1539                                         ns->regs.num - ns->regs.count);
1540                         status = NS_STATUS_FAILED(ns);
1541                 }
1542
1543                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1544
1545                 switch_to_ready_state(ns, status);
1546
1547                 return;
1548         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1549                 /*
1550                  * If the next state is data input/output, switch to it now
1551                  */
1552
1553                 ns->state      = ns->nxstate;
1554                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1555                 ns->regs.num   = ns->regs.count = 0;
1556
1557                 NS_DBG("switch_state: the next state is data I/O, switch, "
1558                         "state: %s, nxstate: %s\n",
1559                         get_state_name(ns->state), get_state_name(ns->nxstate));
1560
1561                 /*
1562                  * Set the internal register to the count of bytes which
1563                  * are expected to be input or output
1564                  */
1565                 switch (NS_STATE(ns->state)) {
1566                         case STATE_DATAIN:
1567                         case STATE_DATAOUT:
1568                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1569                                 break;
1570
1571                         case STATE_DATAOUT_ID:
1572                                 ns->regs.num = ns->geom.idbytes;
1573                                 break;
1574
1575                         case STATE_DATAOUT_STATUS:
1576                         case STATE_DATAOUT_STATUS_M:
1577                                 ns->regs.count = ns->regs.num = 0;
1578                                 break;
1579
1580                         default:
1581                                 NS_ERR("switch_state: BUG! unknown data state\n");
1582                 }
1583
1584         } else if (ns->nxstate & STATE_ADDR_MASK) {
1585                 /*
1586                  * If the next state is address input, set the internal
1587                  * register to the number of expected address bytes
1588                  */
1589
1590                 ns->regs.count = 0;
1591
1592                 switch (NS_STATE(ns->nxstate)) {
1593                         case STATE_ADDR_PAGE:
1594                                 ns->regs.num = ns->geom.pgaddrbytes;
1595
1596                                 break;
1597                         case STATE_ADDR_SEC:
1598                                 ns->regs.num = ns->geom.secaddrbytes;
1599                                 break;
1600
1601                         case STATE_ADDR_ZERO:
1602                                 ns->regs.num = 1;
1603                                 break;
1604
1605                         case STATE_ADDR_COLUMN:
1606                                 /* Column address is always 2 bytes */
1607                                 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1608                                 break;
1609
1610                         default:
1611                                 NS_ERR("switch_state: BUG! unknown address state\n");
1612                 }
1613         } else {
1614                 /*
1615                  * Just reset internal counters.
1616                  */
1617
1618                 ns->regs.num = 0;
1619                 ns->regs.count = 0;
1620         }
1621 }
1622
1623 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1624 {
1625         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1626         u_char outb = 0x00;
1627
1628         /* Sanity and correctness checks */
1629         if (!ns->lines.ce) {
1630                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1631                 return outb;
1632         }
1633         if (ns->lines.ale || ns->lines.cle) {
1634                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1635                 return outb;
1636         }
1637         if (!(ns->state & STATE_DATAOUT_MASK)) {
1638                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1639                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1640                 return outb;
1641         }
1642
1643         /* Status register may be read as many times as it is wanted */
1644         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1645                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1646                 return ns->regs.status;
1647         }
1648
1649         /* Check if there is any data in the internal buffer which may be read */
1650         if (ns->regs.count == ns->regs.num) {
1651                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1652                 return outb;
1653         }
1654
1655         switch (NS_STATE(ns->state)) {
1656                 case STATE_DATAOUT:
1657                         if (ns->busw == 8) {
1658                                 outb = ns->buf.byte[ns->regs.count];
1659                                 ns->regs.count += 1;
1660                         } else {
1661                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1662                                 ns->regs.count += 2;
1663                         }
1664                         break;
1665                 case STATE_DATAOUT_ID:
1666                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1667                         outb = ns->ids[ns->regs.count];
1668                         ns->regs.count += 1;
1669                         break;
1670                 default:
1671                         BUG();
1672         }
1673
1674         if (ns->regs.count == ns->regs.num) {
1675                 NS_DBG("read_byte: all bytes were read\n");
1676
1677                 /*
1678                  * The OPT_AUTOINCR allows to read next conseqitive pages without
1679                  * new read operation cycle.
1680                  */
1681                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1682                         ns->regs.count = 0;
1683                         if (ns->regs.row + 1 < ns->geom.pgnum)
1684                                 ns->regs.row += 1;
1685                         NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1686                         do_state_action(ns, ACTION_CPY);
1687                 }
1688                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1689                         switch_state(ns);
1690
1691         }
1692
1693         return outb;
1694 }
1695
1696 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1697 {
1698         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1699
1700         /* Sanity and correctness checks */
1701         if (!ns->lines.ce) {
1702                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1703                 return;
1704         }
1705         if (ns->lines.ale && ns->lines.cle) {
1706                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1707                 return;
1708         }
1709
1710         if (ns->lines.cle == 1) {
1711                 /*
1712                  * The byte written is a command.
1713                  */
1714
1715                 if (byte == NAND_CMD_RESET) {
1716                         NS_LOG("reset chip\n");
1717                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1718                         return;
1719                 }
1720
1721                 /* Check that the command byte is correct */
1722                 if (check_command(byte)) {
1723                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1724                         return;
1725                 }
1726
1727                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1728                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1729                         || NS_STATE(ns->state) == STATE_DATAOUT) {
1730                         int row = ns->regs.row;
1731
1732                         switch_state(ns);
1733                         if (byte == NAND_CMD_RNDOUT)
1734                                 ns->regs.row = row;
1735                 }
1736
1737                 /* Check if chip is expecting command */
1738                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1739                         /*
1740                          * We are in situation when something else (not command)
1741                          * was expected but command was input. In this case ignore
1742                          * previous command(s)/state(s) and accept the last one.
1743                          */
1744                         NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1745                                 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1746                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1747                 }
1748
1749                 NS_DBG("command byte corresponding to %s state accepted\n",
1750                         get_state_name(get_state_by_command(byte)));
1751                 ns->regs.command = byte;
1752                 switch_state(ns);
1753
1754         } else if (ns->lines.ale == 1) {
1755                 /*
1756                  * The byte written is an address.
1757                  */
1758
1759                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
1760
1761                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
1762
1763                         if (find_operation(ns, 1) < 0)
1764                                 return;
1765
1766                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1767                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1768                                 return;
1769                         }
1770
1771                         ns->regs.count = 0;
1772                         switch (NS_STATE(ns->nxstate)) {
1773                                 case STATE_ADDR_PAGE:
1774                                         ns->regs.num = ns->geom.pgaddrbytes;
1775                                         break;
1776                                 case STATE_ADDR_SEC:
1777                                         ns->regs.num = ns->geom.secaddrbytes;
1778                                         break;
1779                                 case STATE_ADDR_ZERO:
1780                                         ns->regs.num = 1;
1781                                         break;
1782                                 default:
1783                                         BUG();
1784                         }
1785                 }
1786
1787                 /* Check that chip is expecting address */
1788                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
1789                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
1790                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
1791                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1792                         return;
1793                 }
1794
1795                 /* Check if this is expected byte */
1796                 if (ns->regs.count == ns->regs.num) {
1797                         NS_ERR("write_byte: no more address bytes expected\n");
1798                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1799                         return;
1800                 }
1801
1802                 accept_addr_byte(ns, byte);
1803
1804                 ns->regs.count += 1;
1805
1806                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
1807                                 (uint)byte, ns->regs.count, ns->regs.num);
1808
1809                 if (ns->regs.count == ns->regs.num) {
1810                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
1811                         switch_state(ns);
1812                 }
1813
1814         } else {
1815                 /*
1816                  * The byte written is an input data.
1817                  */
1818
1819                 /* Check that chip is expecting data input */
1820                 if (!(ns->state & STATE_DATAIN_MASK)) {
1821                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
1822                                 "switch to %s\n", (uint)byte,
1823                                 get_state_name(ns->state), get_state_name(STATE_READY));
1824                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1825                         return;
1826                 }
1827
1828                 /* Check if this is expected byte */
1829                 if (ns->regs.count == ns->regs.num) {
1830                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
1831                                         ns->regs.num);
1832                         return;
1833                 }
1834
1835                 if (ns->busw == 8) {
1836                         ns->buf.byte[ns->regs.count] = byte;
1837                         ns->regs.count += 1;
1838                 } else {
1839                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
1840                         ns->regs.count += 2;
1841                 }
1842         }
1843
1844         return;
1845 }
1846
1847 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
1848 {
1849         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1850
1851         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
1852         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
1853         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
1854
1855         if (cmd != NAND_CMD_NONE)
1856                 ns_nand_write_byte(mtd, cmd);
1857 }
1858
1859 static int ns_device_ready(struct mtd_info *mtd)
1860 {
1861         NS_DBG("device_ready\n");
1862         return 1;
1863 }
1864
1865 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
1866 {
1867         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
1868
1869         NS_DBG("read_word\n");
1870
1871         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
1872 }
1873
1874 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
1875 {
1876         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1877
1878         /* Check that chip is expecting data input */
1879         if (!(ns->state & STATE_DATAIN_MASK)) {
1880                 NS_ERR("write_buf: data input isn't expected, state is %s, "
1881                         "switch to STATE_READY\n", get_state_name(ns->state));
1882                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1883                 return;
1884         }
1885
1886         /* Check if these are expected bytes */
1887         if (ns->regs.count + len > ns->regs.num) {
1888                 NS_ERR("write_buf: too many input bytes\n");
1889                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1890                 return;
1891         }
1892
1893         memcpy(ns->buf.byte + ns->regs.count, buf, len);
1894         ns->regs.count += len;
1895
1896         if (ns->regs.count == ns->regs.num) {
1897                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
1898         }
1899 }
1900
1901 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
1902 {
1903         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1904
1905         /* Sanity and correctness checks */
1906         if (!ns->lines.ce) {
1907                 NS_ERR("read_buf: chip is disabled\n");
1908                 return;
1909         }
1910         if (ns->lines.ale || ns->lines.cle) {
1911                 NS_ERR("read_buf: ALE or CLE pin is high\n");
1912                 return;
1913         }
1914         if (!(ns->state & STATE_DATAOUT_MASK)) {
1915                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
1916                         get_state_name(ns->state));
1917                 return;
1918         }
1919
1920         if (NS_STATE(ns->state) != STATE_DATAOUT) {
1921                 int i;
1922
1923                 for (i = 0; i < len; i++)
1924                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
1925
1926                 return;
1927         }
1928
1929         /* Check if these are expected bytes */
1930         if (ns->regs.count + len > ns->regs.num) {
1931                 NS_ERR("read_buf: too many bytes to read\n");
1932                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1933                 return;
1934         }
1935
1936         memcpy(buf, ns->buf.byte + ns->regs.count, len);
1937         ns->regs.count += len;
1938
1939         if (ns->regs.count == ns->regs.num) {
1940                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1941                         ns->regs.count = 0;
1942                         if (ns->regs.row + 1 < ns->geom.pgnum)
1943                                 ns->regs.row += 1;
1944                         NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
1945                         do_state_action(ns, ACTION_CPY);
1946                 }
1947                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1948                         switch_state(ns);
1949         }
1950
1951         return;
1952 }
1953
1954 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
1955 {
1956         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
1957
1958         if (!memcmp(buf, &ns_verify_buf[0], len)) {
1959                 NS_DBG("verify_buf: the buffer is OK\n");
1960                 return 0;
1961         } else {
1962                 NS_DBG("verify_buf: the buffer is wrong\n");
1963                 return -EFAULT;
1964         }
1965 }
1966
1967 /*
1968  * Module initialization function
1969  */
1970 static int __init ns_init_module(void)
1971 {
1972         struct nand_chip *chip;
1973         struct nandsim *nand;
1974         int retval = -ENOMEM, i;
1975
1976         if (bus_width != 8 && bus_width != 16) {
1977                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
1978                 return -EINVAL;
1979         }
1980
1981         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
1982         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
1983                                 + sizeof(struct nandsim), GFP_KERNEL);
1984         if (!nsmtd) {
1985                 NS_ERR("unable to allocate core structures.\n");
1986                 return -ENOMEM;
1987         }
1988         chip        = (struct nand_chip *)(nsmtd + 1);
1989         nsmtd->priv = (void *)chip;
1990         nand        = (struct nandsim *)(chip + 1);
1991         chip->priv  = (void *)nand;
1992
1993         /*
1994          * Register simulator's callbacks.
1995          */
1996         chip->cmd_ctrl   = ns_hwcontrol;
1997         chip->read_byte  = ns_nand_read_byte;
1998         chip->dev_ready  = ns_device_ready;
1999         chip->write_buf  = ns_nand_write_buf;
2000         chip->read_buf   = ns_nand_read_buf;
2001         chip->verify_buf = ns_nand_verify_buf;
2002         chip->read_word  = ns_nand_read_word;
2003         chip->ecc.mode   = NAND_ECC_SOFT;
2004         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2005         /* and 'badblocks' parameters to work */
2006         chip->options   |= NAND_SKIP_BBTSCAN;
2007
2008         /*
2009          * Perform minimum nandsim structure initialization to handle
2010          * the initial ID read command correctly
2011          */
2012         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2013                 nand->geom.idbytes = 4;
2014         else
2015                 nand->geom.idbytes = 2;
2016         nand->regs.status = NS_STATUS_OK(nand);
2017         nand->nxstate = STATE_UNKNOWN;
2018         nand->options |= OPT_PAGE256; /* temporary value */
2019         nand->ids[0] = first_id_byte;
2020         nand->ids[1] = second_id_byte;
2021         nand->ids[2] = third_id_byte;
2022         nand->ids[3] = fourth_id_byte;
2023         if (bus_width == 16) {
2024                 nand->busw = 16;
2025                 chip->options |= NAND_BUSWIDTH_16;
2026         }
2027
2028         nsmtd->owner = THIS_MODULE;
2029
2030         if ((retval = parse_weakblocks()) != 0)
2031                 goto error;
2032
2033         if ((retval = parse_weakpages()) != 0)
2034                 goto error;
2035
2036         if ((retval = parse_gravepages()) != 0)
2037                 goto error;
2038
2039         if ((retval = nand_scan(nsmtd, 1)) != 0) {
2040                 NS_ERR("can't register NAND Simulator\n");
2041                 if (retval > 0)
2042                         retval = -ENXIO;
2043                 goto error;
2044         }
2045
2046         if (overridesize) {
2047                 u_int64_t new_size = (u_int64_t)nsmtd->erasesize << overridesize;
2048                 if (new_size >> overridesize != nsmtd->erasesize) {
2049                         NS_ERR("overridesize is too big\n");
2050                         goto err_exit;
2051                 }
2052                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2053                 nsmtd->size = new_size;
2054                 chip->chipsize = new_size;
2055                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2056                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2057         }
2058
2059         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2060                 goto err_exit;
2061
2062         if ((retval = init_nandsim(nsmtd)) != 0)
2063                 goto err_exit;
2064
2065         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2066                 goto err_exit;
2067
2068         if ((retval = nand_default_bbt(nsmtd)) != 0)
2069                 goto err_exit;
2070
2071         /* Register NAND partitions */
2072         if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2073                 goto err_exit;
2074
2075         return 0;
2076
2077 err_exit:
2078         free_nandsim(nand);
2079         nand_release(nsmtd);
2080         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2081                 kfree(nand->partitions[i].name);
2082 error:
2083         kfree(nsmtd);
2084         free_lists();
2085
2086         return retval;
2087 }
2088
2089 module_init(ns_init_module);
2090
2091 /*
2092  * Module clean-up function
2093  */
2094 static void __exit ns_cleanup_module(void)
2095 {
2096         struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
2097         int i;
2098
2099         free_nandsim(ns);    /* Free nandsim private resources */
2100         nand_release(nsmtd); /* Unregister driver */
2101         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2102                 kfree(ns->partitions[i].name);
2103         kfree(nsmtd);        /* Free other structures */
2104         free_lists();
2105 }
2106
2107 module_exit(ns_cleanup_module);
2108
2109 MODULE_LICENSE ("GPL");
2110 MODULE_AUTHOR ("Artem B. Bityuckiy");
2111 MODULE_DESCRIPTION ("The NAND flash simulator");