drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  */
  25
  26 #include <linux/init.h>
  27 #include <linux/types.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/vmalloc.h>
  31 #include <asm/div64.h>
  32 #include <linux/slab.h>
  33 #include <linux/errno.h>
  34 #include <linux/string.h>
  35 #include <linux/mtd/mtd.h>
  36 #include <linux/mtd/nand.h>
  37 #include <linux/mtd/partitions.h>
  38 #include <linux/delay.h>
  39 #include <linux/list.h>
  40 #include <linux/random.h>
  41 #include <asm/div64.h>
  42
  43 /* Default simulator parameters values */
  44 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  45     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  46     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  47     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  48 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  49 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  50 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  51 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  52 #endif
  53
  54 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  55 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  56 #endif
  57 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  58 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  59 #endif
  60 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  61 #define CONFIG_NANDSIM_ERASE_DELAY 2
  62 #endif
  63 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  64 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  65 #endif
  66 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  67 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  68 #endif
  69 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  70 #define CONFIG_NANDSIM_BUS_WIDTH  8
  71 #endif
  72 #ifndef CONFIG_NANDSIM_DO_DELAYS
  73 #define CONFIG_NANDSIM_DO_DELAYS  0
  74 #endif
  75 #ifndef CONFIG_NANDSIM_LOG
  76 #define CONFIG_NANDSIM_LOG        0
  77 #endif
  78 #ifndef CONFIG_NANDSIM_DBG
  79 #define CONFIG_NANDSIM_DBG        0
  80 #endif
  81
  82 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
  83 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
  84 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
  85 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
  86 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  87 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  88 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  89 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  90 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  91 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  92 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  93 static uint log            = CONFIG_NANDSIM_LOG;
  94 static uint dbg            = CONFIG_NANDSIM_DBG;
  95 static unsigned long parts[MAX_MTD_DEVICES];
  96 static unsigned int parts_num;
  97 static char *badblocks = NULL;
  98 static char *weakblocks = NULL;
  99 static char *weakpages = NULL;
 100 static unsigned int bitflips = 0;
 101 static char *gravepages = NULL;
 102 static unsigned int rptwear = 0;
 103 static unsigned int overridesize = 0;
 104
 105 module_param(first_id_byte,  uint, 0400);
 106 module_param(second_id_byte, uint, 0400);
 107 module_param(third_id_byte,  uint, 0400);
 108 module_param(fourth_id_byte, uint, 0400);
 109 module_param(access_delay,   uint, 0400);
 110 module_param(programm_delay, uint, 0400);
 111 module_param(erase_delay,    uint, 0400);
 112 module_param(output_cycle,   uint, 0400);
 113 module_param(input_cycle,    uint, 0400);
 114 module_param(bus_width,      uint, 0400);
 115 module_param(do_delays,      uint, 0400);
 116 module_param(log,            uint, 0400);
 117 module_param(dbg,            uint, 0400);
 118 module_param_array(parts, ulong, &parts_num, 0400);
 119 module_param(badblocks,      charp, 0400);
 120 module_param(weakblocks,     charp, 0400);
 121 module_param(weakpages,      charp, 0400);
 122 module_param(bitflips,       uint, 0400);
 123 module_param(gravepages,     charp, 0400);
 124 module_param(rptwear,        uint, 0400);
 125 module_param(overridesize,   uint, 0400);
 126
 127 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
 128 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
 129 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
 130 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
 131 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microiseconds)");
 132 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 133 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 134 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanodeconds)");
 135 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanodeconds)");
 136 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 137 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 138 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 139 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 140 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 141 /* Page and erase block positions for the following parameters are independent of any partitions */
 142 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 143 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 144                                  " separated by commas e.g. 113:2 means eb 113"
 145                                  " can be erased only twice before failing");
 146 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 147                                  " separated by commas e.g. 1401:2 means page 1401"
 148                                  " can be written only twice before failing");
 149 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 150 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 151                                  " separated by commas e.g. 1401:2 means page 1401"
 152                                  " can be read only twice before failing");
 153 MODULE_PARM_DESC(rptwear,        "Number of erases inbetween reporting wear, if not zero");
 154 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
 155                                  "The size is specified in erase blocks and as the exponent of a power of two"
 156                                  " e.g. 5 means a size of 32 erase blocks");
 157
 158 /* The largest possible page size */
 159 #define NS_LARGEST_PAGE_SIZE    2048
 160
 161 /* The prefix for simulator output */
 162 #define NS_OUTPUT_PREFIX "[nandsim]"
 163
 164 /* Simulator's output macros (logging, debugging, warning, error) */
 165 #define NS_LOG(args...) \
 166         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 167 #define NS_DBG(args...) \
 168         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 169 #define NS_WARN(args...) \
 170         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 171 #define NS_ERR(args...) \
 172         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 173 #define NS_INFO(args...) \
 174         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
 175
 176 /* Busy-wait delay macros (microseconds, milliseconds) */
 177 #define NS_UDELAY(us) \
 178         do { if (do_delays) udelay(us); } while(0)
 179 #define NS_MDELAY(us) \
 180         do { if (do_delays) mdelay(us); } while(0)
 181
 182 /* Is the nandsim structure initialized ? */
 183 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 184
 185 /* Good operation completion status */
 186 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 187
 188 /* Operation failed completion status */
 189 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 190
 191 /* Calculate the page offset in flash RAM image by (row, column) address */
 192 #define NS_RAW_OFFSET(ns) \
 193         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
 194
 195 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 196 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 197
 198 /* After a command is input, the simulator goes to one of the following states */
 199 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 200 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 201 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 202 #define STATE_CMD_PAGEPROG     0x00000004 /* start page programm */
 203 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 204 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 205 #define STATE_CMD_STATUS       0x00000007 /* read status */
 206 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
 207 #define STATE_CMD_SEQIN        0x00000009 /* sequential data imput */
 208 #define STATE_CMD_READID       0x0000000A /* read ID */
 209 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 210 #define STATE_CMD_RESET        0x0000000C /* reset */
 211 #define STATE_CMD_RNDOUT       0x0000000D /* random output command */
 212 #define STATE_CMD_RNDOUTSTART  0x0000000E /* random output start command */
 213 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 214
 215 /* After an address is input, the simulator goes to one of these states */
 216 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 217 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 218 #define STATE_ADDR_COLUMN      0x00000030 /* column address was accepted */
 219 #define STATE_ADDR_ZERO        0x00000040 /* one byte zero address was accepted */
 220 #define STATE_ADDR_MASK        0x00000070 /* address states mask */
 221
 222 /* Durind data input/output the simulator is in these states */
 223 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 224 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 225
 226 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 227 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 228 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 229 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
 230 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 231
 232 /* Previous operation is done, ready to accept new requests */
 233 #define STATE_READY            0x00000000
 234
 235 /* This state is used to mark that the next state isn't known yet */
 236 #define STATE_UNKNOWN          0x10000000
 237
 238 /* Simulator's actions bit masks */
 239 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 240 #define ACTION_PRGPAGE   0x00200000 /* programm the internal buffer to flash */
 241 #define ACTION_SECERASE  0x00300000 /* erase sector */
 242 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 243 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 244 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 245 #define ACTION_MASK      0x00700000 /* action mask */
 246
 247 #define NS_OPER_NUM      13 /* Number of operations supported by the simulator */
 248 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 249
 250 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 251 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
 252 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 253 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 254 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 255 #define OPT_AUTOINCR     0x00000020 /* page number auto inctimentation is possible */
 256 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 257 #define OPT_LARGEPAGE    (OPT_PAGE2048) /* 2048-byte page chips */
 258 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 259
 260 /* Remove action bits ftom state */
 261 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 262
 263 /*
 264  * Maximum previous states which need to be saved. Currently saving is
 265  * only needed for page programm operation with preceeded read command
 266  * (which is only valid for 512-byte pages).
 267  */
 268 #define NS_MAX_PREVSTATES 1
 269
 270 /*
 271  * A union to represent flash memory contents and flash buffer.
 272  */
 273 union ns_mem {
 274         u_char *byte;    /* for byte access */
 275         uint16_t *word;  /* for 16-bit word access */
 276 };
 277
 278 /*
 279  * The structure which describes all the internal simulator data.
 280  */
 281 struct nandsim {
 282         struct mtd_partition partitions[MAX_MTD_DEVICES];
 283         unsigned int nbparts;
 284
 285         uint busw;              /* flash chip bus width (8 or 16) */
 286         u_char ids[4];          /* chip's ID bytes */
 287         uint32_t options;       /* chip's characteristic bits */
 288         uint32_t state;         /* current chip state */
 289         uint32_t nxstate;       /* next expected state */
 290
 291         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 292         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 293         uint16_t npstates;      /* number of previous states saved */
 294         uint16_t stateidx;      /* current state index */
 295
 296         /* The simulated NAND flash pages array */
 297         union ns_mem *pages;
 298
 299         /* Internal buffer of page + OOB size bytes */
 300         union ns_mem buf;
 301
 302         /* NAND flash "geometry" */
 303         struct nandsin_geometry {
 304                 uint64_t totsz;     /* total flash size, bytes */
 305                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 306                 uint pgsz;          /* NAND flash page size, bytes */
 307                 uint oobsz;         /* page OOB area size, bytes */
 308                 uint64_t totszoob;  /* total flash size including OOB, bytes */
 309                 uint pgszoob;       /* page size including OOB , bytes*/
 310                 uint secszoob;      /* sector size including OOB, bytes */
 311                 uint pgnum;         /* total number of pages */
 312                 uint pgsec;         /* number of pages per sector */
 313                 uint secshift;      /* bits number in sector size */
 314                 uint pgshift;       /* bits number in page size */
 315                 uint oobshift;      /* bits number in OOB size */
 316                 uint pgaddrbytes;   /* bytes per page address */
 317                 uint secaddrbytes;  /* bytes per sector address */
 318                 uint idbytes;       /* the number ID bytes that this chip outputs */
 319         } geom;
 320
 321         /* NAND flash internal registers */
 322         struct nandsim_regs {
 323                 unsigned command; /* the command register */
 324                 u_char   status;  /* the status register */
 325                 uint     row;     /* the page number */
 326                 uint     column;  /* the offset within page */
 327                 uint     count;   /* internal counter */
 328                 uint     num;     /* number of bytes which must be processed */
 329                 uint     off;     /* fixed page offset */
 330         } regs;
 331
 332         /* NAND flash lines state */
 333         struct ns_lines_status {
 334                 int ce;  /* chip Enable */
 335                 int cle; /* command Latch Enable */
 336                 int ale; /* address Latch Enable */
 337                 int wp;  /* write Protect */
 338         } lines;
 339 };
 340
 341 /*
 342  * Operations array. To perform any operation the simulator must pass
 343  * through the correspondent states chain.
 344  */
 345 static struct nandsim_operations {
 346         uint32_t reqopts;  /* options which are required to perform the operation */
 347         uint32_t states[NS_OPER_STATES]; /* operation's states */
 348 } ops[NS_OPER_NUM] = {
 349         /* Read page + OOB from the beginning */
 350         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 351                         STATE_DATAOUT, STATE_READY}},
 352         /* Read page + OOB from the second half */
 353         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 354                         STATE_DATAOUT, STATE_READY}},
 355         /* Read OOB */
 356         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 357                         STATE_DATAOUT, STATE_READY}},
 358         /* Programm page starting from the beginning */
 359         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 360                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 361         /* Programm page starting from the beginning */
 362         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 363                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 364         /* Programm page starting from the second half */
 365         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 366                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 367         /* Programm OOB */
 368         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 369                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 370         /* Erase sector */
 371         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 372         /* Read status */
 373         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 374         /* Read multi-plane status */
 375         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
 376         /* Read ID */
 377         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 378         /* Large page devices read page */
 379         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 380                                STATE_DATAOUT, STATE_READY}},
 381         /* Large page devices random page read */
 382         {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
 383                                STATE_DATAOUT, STATE_READY}},
 384 };
 385
 386 struct weak_block {
 387         struct list_head list;
 388         unsigned int erase_block_no;
 389         unsigned int max_erases;
 390         unsigned int erases_done;
 391 };
 392
 393 static LIST_HEAD(weak_blocks);
 394
 395 struct weak_page {
 396         struct list_head list;
 397         unsigned int page_no;
 398         unsigned int max_writes;
 399         unsigned int writes_done;
 400 };
 401
 402 static LIST_HEAD(weak_pages);
 403
 404 struct grave_page {
 405         struct list_head list;
 406         unsigned int page_no;
 407         unsigned int max_reads;
 408         unsigned int reads_done;
 409 };
 410
 411 static LIST_HEAD(grave_pages);
 412
 413 static unsigned long *erase_block_wear = NULL;
 414 static unsigned int wear_eb_count = 0;
 415 static unsigned long total_wear = 0;
 416 static unsigned int rptwear_cnt = 0;
 417
 418 /* MTD structure for NAND controller */
 419 static struct mtd_info *nsmtd;
 420
 421 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
 422
 423 /*
 424  * Allocate array of page pointers and initialize the array to NULL
 425  * pointers.
 426  *
 427  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 428  */
 429 static int alloc_device(struct nandsim *ns)
 430 {
 431         int i;
 432
 433         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 434         if (!ns->pages) {
 435                 NS_ERR("alloc_map: unable to allocate page array\n");
 436                 return -ENOMEM;
 437         }
 438         for (i = 0; i < ns->geom.pgnum; i++) {
 439                 ns->pages[i].byte = NULL;
 440         }
 441
 442         return 0;
 443 }
 444
 445 /*
 446  * Free any allocated pages, and free the array of page pointers.
 447  */
 448 static void free_device(struct nandsim *ns)
 449 {
 450         int i;
 451
 452         if (ns->pages) {
 453                 for (i = 0; i < ns->geom.pgnum; i++) {
 454                         if (ns->pages[i].byte)
 455                                 kfree(ns->pages[i].byte);
 456                 }
 457                 vfree(ns->pages);
 458         }
 459 }
 460
 461 static char *get_partition_name(int i)
 462 {
 463         char buf[64];
 464         sprintf(buf, "NAND simulator partition %d", i);
 465         return kstrdup(buf, GFP_KERNEL);
 466 }
 467
 468 static u_int64_t divide(u_int64_t n, u_int32_t d)
 469 {
 470         do_div(n, d);
 471         return n;
 472 }
 473
 474 /*
 475  * Initialize the nandsim structure.
 476  *
 477  * RETURNS: 0 if success, -ERRNO if failure.
 478  */
 479 static int init_nandsim(struct mtd_info *mtd)
 480 {
 481         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
 482         struct nandsim   *ns   = (struct nandsim *)(chip->priv);
 483         int i, ret = 0;
 484         u_int64_t remains;
 485         u_int64_t next_offset;
 486
 487         if (NS_IS_INITIALIZED(ns)) {
 488                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 489                 return -EIO;
 490         }
 491
 492         /* Force mtd to not do delays */
 493         chip->chip_delay = 0;
 494
 495         /* Initialize the NAND flash parameters */
 496         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 497         ns->geom.totsz    = mtd->size;
 498         ns->geom.pgsz     = mtd->writesize;
 499         ns->geom.oobsz    = mtd->oobsize;
 500         ns->geom.secsz    = mtd->erasesize;
 501         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 502         ns->geom.pgnum    = divide(ns->geom.totsz, ns->geom.pgsz);
 503         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
 504         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 505         ns->geom.pgshift  = chip->page_shift;
 506         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
 507         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 508         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 509         ns->options = 0;
 510
 511         if (ns->geom.pgsz == 256) {
 512                 ns->options |= OPT_PAGE256;
 513         }
 514         else if (ns->geom.pgsz == 512) {
 515                 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
 516                 if (ns->busw == 8)
 517                         ns->options |= OPT_PAGE512_8BIT;
 518         } else if (ns->geom.pgsz == 2048) {
 519                 ns->options |= OPT_PAGE2048;
 520         } else {
 521                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 522                 return -EIO;
 523         }
 524
 525         if (ns->options & OPT_SMALLPAGE) {
 526                 if (ns->geom.totsz <= (32 << 20)) {
 527                         ns->geom.pgaddrbytes  = 3;
 528                         ns->geom.secaddrbytes = 2;
 529                 } else {
 530                         ns->geom.pgaddrbytes  = 4;
 531                         ns->geom.secaddrbytes = 3;
 532                 }
 533         } else {
 534                 if (ns->geom.totsz <= (128 << 20)) {
 535                         ns->geom.pgaddrbytes  = 4;
 536                         ns->geom.secaddrbytes = 2;
 537                 } else {
 538                         ns->geom.pgaddrbytes  = 5;
 539                         ns->geom.secaddrbytes = 3;
 540                 }
 541         }
 542
 543         /* Fill the partition_info structure */
 544         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 545                 NS_ERR("too many partitions.\n");
 546                 ret = -EINVAL;
 547                 goto error;
 548         }
 549         remains = ns->geom.totsz;
 550         next_offset = 0;
 551         for (i = 0; i < parts_num; ++i) {
 552                 u_int64_t part_sz = (u_int64_t)parts[i] * ns->geom.secsz;
 553
 554                 if (!part_sz || part_sz > remains) {
 555                         NS_ERR("bad partition size.\n");
 556                         ret = -EINVAL;
 557                         goto error;
 558                 }
 559                 ns->partitions[i].name   = get_partition_name(i);
 560                 ns->partitions[i].offset = next_offset;
 561                 ns->partitions[i].size   = part_sz;
 562                 next_offset += ns->partitions[i].size;
 563                 remains -= ns->partitions[i].size;
 564         }
 565         ns->nbparts = parts_num;
 566         if (remains) {
 567                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 568                         NS_ERR("too many partitions.\n");
 569                         ret = -EINVAL;
 570                         goto error;
 571                 }
 572                 ns->partitions[i].name   = get_partition_name(i);
 573                 ns->partitions[i].offset = next_offset;
 574                 ns->partitions[i].size   = remains;
 575                 ns->nbparts += 1;
 576         }
 577
 578         /* Detect how many ID bytes the NAND chip outputs */
 579         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 580                 if (second_id_byte != nand_flash_ids[i].id)
 581                         continue;
 582                 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
 583                         ns->options |= OPT_AUTOINCR;
 584         }
 585
 586         if (ns->busw == 16)
 587                 NS_WARN("16-bit flashes support wasn't tested\n");
 588
 589         printk("flash size: %llu MiB\n",        ns->geom.totsz >> 20);
 590         printk("page size: %u bytes\n",         ns->geom.pgsz);
 591         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 592         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 593         printk("pages number: %u\n",            ns->geom.pgnum);
 594         printk("pages per sector: %u\n",        ns->geom.pgsec);
 595         printk("bus width: %u\n",               ns->busw);
 596         printk("bits in sector size: %u\n",     ns->geom.secshift);
 597         printk("bits in page size: %u\n",       ns->geom.pgshift);
 598         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
 599         printk("flash size with OOB: %llu KiB\n", ns->geom.totszoob >> 10);
 600         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 601         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 602         printk("options: %#x\n",                ns->options);
 603
 604         if ((ret = alloc_device(ns)) != 0)
 605                 goto error;
 606
 607         /* Allocate / initialize the internal buffer */
 608         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 609         if (!ns->buf.byte) {
 610                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 611                         ns->geom.pgszoob);
 612                 ret = -ENOMEM;
 613                 goto error;
 614         }
 615         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 616
 617         return 0;
 618
 619 error:
 620         free_device(ns);
 621
 622         return ret;
 623 }
 624
 625 /*
 626  * Free the nandsim structure.
 627  */
 628 static void free_nandsim(struct nandsim *ns)
 629 {
 630         kfree(ns->buf.byte);
 631         free_device(ns);
 632
 633         return;
 634 }
 635
 636 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 637 {
 638         char *w;
 639         int zero_ok;
 640         unsigned int erase_block_no;
 641         loff_t offset;
 642
 643         if (!badblocks)
 644                 return 0;
 645         w = badblocks;
 646         do {
 647                 zero_ok = (*w == '0' ? 1 : 0);
 648                 erase_block_no = simple_strtoul(w, &w, 0);
 649                 if (!zero_ok && !erase_block_no) {
 650                         NS_ERR("invalid badblocks.\n");
 651                         return -EINVAL;
 652                 }
 653                 offset = erase_block_no * ns->geom.secsz;
 654                 if (mtd->block_markbad(mtd, offset)) {
 655                         NS_ERR("invalid badblocks.\n");
 656                         return -EINVAL;
 657                 }
 658                 if (*w == ',')
 659                         w += 1;
 660         } while (*w);
 661         return 0;
 662 }
 663
 664 static int parse_weakblocks(void)
 665 {
 666         char *w;
 667         int zero_ok;
 668         unsigned int erase_block_no;
 669         unsigned int max_erases;
 670         struct weak_block *wb;
 671
 672         if (!weakblocks)
 673                 return 0;
 674         w = weakblocks;
 675         do {
 676                 zero_ok = (*w == '0' ? 1 : 0);
 677                 erase_block_no = simple_strtoul(w, &w, 0);
 678                 if (!zero_ok && !erase_block_no) {
 679                         NS_ERR("invalid weakblocks.\n");
 680                         return -EINVAL;
 681                 }
 682                 max_erases = 3;
 683                 if (*w == ':') {
 684                         w += 1;
 685                         max_erases = simple_strtoul(w, &w, 0);
 686                 }
 687                 if (*w == ',')
 688                         w += 1;
 689                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 690                 if (!wb) {
 691                         NS_ERR("unable to allocate memory.\n");
 692                         return -ENOMEM;
 693                 }
 694                 wb->erase_block_no = erase_block_no;
 695                 wb->max_erases = max_erases;
 696                 list_add(&wb->list, &weak_blocks);
 697         } while (*w);
 698         return 0;
 699 }
 700
 701 static int erase_error(unsigned int erase_block_no)
 702 {
 703         struct weak_block *wb;
 704
 705         list_for_each_entry(wb, &weak_blocks, list)
 706                 if (wb->erase_block_no == erase_block_no) {
 707                         if (wb->erases_done >= wb->max_erases)
 708                                 return 1;
 709                         wb->erases_done += 1;
 710                         return 0;
 711                 }
 712         return 0;
 713 }
 714
 715 static int parse_weakpages(void)
 716 {
 717         char *w;
 718         int zero_ok;
 719         unsigned int page_no;
 720         unsigned int max_writes;
 721         struct weak_page *wp;
 722
 723         if (!weakpages)
 724                 return 0;
 725         w = weakpages;
 726         do {
 727                 zero_ok = (*w == '0' ? 1 : 0);
 728                 page_no = simple_strtoul(w, &w, 0);
 729                 if (!zero_ok && !page_no) {
 730                         NS_ERR("invalid weakpagess.\n");
 731                         return -EINVAL;
 732                 }
 733                 max_writes = 3;
 734                 if (*w == ':') {
 735                         w += 1;
 736                         max_writes = simple_strtoul(w, &w, 0);
 737                 }
 738                 if (*w == ',')
 739                         w += 1;
 740                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 741                 if (!wp) {
 742                         NS_ERR("unable to allocate memory.\n");
 743                         return -ENOMEM;
 744                 }
 745                 wp->page_no = page_no;
 746                 wp->max_writes = max_writes;
 747                 list_add(&wp->list, &weak_pages);
 748         } while (*w);
 749         return 0;
 750 }
 751
 752 static int write_error(unsigned int page_no)
 753 {
 754         struct weak_page *wp;
 755
 756         list_for_each_entry(wp, &weak_pages, list)
 757                 if (wp->page_no == page_no) {
 758                         if (wp->writes_done >= wp->max_writes)
 759                                 return 1;
 760                         wp->writes_done += 1;
 761                         return 0;
 762                 }
 763         return 0;
 764 }
 765
 766 static int parse_gravepages(void)
 767 {
 768         char *g;
 769         int zero_ok;
 770         unsigned int page_no;
 771         unsigned int max_reads;
 772         struct grave_page *gp;
 773
 774         if (!gravepages)
 775                 return 0;
 776         g = gravepages;
 777         do {
 778                 zero_ok = (*g == '0' ? 1 : 0);
 779                 page_no = simple_strtoul(g, &g, 0);
 780                 if (!zero_ok && !page_no) {
 781                         NS_ERR("invalid gravepagess.\n");
 782                         return -EINVAL;
 783                 }
 784                 max_reads = 3;
 785                 if (*g == ':') {
 786                         g += 1;
 787                         max_reads = simple_strtoul(g, &g, 0);
 788                 }
 789                 if (*g == ',')
 790                         g += 1;
 791                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 792                 if (!gp) {
 793                         NS_ERR("unable to allocate memory.\n");
 794                         return -ENOMEM;
 795                 }
 796                 gp->page_no = page_no;
 797                 gp->max_reads = max_reads;
 798                 list_add(&gp->list, &grave_pages);
 799         } while (*g);
 800         return 0;
 801 }
 802
 803 static int read_error(unsigned int page_no)
 804 {
 805         struct grave_page *gp;
 806
 807         list_for_each_entry(gp, &grave_pages, list)
 808                 if (gp->page_no == page_no) {
 809                         if (gp->reads_done >= gp->max_reads)
 810                                 return 1;
 811                         gp->reads_done += 1;
 812                         return 0;
 813                 }
 814         return 0;
 815 }
 816
 817 static void free_lists(void)
 818 {
 819         struct list_head *pos, *n;
 820         list_for_each_safe(pos, n, &weak_blocks) {
 821                 list_del(pos);
 822                 kfree(list_entry(pos, struct weak_block, list));
 823         }
 824         list_for_each_safe(pos, n, &weak_pages) {
 825                 list_del(pos);
 826                 kfree(list_entry(pos, struct weak_page, list));
 827         }
 828         list_for_each_safe(pos, n, &grave_pages) {
 829                 list_del(pos);
 830                 kfree(list_entry(pos, struct grave_page, list));
 831         }
 832         kfree(erase_block_wear);
 833 }
 834
 835 static int setup_wear_reporting(struct mtd_info *mtd)
 836 {
 837         size_t mem;
 838
 839         if (!rptwear)
 840                 return 0;
 841         wear_eb_count = divide(mtd->size, mtd->erasesize);
 842         mem = wear_eb_count * sizeof(unsigned long);
 843         if (mem / sizeof(unsigned long) != wear_eb_count) {
 844                 NS_ERR("Too many erase blocks for wear reporting\n");
 845                 return -ENOMEM;
 846         }
 847         erase_block_wear = kzalloc(mem, GFP_KERNEL);
 848         if (!erase_block_wear) {
 849                 NS_ERR("Too many erase blocks for wear reporting\n");
 850                 return -ENOMEM;
 851         }
 852         return 0;
 853 }
 854
 855 static void update_wear(unsigned int erase_block_no)
 856 {
 857         unsigned long wmin = -1, wmax = 0, avg;
 858         unsigned long deciles[10], decile_max[10], tot = 0;
 859         unsigned int i;
 860
 861         if (!erase_block_wear)
 862                 return;
 863         total_wear += 1;
 864         if (total_wear == 0)
 865                 NS_ERR("Erase counter total overflow\n");
 866         erase_block_wear[erase_block_no] += 1;
 867         if (erase_block_wear[erase_block_no] == 0)
 868                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
 869         rptwear_cnt += 1;
 870         if (rptwear_cnt < rptwear)
 871                 return;
 872         rptwear_cnt = 0;
 873         /* Calc wear stats */
 874         for (i = 0; i < wear_eb_count; ++i) {
 875                 unsigned long wear = erase_block_wear[i];
 876                 if (wear < wmin)
 877                         wmin = wear;
 878                 if (wear > wmax)
 879                         wmax = wear;
 880                 tot += wear;
 881         }
 882         for (i = 0; i < 9; ++i) {
 883                 deciles[i] = 0;
 884                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
 885         }
 886         deciles[9] = 0;
 887         decile_max[9] = wmax;
 888         for (i = 0; i < wear_eb_count; ++i) {
 889                 int d;
 890                 unsigned long wear = erase_block_wear[i];
 891                 for (d = 0; d < 10; ++d)
 892                         if (wear <= decile_max[d]) {
 893                                 deciles[d] += 1;
 894                                 break;
 895                         }
 896         }
 897         avg = tot / wear_eb_count;
 898         /* Output wear report */
 899         NS_INFO("*** Wear Report ***\n");
 900         NS_INFO("Total numbers of erases:  %lu\n", tot);
 901         NS_INFO("Number of erase blocks:   %u\n", wear_eb_count);
 902         NS_INFO("Average number of erases: %lu\n", avg);
 903         NS_INFO("Maximum number of erases: %lu\n", wmax);
 904         NS_INFO("Minimum number of erases: %lu\n", wmin);
 905         for (i = 0; i < 10; ++i) {
 906                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
 907                 if (from > decile_max[i])
 908                         continue;
 909                 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
 910                         from,
 911                         decile_max[i],
 912                         deciles[i]);
 913         }
 914         NS_INFO("*** End of Wear Report ***\n");
 915 }
 916
 917 /*
 918  * Returns the string representation of 'state' state.
 919  */
 920 static char *get_state_name(uint32_t state)
 921 {
 922         switch (NS_STATE(state)) {
 923                 case STATE_CMD_READ0:
 924                         return "STATE_CMD_READ0";
 925                 case STATE_CMD_READ1:
 926                         return "STATE_CMD_READ1";
 927                 case STATE_CMD_PAGEPROG:
 928                         return "STATE_CMD_PAGEPROG";
 929                 case STATE_CMD_READOOB:
 930                         return "STATE_CMD_READOOB";
 931                 case STATE_CMD_READSTART:
 932                         return "STATE_CMD_READSTART";
 933                 case STATE_CMD_ERASE1:
 934                         return "STATE_CMD_ERASE1";
 935                 case STATE_CMD_STATUS:
 936                         return "STATE_CMD_STATUS";
 937                 case STATE_CMD_STATUS_M:
 938                         return "STATE_CMD_STATUS_M";
 939                 case STATE_CMD_SEQIN:
 940                         return "STATE_CMD_SEQIN";
 941                 case STATE_CMD_READID:
 942                         return "STATE_CMD_READID";
 943                 case STATE_CMD_ERASE2:
 944                         return "STATE_CMD_ERASE2";
 945                 case STATE_CMD_RESET:
 946                         return "STATE_CMD_RESET";
 947                 case STATE_CMD_RNDOUT:
 948                         return "STATE_CMD_RNDOUT";
 949                 case STATE_CMD_RNDOUTSTART:
 950                         return "STATE_CMD_RNDOUTSTART";
 951                 case STATE_ADDR_PAGE:
 952                         return "STATE_ADDR_PAGE";
 953                 case STATE_ADDR_SEC:
 954                         return "STATE_ADDR_SEC";
 955                 case STATE_ADDR_ZERO:
 956                         return "STATE_ADDR_ZERO";
 957                 case STATE_ADDR_COLUMN:
 958                         return "STATE_ADDR_COLUMN";
 959                 case STATE_DATAIN:
 960                         return "STATE_DATAIN";
 961                 case STATE_DATAOUT:
 962                         return "STATE_DATAOUT";
 963                 case STATE_DATAOUT_ID:
 964                         return "STATE_DATAOUT_ID";
 965                 case STATE_DATAOUT_STATUS:
 966                         return "STATE_DATAOUT_STATUS";
 967                 case STATE_DATAOUT_STATUS_M:
 968                         return "STATE_DATAOUT_STATUS_M";
 969                 case STATE_READY:
 970                         return "STATE_READY";
 971                 case STATE_UNKNOWN:
 972                         return "STATE_UNKNOWN";
 973         }
 974
 975         NS_ERR("get_state_name: unknown state, BUG\n");
 976         return NULL;
 977 }
 978
 979 /*
 980  * Check if command is valid.
 981  *
 982  * RETURNS: 1 if wrong command, 0 if right.
 983  */
 984 static int check_command(int cmd)
 985 {
 986         switch (cmd) {
 987
 988         case NAND_CMD_READ0:
 989         case NAND_CMD_READ1:
 990         case NAND_CMD_READSTART:
 991         case NAND_CMD_PAGEPROG:
 992         case NAND_CMD_READOOB:
 993         case NAND_CMD_ERASE1:
 994         case NAND_CMD_STATUS:
 995         case NAND_CMD_SEQIN:
 996         case NAND_CMD_READID:
 997         case NAND_CMD_ERASE2:
 998         case NAND_CMD_RESET:
 999         case NAND_CMD_RNDOUT:
1000         case NAND_CMD_RNDOUTSTART:
1001                 return 0;
1002
1003         case NAND_CMD_STATUS_MULTI:
1004         default:
1005                 return 1;
1006         }
1007 }
1008
1009 /*
1010  * Returns state after command is accepted by command number.
1011  */
1012 static uint32_t get_state_by_command(unsigned command)
1013 {
1014         switch (command) {
1015                 case NAND_CMD_READ0:
1016                         return STATE_CMD_READ0;
1017                 case NAND_CMD_READ1:
1018                         return STATE_CMD_READ1;
1019                 case NAND_CMD_PAGEPROG:
1020                         return STATE_CMD_PAGEPROG;
1021                 case NAND_CMD_READSTART:
1022                         return STATE_CMD_READSTART;
1023                 case NAND_CMD_READOOB:
1024                         return STATE_CMD_READOOB;
1025                 case NAND_CMD_ERASE1:
1026                         return STATE_CMD_ERASE1;
1027                 case NAND_CMD_STATUS:
1028                         return STATE_CMD_STATUS;
1029                 case NAND_CMD_STATUS_MULTI:
1030                         return STATE_CMD_STATUS_M;
1031                 case NAND_CMD_SEQIN:
1032                         return STATE_CMD_SEQIN;
1033                 case NAND_CMD_READID:
1034                         return STATE_CMD_READID;
1035                 case NAND_CMD_ERASE2:
1036                         return STATE_CMD_ERASE2;
1037                 case NAND_CMD_RESET:
1038                         return STATE_CMD_RESET;
1039                 case NAND_CMD_RNDOUT:
1040                         return STATE_CMD_RNDOUT;
1041                 case NAND_CMD_RNDOUTSTART:
1042                         return STATE_CMD_RNDOUTSTART;
1043         }
1044
1045         NS_ERR("get_state_by_command: unknown command, BUG\n");
1046         return 0;
1047 }
1048
1049 /*
1050  * Move an address byte to the correspondent internal register.
1051  */
1052 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1053 {
1054         uint byte = (uint)bt;
1055
1056         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1057                 ns->regs.column |= (byte << 8 * ns->regs.count);
1058         else {
1059                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1060                                                 ns->geom.pgaddrbytes +
1061                                                 ns->geom.secaddrbytes));
1062         }
1063
1064         return;
1065 }
1066
1067 /*
1068  * Switch to STATE_READY state.
1069  */
1070 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1071 {
1072         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1073
1074         ns->state       = STATE_READY;
1075         ns->nxstate     = STATE_UNKNOWN;
1076         ns->op          = NULL;
1077         ns->npstates    = 0;
1078         ns->stateidx    = 0;
1079         ns->regs.num    = 0;
1080         ns->regs.count  = 0;
1081         ns->regs.off    = 0;
1082         ns->regs.row    = 0;
1083         ns->regs.column = 0;
1084         ns->regs.status = status;
1085 }
1086
1087 /*
1088  * If the operation isn't known yet, try to find it in the global array
1089  * of supported operations.
1090  *
1091  * Operation can be unknown because of the following.
1092  *   1. New command was accepted and this is the firs call to find the
1093  *      correspondent states chain. In this case ns->npstates = 0;
1094  *   2. There is several operations which begin with the same command(s)
1095  *      (for example program from the second half and read from the
1096  *      second half operations both begin with the READ1 command). In this
1097  *      case the ns->pstates[] array contains previous states.
1098  *
1099  * Thus, the function tries to find operation containing the following
1100  * states (if the 'flag' parameter is 0):
1101  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1102  *
1103  * If (one and only one) matching operation is found, it is accepted (
1104  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1105  * zeroed).
1106  *
1107  * If there are several maches, the current state is pushed to the
1108  * ns->pstates.
1109  *
1110  * The operation can be unknown only while commands are input to the chip.
1111  * As soon as address command is accepted, the operation must be known.
1112  * In such situation the function is called with 'flag' != 0, and the
1113  * operation is searched using the following pattern:
1114  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1115  *
1116  * It is supposed that this pattern must either match one operation on
1117  * none. There can't be ambiguity in that case.
1118  *
1119  * If no matches found, the functions does the following:
1120  *   1. if there are saved states present, try to ignore them and search
1121  *      again only using the last command. If nothing was found, switch
1122  *      to the STATE_READY state.
1123  *   2. if there are no saved states, switch to the STATE_READY state.
1124  *
1125  * RETURNS: -2 - no matched operations found.
1126  *          -1 - several matches.
1127  *           0 - operation is found.
1128  */
1129 static int find_operation(struct nandsim *ns, uint32_t flag)
1130 {
1131         int opsfound = 0;
1132         int i, j, idx = 0;
1133
1134         for (i = 0; i < NS_OPER_NUM; i++) {
1135
1136                 int found = 1;
1137
1138                 if (!(ns->options & ops[i].reqopts))
1139                         /* Ignore operations we can't perform */
1140                         continue;
1141
1142                 if (flag) {
1143                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1144                                 continue;
1145                 } else {
1146                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1147                                 continue;
1148                 }
1149
1150                 for (j = 0; j < ns->npstates; j++)
1151                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1152                                 && (ns->options & ops[idx].reqopts)) {
1153                                 found = 0;
1154                                 break;
1155                         }
1156
1157                 if (found) {
1158                         idx = i;
1159                         opsfound += 1;
1160                 }
1161         }
1162
1163         if (opsfound == 1) {
1164                 /* Exact match */
1165                 ns->op = &ops[idx].states[0];
1166                 if (flag) {
1167                         /*
1168                          * In this case the find_operation function was
1169                          * called when address has just began input. But it isn't
1170                          * yet fully input and the current state must
1171                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1172                          * state must be the next state (ns->nxstate).
1173                          */
1174                         ns->stateidx = ns->npstates - 1;
1175                 } else {
1176                         ns->stateidx = ns->npstates;
1177                 }
1178                 ns->npstates = 0;
1179                 ns->state = ns->op[ns->stateidx];
1180                 ns->nxstate = ns->op[ns->stateidx + 1];
1181                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1182                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1183                 return 0;
1184         }
1185
1186         if (opsfound == 0) {
1187                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1188                 if (ns->npstates != 0) {
1189                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1190                                         get_state_name(ns->state));
1191                         ns->npstates = 0;
1192                         return find_operation(ns, 0);
1193
1194                 }
1195                 NS_DBG("find_operation: no operations found\n");
1196                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1197                 return -2;
1198         }
1199
1200         if (flag) {
1201                 /* This shouldn't happen */
1202                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1203                 return -2;
1204         }
1205
1206         NS_DBG("find_operation: there is still ambiguity\n");
1207
1208         ns->pstates[ns->npstates++] = ns->state;
1209
1210         return -1;
1211 }
1212
1213 /*
1214  * Returns a pointer to the current page.
1215  */
1216 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1217 {
1218         return &(ns->pages[ns->regs.row]);
1219 }
1220
1221 /*
1222  * Retuns a pointer to the current byte, within the current page.
1223  */
1224 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1225 {
1226         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1227 }
1228
1229 /*
1230  * Fill the NAND buffer with data read from the specified page.
1231  */
1232 static void read_page(struct nandsim *ns, int num)
1233 {
1234         union ns_mem *mypage;
1235
1236         mypage = NS_GET_PAGE(ns);
1237         if (mypage->byte == NULL) {
1238                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1239                 memset(ns->buf.byte, 0xFF, num);
1240         } else {
1241                 unsigned int page_no = ns->regs.row;
1242                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1243                         ns->regs.row, ns->regs.column + ns->regs.off);
1244                 if (read_error(page_no)) {
1245                         int i;
1246                         memset(ns->buf.byte, 0xFF, num);
1247                         for (i = 0; i < num; ++i)
1248                                 ns->buf.byte[i] = random32();
1249                         NS_WARN("simulating read error in page %u\n", page_no);
1250                         return;
1251                 }
1252                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1253                 if (bitflips && random32() < (1 << 22)) {
1254                         int flips = 1;
1255                         if (bitflips > 1)
1256                                 flips = (random32() % (int) bitflips) + 1;
1257                         while (flips--) {
1258                                 int pos = random32() % (num * 8);
1259                                 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1260                                 NS_WARN("read_page: flipping bit %d in page %d "
1261                                         "reading from %d ecc: corrected=%u failed=%u\n",
1262                                         pos, ns->regs.row, ns->regs.column + ns->regs.off,
1263                                         nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1264                         }
1265                 }
1266         }
1267 }
1268
1269 /*
1270  * Erase all pages in the specified sector.
1271  */
1272 static void erase_sector(struct nandsim *ns)
1273 {
1274         union ns_mem *mypage;
1275         int i;
1276
1277         mypage = NS_GET_PAGE(ns);
1278         for (i = 0; i < ns->geom.pgsec; i++) {
1279                 if (mypage->byte != NULL) {
1280                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1281                         kfree(mypage->byte);
1282                         mypage->byte = NULL;
1283                 }
1284                 mypage++;
1285         }
1286 }
1287
1288 /*
1289  * Program the specified page with the contents from the NAND buffer.
1290  */
1291 static int prog_page(struct nandsim *ns, int num)
1292 {
1293         int i;
1294         union ns_mem *mypage;
1295         u_char *pg_off;
1296
1297         mypage = NS_GET_PAGE(ns);
1298         if (mypage->byte == NULL) {
1299                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1300                 /*
1301                  * We allocate memory with GFP_NOFS because a flash FS may
1302                  * utilize this. If it is holding an FS lock, then gets here,
1303                  * then kmalloc runs writeback which goes to the FS again
1304                  * and deadlocks. This was seen in practice.
1305                  */
1306                 mypage->byte = kmalloc(ns->geom.pgszoob, GFP_NOFS);
1307                 if (mypage->byte == NULL) {
1308                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1309                         return -1;
1310                 }
1311                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1312         }
1313
1314         pg_off = NS_PAGE_BYTE_OFF(ns);
1315         for (i = 0; i < num; i++)
1316                 pg_off[i] &= ns->buf.byte[i];
1317
1318         return 0;
1319 }
1320
1321 /*
1322  * If state has any action bit, perform this action.
1323  *
1324  * RETURNS: 0 if success, -1 if error.
1325  */
1326 static int do_state_action(struct nandsim *ns, uint32_t action)
1327 {
1328         int num;
1329         int busdiv = ns->busw == 8 ? 1 : 2;
1330         unsigned int erase_block_no, page_no;
1331
1332         action &= ACTION_MASK;
1333
1334         /* Check that page address input is correct */
1335         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1336                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1337                 return -1;
1338         }
1339
1340         switch (action) {
1341
1342         case ACTION_CPY:
1343                 /*
1344                  * Copy page data to the internal buffer.
1345                  */
1346
1347                 /* Column shouldn't be very large */
1348                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1349                         NS_ERR("do_state_action: column number is too large\n");
1350                         break;
1351                 }
1352                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1353                 read_page(ns, num);
1354
1355                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1356                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1357
1358                 if (ns->regs.off == 0)
1359                         NS_LOG("read page %d\n", ns->regs.row);
1360                 else if (ns->regs.off < ns->geom.pgsz)
1361                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1362                 else
1363                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1364
1365                 NS_UDELAY(access_delay);
1366                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1367
1368                 break;
1369
1370         case ACTION_SECERASE:
1371                 /*
1372                  * Erase sector.
1373                  */
1374
1375                 if (ns->lines.wp) {
1376                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1377                         return -1;
1378                 }
1379
1380                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1381                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1382                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1383                         return -1;
1384                 }
1385
1386                 ns->regs.row = (ns->regs.row <<
1387                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1388                 ns->regs.column = 0;
1389
1390                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1391
1392                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1393                                 ns->regs.row, NS_RAW_OFFSET(ns));
1394                 NS_LOG("erase sector %u\n", erase_block_no);
1395
1396                 erase_sector(ns);
1397
1398                 NS_MDELAY(erase_delay);
1399
1400                 if (erase_block_wear)
1401                         update_wear(erase_block_no);
1402
1403                 if (erase_error(erase_block_no)) {
1404                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1405                         return -1;
1406                 }
1407
1408                 break;
1409
1410         case ACTION_PRGPAGE:
1411                 /*
1412                  * Programm page - move internal buffer data to the page.
1413                  */
1414
1415                 if (ns->lines.wp) {
1416                         NS_WARN("do_state_action: device is write-protected, programm\n");
1417                         return -1;
1418                 }
1419
1420                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1421                 if (num != ns->regs.count) {
1422                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1423                                         ns->regs.count, num);
1424                         return -1;
1425                 }
1426
1427                 if (prog_page(ns, num) == -1)
1428                         return -1;
1429
1430                 page_no = ns->regs.row;
1431
1432                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1433                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1434                 NS_LOG("programm page %d\n", ns->regs.row);
1435
1436                 NS_UDELAY(programm_delay);
1437                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1438
1439                 if (write_error(page_no)) {
1440                         NS_WARN("simulating write failure in page %u\n", page_no);
1441                         return -1;
1442                 }
1443
1444                 break;
1445
1446         case ACTION_ZEROOFF:
1447                 NS_DBG("do_state_action: set internal offset to 0\n");
1448                 ns->regs.off = 0;
1449                 break;
1450
1451         case ACTION_HALFOFF:
1452                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1453                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1454                                 "byte page size 8x chips\n");
1455                         return -1;
1456                 }
1457                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1458                 ns->regs.off = ns->geom.pgsz/2;
1459                 break;
1460
1461         case ACTION_OOBOFF:
1462                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1463                 ns->regs.off = ns->geom.pgsz;
1464                 break;
1465
1466         default:
1467                 NS_DBG("do_state_action: BUG! unknown action\n");
1468         }
1469
1470         return 0;
1471 }
1472
1473 /*
1474  * Switch simulator's state.
1475  */
1476 static void switch_state(struct nandsim *ns)
1477 {
1478         if (ns->op) {
1479                 /*
1480                  * The current operation have already been identified.
1481                  * Just follow the states chain.
1482                  */
1483
1484                 ns->stateidx += 1;
1485                 ns->state = ns->nxstate;
1486                 ns->nxstate = ns->op[ns->stateidx + 1];
1487
1488                 NS_DBG("switch_state: operation is known, switch to the next state, "
1489                         "state: %s, nxstate: %s\n",
1490                         get_state_name(ns->state), get_state_name(ns->nxstate));
1491
1492                 /* See, whether we need to do some action */
1493                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1494                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1495                         return;
1496                 }
1497
1498         } else {
1499                 /*
1500                  * We don't yet know which operation we perform.
1501                  * Try to identify it.
1502                  */
1503
1504                 /*
1505                  *  The only event causing the switch_state function to
1506                  *  be called with yet unknown operation is new command.
1507                  */
1508                 ns->state = get_state_by_command(ns->regs.command);
1509
1510                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1511
1512                 if (find_operation(ns, 0) != 0)
1513                         return;
1514
1515                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1516                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1517                         return;
1518                 }
1519         }
1520
1521         /* For 16x devices column means the page offset in words */
1522         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1523                 NS_DBG("switch_state: double the column number for 16x device\n");
1524                 ns->regs.column <<= 1;
1525         }
1526
1527         if (NS_STATE(ns->nxstate) == STATE_READY) {
1528                 /*
1529                  * The current state is the last. Return to STATE_READY
1530                  */
1531
1532                 u_char status = NS_STATUS_OK(ns);
1533
1534                 /* In case of data states, see if all bytes were input/output */
1535                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1536                         && ns->regs.count != ns->regs.num) {
1537                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1538                                         ns->regs.num - ns->regs.count);
1539                         status = NS_STATUS_FAILED(ns);
1540                 }
1541
1542                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1543
1544                 switch_to_ready_state(ns, status);
1545
1546                 return;
1547         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1548                 /*
1549                  * If the next state is data input/output, switch to it now
1550                  */
1551
1552                 ns->state      = ns->nxstate;
1553                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1554                 ns->regs.num   = ns->regs.count = 0;
1555
1556                 NS_DBG("switch_state: the next state is data I/O, switch, "
1557                         "state: %s, nxstate: %s\n",
1558                         get_state_name(ns->state), get_state_name(ns->nxstate));
1559
1560                 /*
1561                  * Set the internal register to the count of bytes which
1562                  * are expected to be input or output
1563                  */
1564                 switch (NS_STATE(ns->state)) {
1565                         case STATE_DATAIN:
1566                         case STATE_DATAOUT:
1567                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1568                                 break;
1569
1570                         case STATE_DATAOUT_ID:
1571                                 ns->regs.num = ns->geom.idbytes;
1572                                 break;
1573
1574                         case STATE_DATAOUT_STATUS:
1575                         case STATE_DATAOUT_STATUS_M:
1576                                 ns->regs.count = ns->regs.num = 0;
1577                                 break;
1578
1579                         default:
1580                                 NS_ERR("switch_state: BUG! unknown data state\n");
1581                 }
1582
1583         } else if (ns->nxstate & STATE_ADDR_MASK) {
1584                 /*
1585                  * If the next state is address input, set the internal
1586                  * register to the number of expected address bytes
1587                  */
1588
1589                 ns->regs.count = 0;
1590
1591                 switch (NS_STATE(ns->nxstate)) {
1592                         case STATE_ADDR_PAGE:
1593                                 ns->regs.num = ns->geom.pgaddrbytes;
1594
1595                                 break;
1596                         case STATE_ADDR_SEC:
1597                                 ns->regs.num = ns->geom.secaddrbytes;
1598                                 break;
1599
1600                         case STATE_ADDR_ZERO:
1601                                 ns->regs.num = 1;
1602                                 break;
1603
1604                         case STATE_ADDR_COLUMN:
1605                                 /* Column address is always 2 bytes */
1606                                 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1607                                 break;
1608
1609                         default:
1610                                 NS_ERR("switch_state: BUG! unknown address state\n");
1611                 }
1612         } else {
1613                 /*
1614                  * Just reset internal counters.
1615                  */
1616
1617                 ns->regs.num = 0;
1618                 ns->regs.count = 0;
1619         }
1620 }
1621
1622 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1623 {
1624         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1625         u_char outb = 0x00;
1626
1627         /* Sanity and correctness checks */
1628         if (!ns->lines.ce) {
1629                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1630                 return outb;
1631         }
1632         if (ns->lines.ale || ns->lines.cle) {
1633                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1634                 return outb;
1635         }
1636         if (!(ns->state & STATE_DATAOUT_MASK)) {
1637                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1638                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1639                 return outb;
1640         }
1641
1642         /* Status register may be read as many times as it is wanted */
1643         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1644                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1645                 return ns->regs.status;
1646         }
1647
1648         /* Check if there is any data in the internal buffer which may be read */
1649         if (ns->regs.count == ns->regs.num) {
1650                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1651                 return outb;
1652         }
1653
1654         switch (NS_STATE(ns->state)) {
1655                 case STATE_DATAOUT:
1656                         if (ns->busw == 8) {
1657                                 outb = ns->buf.byte[ns->regs.count];
1658                                 ns->regs.count += 1;
1659                         } else {
1660                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1661                                 ns->regs.count += 2;
1662                         }
1663                         break;
1664                 case STATE_DATAOUT_ID:
1665                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1666                         outb = ns->ids[ns->regs.count];
1667                         ns->regs.count += 1;
1668                         break;
1669                 default:
1670                         BUG();
1671         }
1672
1673         if (ns->regs.count == ns->regs.num) {
1674                 NS_DBG("read_byte: all bytes were read\n");
1675
1676                 /*
1677                  * The OPT_AUTOINCR allows to read next conseqitive pages without
1678                  * new read operation cycle.
1679                  */
1680                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1681                         ns->regs.count = 0;
1682                         if (ns->regs.row + 1 < ns->geom.pgnum)
1683                                 ns->regs.row += 1;
1684                         NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1685                         do_state_action(ns, ACTION_CPY);
1686                 }
1687                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1688                         switch_state(ns);
1689
1690         }
1691
1692         return outb;
1693 }
1694
1695 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1696 {
1697         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1698
1699         /* Sanity and correctness checks */
1700         if (!ns->lines.ce) {
1701                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1702                 return;
1703         }
1704         if (ns->lines.ale && ns->lines.cle) {
1705                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1706                 return;
1707         }
1708
1709         if (ns->lines.cle == 1) {
1710                 /*
1711                  * The byte written is a command.
1712                  */
1713
1714                 if (byte == NAND_CMD_RESET) {
1715                         NS_LOG("reset chip\n");
1716                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1717                         return;
1718                 }
1719
1720                 /* Check that the command byte is correct */
1721                 if (check_command(byte)) {
1722                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1723                         return;
1724                 }
1725
1726                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1727                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1728                         || NS_STATE(ns->state) == STATE_DATAOUT) {
1729                         int row = ns->regs.row;
1730
1731                         switch_state(ns);
1732                         if (byte == NAND_CMD_RNDOUT)
1733                                 ns->regs.row = row;
1734                 }
1735
1736                 /* Check if chip is expecting command */
1737                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1738                         /*
1739                          * We are in situation when something else (not command)
1740                          * was expected but command was input. In this case ignore
1741                          * previous command(s)/state(s) and accept the last one.
1742                          */
1743                         NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1744                                 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1745                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1746                 }
1747
1748                 NS_DBG("command byte corresponding to %s state accepted\n",
1749                         get_state_name(get_state_by_command(byte)));
1750                 ns->regs.command = byte;
1751                 switch_state(ns);
1752
1753         } else if (ns->lines.ale == 1) {
1754                 /*
1755                  * The byte written is an address.
1756                  */
1757
1758                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
1759
1760                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
1761
1762                         if (find_operation(ns, 1) < 0)
1763                                 return;
1764
1765                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1766                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1767                                 return;
1768                         }
1769
1770                         ns->regs.count = 0;
1771                         switch (NS_STATE(ns->nxstate)) {
1772                                 case STATE_ADDR_PAGE:
1773                                         ns->regs.num = ns->geom.pgaddrbytes;
1774                                         break;
1775                                 case STATE_ADDR_SEC:
1776                                         ns->regs.num = ns->geom.secaddrbytes;
1777                                         break;
1778                                 case STATE_ADDR_ZERO:
1779                                         ns->regs.num = 1;
1780                                         break;
1781                                 default:
1782                                         BUG();
1783                         }
1784                 }
1785
1786                 /* Check that chip is expecting address */
1787                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
1788                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
1789                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
1790                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1791                         return;
1792                 }
1793
1794                 /* Check if this is expected byte */
1795                 if (ns->regs.count == ns->regs.num) {
1796                         NS_ERR("write_byte: no more address bytes expected\n");
1797                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1798                         return;
1799                 }
1800
1801                 accept_addr_byte(ns, byte);
1802
1803                 ns->regs.count += 1;
1804
1805                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
1806                                 (uint)byte, ns->regs.count, ns->regs.num);
1807
1808                 if (ns->regs.count == ns->regs.num) {
1809                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
1810                         switch_state(ns);
1811                 }
1812
1813         } else {
1814                 /*
1815                  * The byte written is an input data.
1816                  */
1817
1818                 /* Check that chip is expecting data input */
1819                 if (!(ns->state & STATE_DATAIN_MASK)) {
1820                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
1821                                 "switch to %s\n", (uint)byte,
1822                                 get_state_name(ns->state), get_state_name(STATE_READY));
1823                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1824                         return;
1825                 }
1826
1827                 /* Check if this is expected byte */
1828                 if (ns->regs.count == ns->regs.num) {
1829                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
1830                                         ns->regs.num);
1831                         return;
1832                 }
1833
1834                 if (ns->busw == 8) {
1835                         ns->buf.byte[ns->regs.count] = byte;
1836                         ns->regs.count += 1;
1837                 } else {
1838                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
1839                         ns->regs.count += 2;
1840                 }
1841         }
1842
1843         return;
1844 }
1845
1846 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
1847 {
1848         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1849
1850         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
1851         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
1852         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
1853
1854         if (cmd != NAND_CMD_NONE)
1855                 ns_nand_write_byte(mtd, cmd);
1856 }
1857
1858 static int ns_device_ready(struct mtd_info *mtd)
1859 {
1860         NS_DBG("device_ready\n");
1861         return 1;
1862 }
1863
1864 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
1865 {
1866         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
1867
1868         NS_DBG("read_word\n");
1869
1870         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
1871 }
1872
1873 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
1874 {
1875         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1876
1877         /* Check that chip is expecting data input */
1878         if (!(ns->state & STATE_DATAIN_MASK)) {
1879                 NS_ERR("write_buf: data input isn't expected, state is %s, "
1880                         "switch to STATE_READY\n", get_state_name(ns->state));
1881                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1882                 return;
1883         }
1884
1885         /* Check if these are expected bytes */
1886         if (ns->regs.count + len > ns->regs.num) {
1887                 NS_ERR("write_buf: too many input bytes\n");
1888                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1889                 return;
1890         }
1891
1892         memcpy(ns->buf.byte + ns->regs.count, buf, len);
1893         ns->regs.count += len;
1894
1895         if (ns->regs.count == ns->regs.num) {
1896                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
1897         }
1898 }
1899
1900 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
1901 {
1902         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1903
1904         /* Sanity and correctness checks */
1905         if (!ns->lines.ce) {
1906                 NS_ERR("read_buf: chip is disabled\n");
1907                 return;
1908         }
1909         if (ns->lines.ale || ns->lines.cle) {
1910                 NS_ERR("read_buf: ALE or CLE pin is high\n");
1911                 return;
1912         }
1913         if (!(ns->state & STATE_DATAOUT_MASK)) {
1914                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
1915                         get_state_name(ns->state));
1916                 return;
1917         }
1918
1919         if (NS_STATE(ns->state) != STATE_DATAOUT) {
1920                 int i;
1921
1922                 for (i = 0; i < len; i++)
1923                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
1924
1925                 return;
1926         }
1927
1928         /* Check if these are expected bytes */
1929         if (ns->regs.count + len > ns->regs.num) {
1930                 NS_ERR("read_buf: too many bytes to read\n");
1931                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1932                 return;
1933         }
1934
1935         memcpy(buf, ns->buf.byte + ns->regs.count, len);
1936         ns->regs.count += len;
1937
1938         if (ns->regs.count == ns->regs.num) {
1939                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1940                         ns->regs.count = 0;
1941                         if (ns->regs.row + 1 < ns->geom.pgnum)
1942                                 ns->regs.row += 1;
1943                         NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
1944                         do_state_action(ns, ACTION_CPY);
1945                 }
1946                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1947                         switch_state(ns);
1948         }
1949
1950         return;
1951 }
1952
1953 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
1954 {
1955         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
1956
1957         if (!memcmp(buf, &ns_verify_buf[0], len)) {
1958                 NS_DBG("verify_buf: the buffer is OK\n");
1959                 return 0;
1960         } else {
1961                 NS_DBG("verify_buf: the buffer is wrong\n");
1962                 return -EFAULT;
1963         }
1964 }
1965
1966 /*
1967  * Module initialization function
1968  */
1969 static int __init ns_init_module(void)
1970 {
1971         struct nand_chip *chip;
1972         struct nandsim *nand;
1973         int retval = -ENOMEM, i;
1974
1975         if (bus_width != 8 && bus_width != 16) {
1976                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
1977                 return -EINVAL;
1978         }
1979
1980         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
1981         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
1982                                 + sizeof(struct nandsim), GFP_KERNEL);
1983         if (!nsmtd) {
1984                 NS_ERR("unable to allocate core structures.\n");
1985                 return -ENOMEM;
1986         }
1987         chip        = (struct nand_chip *)(nsmtd + 1);
1988         nsmtd->priv = (void *)chip;
1989         nand        = (struct nandsim *)(chip + 1);
1990         chip->priv  = (void *)nand;
1991
1992         /*
1993          * Register simulator's callbacks.
1994          */
1995         chip->cmd_ctrl   = ns_hwcontrol;
1996         chip->read_byte  = ns_nand_read_byte;
1997         chip->dev_ready  = ns_device_ready;
1998         chip->write_buf  = ns_nand_write_buf;
1999         chip->read_buf   = ns_nand_read_buf;
2000         chip->verify_buf = ns_nand_verify_buf;
2001         chip->read_word  = ns_nand_read_word;
2002         chip->ecc.mode   = NAND_ECC_SOFT;
2003         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2004         /* and 'badblocks' parameters to work */
2005         chip->options   |= NAND_SKIP_BBTSCAN;
2006
2007         /*
2008          * Perform minimum nandsim structure initialization to handle
2009          * the initial ID read command correctly
2010          */
2011         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2012                 nand->geom.idbytes = 4;
2013         else
2014                 nand->geom.idbytes = 2;
2015         nand->regs.status = NS_STATUS_OK(nand);
2016         nand->nxstate = STATE_UNKNOWN;
2017         nand->options |= OPT_PAGE256; /* temporary value */
2018         nand->ids[0] = first_id_byte;
2019         nand->ids[1] = second_id_byte;
2020         nand->ids[2] = third_id_byte;
2021         nand->ids[3] = fourth_id_byte;
2022         if (bus_width == 16) {
2023                 nand->busw = 16;
2024                 chip->options |= NAND_BUSWIDTH_16;
2025         }
2026
2027         nsmtd->owner = THIS_MODULE;
2028
2029         if ((retval = parse_weakblocks()) != 0)
2030                 goto error;
2031
2032         if ((retval = parse_weakpages()) != 0)
2033                 goto error;
2034
2035         if ((retval = parse_gravepages()) != 0)
2036                 goto error;
2037
2038         if ((retval = nand_scan(nsmtd, 1)) != 0) {
2039                 NS_ERR("can't register NAND Simulator\n");
2040                 if (retval > 0)
2041                         retval = -ENXIO;
2042                 goto error;
2043         }
2044
2045         if (overridesize) {
2046                 u_int64_t new_size = (u_int64_t)nsmtd->erasesize << overridesize;
2047                 if (new_size >> overridesize != nsmtd->erasesize) {
2048                         NS_ERR("overridesize is too big\n");
2049                         goto err_exit;
2050                 }
2051                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2052                 nsmtd->size = new_size;
2053                 chip->chipsize = new_size;
2054                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2055                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2056         }
2057
2058         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2059                 goto err_exit;
2060
2061         if ((retval = init_nandsim(nsmtd)) != 0)
2062                 goto err_exit;
2063
2064         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2065                 goto err_exit;
2066
2067         if ((retval = nand_default_bbt(nsmtd)) != 0)
2068                 goto err_exit;
2069
2070         /* Register NAND partitions */
2071         if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2072                 goto err_exit;
2073
2074         return 0;
2075
2076 err_exit:
2077         free_nandsim(nand);
2078         nand_release(nsmtd);
2079         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2080                 kfree(nand->partitions[i].name);
2081 error:
2082         kfree(nsmtd);
2083         free_lists();
2084
2085         return retval;
2086 }
2087
2088 module_init(ns_init_module);
2089
2090 /*
2091  * Module clean-up function
2092  */
2093 static void __exit ns_cleanup_module(void)
2094 {
2095         struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
2096         int i;
2097
2098         free_nandsim(ns);    /* Free nandsim private resources */
2099         nand_release(nsmtd); /* Unregister driver */
2100         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2101                 kfree(ns->partitions[i].name);
2102         kfree(nsmtd);        /* Free other structures */
2103         free_lists();
2104 }
2105
2106 module_exit(ns_cleanup_module);
2107
2108 MODULE_LICENSE ("GPL");
2109 MODULE_AUTHOR ("Artem B. Bityuckiy");
2110 MODULE_DESCRIPTION ("The NAND flash simulator");