drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  *
  25  * $Id: nandsim.c,v 1.8 2005/03/19 15:33:56 dedekind Exp $
  26  */
  27
  28 #include <linux/init.h>
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/moduleparam.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/slab.h>
  34 #include <linux/errno.h>
  35 #include <linux/string.h>
  36 #include <linux/mtd/mtd.h>
  37 #include <linux/mtd/nand.h>
  38 #include <linux/mtd/partitions.h>
  39 #include <linux/delay.h>
  40 #include <linux/list.h>
  41 #include <linux/random.h>
  42
  43 /* Default simulator parameters values */
  44 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  45     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  46     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  47     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  48 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  49 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  50 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  51 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  52 #endif
  53
  54 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  55 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  56 #endif
  57 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  58 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  59 #endif
  60 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  61 #define CONFIG_NANDSIM_ERASE_DELAY 2
  62 #endif
  63 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  64 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  65 #endif
  66 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  67 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  68 #endif
  69 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  70 #define CONFIG_NANDSIM_BUS_WIDTH  8
  71 #endif
  72 #ifndef CONFIG_NANDSIM_DO_DELAYS
  73 #define CONFIG_NANDSIM_DO_DELAYS  0
  74 #endif
  75 #ifndef CONFIG_NANDSIM_LOG
  76 #define CONFIG_NANDSIM_LOG        0
  77 #endif
  78 #ifndef CONFIG_NANDSIM_DBG
  79 #define CONFIG_NANDSIM_DBG        0
  80 #endif
  81
  82 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
  83 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
  84 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
  85 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
  86 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  87 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  88 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  89 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  90 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  91 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  92 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  93 static uint log            = CONFIG_NANDSIM_LOG;
  94 static uint dbg            = CONFIG_NANDSIM_DBG;
  95 static unsigned long parts[MAX_MTD_DEVICES];
  96 static unsigned int parts_num;
  97 static char *badblocks = NULL;
  98 static char *weakblocks = NULL;
  99 static char *weakpages = NULL;
 100 static unsigned int bitflips = 0;
 101 static char *gravepages = NULL;
 102 static unsigned int rptwear = 0;
 103
 104 module_param(first_id_byte,  uint, 0400);
 105 module_param(second_id_byte, uint, 0400);
 106 module_param(third_id_byte,  uint, 0400);
 107 module_param(fourth_id_byte, uint, 0400);
 108 module_param(access_delay,   uint, 0400);
 109 module_param(programm_delay, uint, 0400);
 110 module_param(erase_delay,    uint, 0400);
 111 module_param(output_cycle,   uint, 0400);
 112 module_param(input_cycle,    uint, 0400);
 113 module_param(bus_width,      uint, 0400);
 114 module_param(do_delays,      uint, 0400);
 115 module_param(log,            uint, 0400);
 116 module_param(dbg,            uint, 0400);
 117 module_param_array(parts, ulong, &parts_num, 0400);
 118 module_param(badblocks,      charp, 0400);
 119 module_param(weakblocks,     charp, 0400);
 120 module_param(weakpages,      charp, 0400);
 121 module_param(bitflips,       uint, 0400);
 122 module_param(gravepages,     charp, 0400);
 123 module_param(rptwear,        uint, 0400);
 124
 125 MODULE_PARM_DESC(first_id_byte,  "The fist byte returned by NAND Flash 'read ID' command (manufaturer ID)");
 126 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
 127 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
 128 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
 129 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microiseconds)");
 130 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 131 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 132 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanodeconds)");
 133 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanodeconds)");
 134 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 135 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 136 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 137 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 138 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 139 /* Page and erase block positions for the following parameters are independent of any partitions */
 140 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 141 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 142                                  " separated by commas e.g. 113:2 means eb 113"
 143                                  " can be erased only twice before failing");
 144 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 145                                  " separated by commas e.g. 1401:2 means page 1401"
 146                                  " can be written only twice before failing");
 147 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 148 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 149                                  " separated by commas e.g. 1401:2 means page 1401"
 150                                  " can be read only twice before failing");
 151 MODULE_PARM_DESC(rptwear,        "Number of erases inbetween reporting wear, if not zero");
 152
 153 /* The largest possible page size */
 154 #define NS_LARGEST_PAGE_SIZE    2048
 155
 156 /* The prefix for simulator output */
 157 #define NS_OUTPUT_PREFIX "[nandsim]"
 158
 159 /* Simulator's output macros (logging, debugging, warning, error) */
 160 #define NS_LOG(args...) \
 161         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 162 #define NS_DBG(args...) \
 163         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 164 #define NS_WARN(args...) \
 165         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 166 #define NS_ERR(args...) \
 167         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 168 #define NS_INFO(args...) \
 169         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
 170
 171 /* Busy-wait delay macros (microseconds, milliseconds) */
 172 #define NS_UDELAY(us) \
 173         do { if (do_delays) udelay(us); } while(0)
 174 #define NS_MDELAY(us) \
 175         do { if (do_delays) mdelay(us); } while(0)
 176
 177 /* Is the nandsim structure initialized ? */
 178 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 179
 180 /* Good operation completion status */
 181 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 182
 183 /* Operation failed completion status */
 184 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 185
 186 /* Calculate the page offset in flash RAM image by (row, column) address */
 187 #define NS_RAW_OFFSET(ns) \
 188         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
 189
 190 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 191 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 192
 193 /* After a command is input, the simulator goes to one of the following states */
 194 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 195 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 196 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 197 #define STATE_CMD_PAGEPROG     0x00000004 /* start page programm */
 198 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 199 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 200 #define STATE_CMD_STATUS       0x00000007 /* read status */
 201 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
 202 #define STATE_CMD_SEQIN        0x00000009 /* sequential data imput */
 203 #define STATE_CMD_READID       0x0000000A /* read ID */
 204 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 205 #define STATE_CMD_RESET        0x0000000C /* reset */
 206 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 207
 208 /* After an addres is input, the simulator goes to one of these states */
 209 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 210 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 211 #define STATE_ADDR_ZERO        0x00000030 /* one byte zero address was accepted */
 212 #define STATE_ADDR_MASK        0x00000030 /* address states mask */
 213
 214 /* Durind data input/output the simulator is in these states */
 215 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 216 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 217
 218 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 219 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 220 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 221 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
 222 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 223
 224 /* Previous operation is done, ready to accept new requests */
 225 #define STATE_READY            0x00000000
 226
 227 /* This state is used to mark that the next state isn't known yet */
 228 #define STATE_UNKNOWN          0x10000000
 229
 230 /* Simulator's actions bit masks */
 231 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 232 #define ACTION_PRGPAGE   0x00200000 /* programm the internal buffer to flash */
 233 #define ACTION_SECERASE  0x00300000 /* erase sector */
 234 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 235 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 236 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 237 #define ACTION_MASK      0x00700000 /* action mask */
 238
 239 #define NS_OPER_NUM      12 /* Number of operations supported by the simulator */
 240 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 241
 242 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 243 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
 244 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 245 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 246 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 247 #define OPT_AUTOINCR     0x00000020 /* page number auto inctimentation is possible */
 248 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 249 #define OPT_LARGEPAGE    (OPT_PAGE2048) /* 2048-byte page chips */
 250 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 251
 252 /* Remove action bits ftom state */
 253 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 254
 255 /*
 256  * Maximum previous states which need to be saved. Currently saving is
 257  * only needed for page programm operation with preceeded read command
 258  * (which is only valid for 512-byte pages).
 259  */
 260 #define NS_MAX_PREVSTATES 1
 261
 262 /*
 263  * A union to represent flash memory contents and flash buffer.
 264  */
 265 union ns_mem {
 266         u_char *byte;    /* for byte access */
 267         uint16_t *word;  /* for 16-bit word access */
 268 };
 269
 270 /*
 271  * The structure which describes all the internal simulator data.
 272  */
 273 struct nandsim {
 274         struct mtd_partition partitions[MAX_MTD_DEVICES];
 275         unsigned int nbparts;
 276
 277         uint busw;              /* flash chip bus width (8 or 16) */
 278         u_char ids[4];          /* chip's ID bytes */
 279         uint32_t options;       /* chip's characteristic bits */
 280         uint32_t state;         /* current chip state */
 281         uint32_t nxstate;       /* next expected state */
 282
 283         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 284         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 285         uint16_t npstates;      /* number of previous states saved */
 286         uint16_t stateidx;      /* current state index */
 287
 288         /* The simulated NAND flash pages array */
 289         union ns_mem *pages;
 290
 291         /* Internal buffer of page + OOB size bytes */
 292         union ns_mem buf;
 293
 294         /* NAND flash "geometry" */
 295         struct nandsin_geometry {
 296                 uint32_t totsz;     /* total flash size, bytes */
 297                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 298                 uint pgsz;          /* NAND flash page size, bytes */
 299                 uint oobsz;         /* page OOB area size, bytes */
 300                 uint32_t totszoob;  /* total flash size including OOB, bytes */
 301                 uint pgszoob;       /* page size including OOB , bytes*/
 302                 uint secszoob;      /* sector size including OOB, bytes */
 303                 uint pgnum;         /* total number of pages */
 304                 uint pgsec;         /* number of pages per sector */
 305                 uint secshift;      /* bits number in sector size */
 306                 uint pgshift;       /* bits number in page size */
 307                 uint oobshift;      /* bits number in OOB size */
 308                 uint pgaddrbytes;   /* bytes per page address */
 309                 uint secaddrbytes;  /* bytes per sector address */
 310                 uint idbytes;       /* the number ID bytes that this chip outputs */
 311         } geom;
 312
 313         /* NAND flash internal registers */
 314         struct nandsim_regs {
 315                 unsigned command; /* the command register */
 316                 u_char   status;  /* the status register */
 317                 uint     row;     /* the page number */
 318                 uint     column;  /* the offset within page */
 319                 uint     count;   /* internal counter */
 320                 uint     num;     /* number of bytes which must be processed */
 321                 uint     off;     /* fixed page offset */
 322         } regs;
 323
 324         /* NAND flash lines state */
 325         struct ns_lines_status {
 326                 int ce;  /* chip Enable */
 327                 int cle; /* command Latch Enable */
 328                 int ale; /* address Latch Enable */
 329                 int wp;  /* write Protect */
 330         } lines;
 331 };
 332
 333 /*
 334  * Operations array. To perform any operation the simulator must pass
 335  * through the correspondent states chain.
 336  */
 337 static struct nandsim_operations {
 338         uint32_t reqopts;  /* options which are required to perform the operation */
 339         uint32_t states[NS_OPER_STATES]; /* operation's states */
 340 } ops[NS_OPER_NUM] = {
 341         /* Read page + OOB from the beginning */
 342         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 343                         STATE_DATAOUT, STATE_READY}},
 344         /* Read page + OOB from the second half */
 345         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 346                         STATE_DATAOUT, STATE_READY}},
 347         /* Read OOB */
 348         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 349                         STATE_DATAOUT, STATE_READY}},
 350         /* Programm page starting from the beginning */
 351         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 352                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 353         /* Programm page starting from the beginning */
 354         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 355                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 356         /* Programm page starting from the second half */
 357         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 358                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 359         /* Programm OOB */
 360         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 361                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 362         /* Erase sector */
 363         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 364         /* Read status */
 365         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 366         /* Read multi-plane status */
 367         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
 368         /* Read ID */
 369         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 370         /* Large page devices read page */
 371         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 372                                STATE_DATAOUT, STATE_READY}}
 373 };
 374
 375 struct weak_block {
 376         struct list_head list;
 377         unsigned int erase_block_no;
 378         unsigned int max_erases;
 379         unsigned int erases_done;
 380 };
 381
 382 static LIST_HEAD(weak_blocks);
 383
 384 struct weak_page {
 385         struct list_head list;
 386         unsigned int page_no;
 387         unsigned int max_writes;
 388         unsigned int writes_done;
 389 };
 390
 391 static LIST_HEAD(weak_pages);
 392
 393 struct grave_page {
 394         struct list_head list;
 395         unsigned int page_no;
 396         unsigned int max_reads;
 397         unsigned int reads_done;
 398 };
 399
 400 static LIST_HEAD(grave_pages);
 401
 402 static unsigned long *erase_block_wear = NULL;
 403 static unsigned int wear_eb_count = 0;
 404 static unsigned long total_wear = 0;
 405 static unsigned int rptwear_cnt = 0;
 406
 407 /* MTD structure for NAND controller */
 408 static struct mtd_info *nsmtd;
 409
 410 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
 411
 412 /*
 413  * Allocate array of page pointers and initialize the array to NULL
 414  * pointers.
 415  *
 416  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 417  */
 418 static int alloc_device(struct nandsim *ns)
 419 {
 420         int i;
 421
 422         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 423         if (!ns->pages) {
 424                 NS_ERR("alloc_map: unable to allocate page array\n");
 425                 return -ENOMEM;
 426         }
 427         for (i = 0; i < ns->geom.pgnum; i++) {
 428                 ns->pages[i].byte = NULL;
 429         }
 430
 431         return 0;
 432 }
 433
 434 /*
 435  * Free any allocated pages, and free the array of page pointers.
 436  */
 437 static void free_device(struct nandsim *ns)
 438 {
 439         int i;
 440
 441         if (ns->pages) {
 442                 for (i = 0; i < ns->geom.pgnum; i++) {
 443                         if (ns->pages[i].byte)
 444                                 kfree(ns->pages[i].byte);
 445                 }
 446                 vfree(ns->pages);
 447         }
 448 }
 449
 450 static char *get_partition_name(int i)
 451 {
 452         char buf[64];
 453         sprintf(buf, "NAND simulator partition %d", i);
 454         return kstrdup(buf, GFP_KERNEL);
 455 }
 456
 457 /*
 458  * Initialize the nandsim structure.
 459  *
 460  * RETURNS: 0 if success, -ERRNO if failure.
 461  */
 462 static int init_nandsim(struct mtd_info *mtd)
 463 {
 464         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
 465         struct nandsim   *ns   = (struct nandsim *)(chip->priv);
 466         int i, ret = 0;
 467         u_int32_t remains;
 468         u_int32_t next_offset;
 469
 470         if (NS_IS_INITIALIZED(ns)) {
 471                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 472                 return -EIO;
 473         }
 474
 475         /* Force mtd to not do delays */
 476         chip->chip_delay = 0;
 477
 478         /* Initialize the NAND flash parameters */
 479         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 480         ns->geom.totsz    = mtd->size;
 481         ns->geom.pgsz     = mtd->writesize;
 482         ns->geom.oobsz    = mtd->oobsize;
 483         ns->geom.secsz    = mtd->erasesize;
 484         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 485         ns->geom.pgnum    = ns->geom.totsz / ns->geom.pgsz;
 486         ns->geom.totszoob = ns->geom.totsz + ns->geom.pgnum * ns->geom.oobsz;
 487         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 488         ns->geom.pgshift  = chip->page_shift;
 489         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
 490         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 491         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 492         ns->options = 0;
 493
 494         if (ns->geom.pgsz == 256) {
 495                 ns->options |= OPT_PAGE256;
 496         }
 497         else if (ns->geom.pgsz == 512) {
 498                 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
 499                 if (ns->busw == 8)
 500                         ns->options |= OPT_PAGE512_8BIT;
 501         } else if (ns->geom.pgsz == 2048) {
 502                 ns->options |= OPT_PAGE2048;
 503         } else {
 504                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 505                 return -EIO;
 506         }
 507
 508         if (ns->options & OPT_SMALLPAGE) {
 509                 if (ns->geom.totsz < (64 << 20)) {
 510                         ns->geom.pgaddrbytes  = 3;
 511                         ns->geom.secaddrbytes = 2;
 512                 } else {
 513                         ns->geom.pgaddrbytes  = 4;
 514                         ns->geom.secaddrbytes = 3;
 515                 }
 516         } else {
 517                 if (ns->geom.totsz <= (128 << 20)) {
 518                         ns->geom.pgaddrbytes  = 4;
 519                         ns->geom.secaddrbytes = 2;
 520                 } else {
 521                         ns->geom.pgaddrbytes  = 5;
 522                         ns->geom.secaddrbytes = 3;
 523                 }
 524         }
 525
 526         /* Fill the partition_info structure */
 527         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 528                 NS_ERR("too many partitions.\n");
 529                 ret = -EINVAL;
 530                 goto error;
 531         }
 532         remains = ns->geom.totsz;
 533         next_offset = 0;
 534         for (i = 0; i < parts_num; ++i) {
 535                 unsigned long part = parts[i];
 536                 if (!part || part > remains / ns->geom.secsz) {
 537                         NS_ERR("bad partition size.\n");
 538                         ret = -EINVAL;
 539                         goto error;
 540                 }
 541                 ns->partitions[i].name   = get_partition_name(i);
 542                 ns->partitions[i].offset = next_offset;
 543                 ns->partitions[i].size   = part * ns->geom.secsz;
 544                 next_offset += ns->partitions[i].size;
 545                 remains -= ns->partitions[i].size;
 546         }
 547         ns->nbparts = parts_num;
 548         if (remains) {
 549                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 550                         NS_ERR("too many partitions.\n");
 551                         ret = -EINVAL;
 552                         goto error;
 553                 }
 554                 ns->partitions[i].name   = get_partition_name(i);
 555                 ns->partitions[i].offset = next_offset;
 556                 ns->partitions[i].size   = remains;
 557                 ns->nbparts += 1;
 558         }
 559
 560         /* Detect how many ID bytes the NAND chip outputs */
 561         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 562                 if (second_id_byte != nand_flash_ids[i].id)
 563                         continue;
 564                 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
 565                         ns->options |= OPT_AUTOINCR;
 566         }
 567
 568         if (ns->busw == 16)
 569                 NS_WARN("16-bit flashes support wasn't tested\n");
 570
 571         printk("flash size: %u MiB\n",          ns->geom.totsz >> 20);
 572         printk("page size: %u bytes\n",         ns->geom.pgsz);
 573         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 574         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 575         printk("pages number: %u\n",            ns->geom.pgnum);
 576         printk("pages per sector: %u\n",        ns->geom.pgsec);
 577         printk("bus width: %u\n",               ns->busw);
 578         printk("bits in sector size: %u\n",     ns->geom.secshift);
 579         printk("bits in page size: %u\n",       ns->geom.pgshift);
 580         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
 581         printk("flash size with OOB: %u KiB\n", ns->geom.totszoob >> 10);
 582         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 583         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 584         printk("options: %#x\n",                ns->options);
 585
 586         if ((ret = alloc_device(ns)) != 0)
 587                 goto error;
 588
 589         /* Allocate / initialize the internal buffer */
 590         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 591         if (!ns->buf.byte) {
 592                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 593                         ns->geom.pgszoob);
 594                 ret = -ENOMEM;
 595                 goto error;
 596         }
 597         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 598
 599         return 0;
 600
 601 error:
 602         free_device(ns);
 603
 604         return ret;
 605 }
 606
 607 /*
 608  * Free the nandsim structure.
 609  */
 610 static void free_nandsim(struct nandsim *ns)
 611 {
 612         kfree(ns->buf.byte);
 613         free_device(ns);
 614
 615         return;
 616 }
 617
 618 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 619 {
 620         char *w;
 621         int zero_ok;
 622         unsigned int erase_block_no;
 623         loff_t offset;
 624
 625         if (!badblocks)
 626                 return 0;
 627         w = badblocks;
 628         do {
 629                 zero_ok = (*w == '0' ? 1 : 0);
 630                 erase_block_no = simple_strtoul(w, &w, 0);
 631                 if (!zero_ok && !erase_block_no) {
 632                         NS_ERR("invalid badblocks.\n");
 633                         return -EINVAL;
 634                 }
 635                 offset = erase_block_no * ns->geom.secsz;
 636                 if (mtd->block_markbad(mtd, offset)) {
 637                         NS_ERR("invalid badblocks.\n");
 638                         return -EINVAL;
 639                 }
 640                 if (*w == ',')
 641                         w += 1;
 642         } while (*w);
 643         return 0;
 644 }
 645
 646 static int parse_weakblocks(void)
 647 {
 648         char *w;
 649         int zero_ok;
 650         unsigned int erase_block_no;
 651         unsigned int max_erases;
 652         struct weak_block *wb;
 653
 654         if (!weakblocks)
 655                 return 0;
 656         w = weakblocks;
 657         do {
 658                 zero_ok = (*w == '0' ? 1 : 0);
 659                 erase_block_no = simple_strtoul(w, &w, 0);
 660                 if (!zero_ok && !erase_block_no) {
 661                         NS_ERR("invalid weakblocks.\n");
 662                         return -EINVAL;
 663                 }
 664                 max_erases = 3;
 665                 if (*w == ':') {
 666                         w += 1;
 667                         max_erases = simple_strtoul(w, &w, 0);
 668                 }
 669                 if (*w == ',')
 670                         w += 1;
 671                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 672                 if (!wb) {
 673                         NS_ERR("unable to allocate memory.\n");
 674                         return -ENOMEM;
 675                 }
 676                 wb->erase_block_no = erase_block_no;
 677                 wb->max_erases = max_erases;
 678                 list_add(&wb->list, &weak_blocks);
 679         } while (*w);
 680         return 0;
 681 }
 682
 683 static int erase_error(unsigned int erase_block_no)
 684 {
 685         struct weak_block *wb;
 686
 687         list_for_each_entry(wb, &weak_blocks, list)
 688                 if (wb->erase_block_no == erase_block_no) {
 689                         if (wb->erases_done >= wb->max_erases)
 690                                 return 1;
 691                         wb->erases_done += 1;
 692                         return 0;
 693                 }
 694         return 0;
 695 }
 696
 697 static int parse_weakpages(void)
 698 {
 699         char *w;
 700         int zero_ok;
 701         unsigned int page_no;
 702         unsigned int max_writes;
 703         struct weak_page *wp;
 704
 705         if (!weakpages)
 706                 return 0;
 707         w = weakpages;
 708         do {
 709                 zero_ok = (*w == '0' ? 1 : 0);
 710                 page_no = simple_strtoul(w, &w, 0);
 711                 if (!zero_ok && !page_no) {
 712                         NS_ERR("invalid weakpagess.\n");
 713                         return -EINVAL;
 714                 }
 715                 max_writes = 3;
 716                 if (*w == ':') {
 717                         w += 1;
 718                         max_writes = simple_strtoul(w, &w, 0);
 719                 }
 720                 if (*w == ',')
 721                         w += 1;
 722                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 723                 if (!wp) {
 724                         NS_ERR("unable to allocate memory.\n");
 725                         return -ENOMEM;
 726                 }
 727                 wp->page_no = page_no;
 728                 wp->max_writes = max_writes;
 729                 list_add(&wp->list, &weak_pages);
 730         } while (*w);
 731         return 0;
 732 }
 733
 734 static int write_error(unsigned int page_no)
 735 {
 736         struct weak_page *wp;
 737
 738         list_for_each_entry(wp, &weak_pages, list)
 739                 if (wp->page_no == page_no) {
 740                         if (wp->writes_done >= wp->max_writes)
 741                                 return 1;
 742                         wp->writes_done += 1;
 743                         return 0;
 744                 }
 745         return 0;
 746 }
 747
 748 static int parse_gravepages(void)
 749 {
 750         char *g;
 751         int zero_ok;
 752         unsigned int page_no;
 753         unsigned int max_reads;
 754         struct grave_page *gp;
 755
 756         if (!gravepages)
 757                 return 0;
 758         g = gravepages;
 759         do {
 760                 zero_ok = (*g == '0' ? 1 : 0);
 761                 page_no = simple_strtoul(g, &g, 0);
 762                 if (!zero_ok && !page_no) {
 763                         NS_ERR("invalid gravepagess.\n");
 764                         return -EINVAL;
 765                 }
 766                 max_reads = 3;
 767                 if (*g == ':') {
 768                         g += 1;
 769                         max_reads = simple_strtoul(g, &g, 0);
 770                 }
 771                 if (*g == ',')
 772                         g += 1;
 773                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 774                 if (!gp) {
 775                         NS_ERR("unable to allocate memory.\n");
 776                         return -ENOMEM;
 777                 }
 778                 gp->page_no = page_no;
 779                 gp->max_reads = max_reads;
 780                 list_add(&gp->list, &grave_pages);
 781         } while (*g);
 782         return 0;
 783 }
 784
 785 static int read_error(unsigned int page_no)
 786 {
 787         struct grave_page *gp;
 788
 789         list_for_each_entry(gp, &grave_pages, list)
 790                 if (gp->page_no == page_no) {
 791                         if (gp->reads_done >= gp->max_reads)
 792                                 return 1;
 793                         gp->reads_done += 1;
 794                         return 0;
 795                 }
 796         return 0;
 797 }
 798
 799 static void free_lists(void)
 800 {
 801         struct list_head *pos, *n;
 802         list_for_each_safe(pos, n, &weak_blocks) {
 803                 list_del(pos);
 804                 kfree(list_entry(pos, struct weak_block, list));
 805         }
 806         list_for_each_safe(pos, n, &weak_pages) {
 807                 list_del(pos);
 808                 kfree(list_entry(pos, struct weak_page, list));
 809         }
 810         list_for_each_safe(pos, n, &grave_pages) {
 811                 list_del(pos);
 812                 kfree(list_entry(pos, struct grave_page, list));
 813         }
 814         kfree(erase_block_wear);
 815 }
 816
 817 static int setup_wear_reporting(struct mtd_info *mtd)
 818 {
 819         size_t mem;
 820
 821         if (!rptwear)
 822                 return 0;
 823         wear_eb_count = mtd->size / mtd->erasesize;
 824         mem = wear_eb_count * sizeof(unsigned long);
 825         if (mem / sizeof(unsigned long) != wear_eb_count) {
 826                 NS_ERR("Too many erase blocks for wear reporting\n");
 827                 return -ENOMEM;
 828         }
 829         erase_block_wear = kzalloc(mem, GFP_KERNEL);
 830         if (!erase_block_wear) {
 831                 NS_ERR("Too many erase blocks for wear reporting\n");
 832                 return -ENOMEM;
 833         }
 834         return 0;
 835 }
 836
 837 static void update_wear(unsigned int erase_block_no)
 838 {
 839         unsigned long wmin = -1, wmax = 0, avg;
 840         unsigned long deciles[10], decile_max[10], tot = 0;
 841         unsigned int i;
 842
 843         if (!erase_block_wear)
 844                 return;
 845         total_wear += 1;
 846         if (total_wear == 0)
 847                 NS_ERR("Erase counter total overflow\n");
 848         erase_block_wear[erase_block_no] += 1;
 849         if (erase_block_wear[erase_block_no] == 0)
 850                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
 851         rptwear_cnt += 1;
 852         if (rptwear_cnt < rptwear)
 853                 return;
 854         rptwear_cnt = 0;
 855         /* Calc wear stats */
 856         for (i = 0; i < wear_eb_count; ++i) {
 857                 unsigned long wear = erase_block_wear[i];
 858                 if (wear < wmin)
 859                         wmin = wear;
 860                 if (wear > wmax)
 861                         wmax = wear;
 862                 tot += wear;
 863         }
 864         for (i = 0; i < 9; ++i) {
 865                 deciles[i] = 0;
 866                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
 867         }
 868         deciles[9] = 0;
 869         decile_max[9] = wmax;
 870         for (i = 0; i < wear_eb_count; ++i) {
 871                 int d;
 872                 unsigned long wear = erase_block_wear[i];
 873                 for (d = 0; d < 10; ++d)
 874                         if (wear <= decile_max[d]) {
 875                                 deciles[d] += 1;
 876                                 break;
 877                         }
 878         }
 879         avg = tot / wear_eb_count;
 880         /* Output wear report */
 881         NS_INFO("*** Wear Report ***\n");
 882         NS_INFO("Total numbers of erases:  %lu\n", tot);
 883         NS_INFO("Number of erase blocks:   %u\n", wear_eb_count);
 884         NS_INFO("Average number of erases: %lu\n", avg);
 885         NS_INFO("Maximum number of erases: %lu\n", wmax);
 886         NS_INFO("Minimum number of erases: %lu\n", wmin);
 887         for (i = 0; i < 10; ++i) {
 888                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
 889                 if (from > decile_max[i])
 890                         continue;
 891                 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
 892                         from,
 893                         decile_max[i],
 894                         deciles[i]);
 895         }
 896         NS_INFO("*** End of Wear Report ***\n");
 897 }
 898
 899 /*
 900  * Returns the string representation of 'state' state.
 901  */
 902 static char *get_state_name(uint32_t state)
 903 {
 904         switch (NS_STATE(state)) {
 905                 case STATE_CMD_READ0:
 906                         return "STATE_CMD_READ0";
 907                 case STATE_CMD_READ1:
 908                         return "STATE_CMD_READ1";
 909                 case STATE_CMD_PAGEPROG:
 910                         return "STATE_CMD_PAGEPROG";
 911                 case STATE_CMD_READOOB:
 912                         return "STATE_CMD_READOOB";
 913                 case STATE_CMD_READSTART:
 914                         return "STATE_CMD_READSTART";
 915                 case STATE_CMD_ERASE1:
 916                         return "STATE_CMD_ERASE1";
 917                 case STATE_CMD_STATUS:
 918                         return "STATE_CMD_STATUS";
 919                 case STATE_CMD_STATUS_M:
 920                         return "STATE_CMD_STATUS_M";
 921                 case STATE_CMD_SEQIN:
 922                         return "STATE_CMD_SEQIN";
 923                 case STATE_CMD_READID:
 924                         return "STATE_CMD_READID";
 925                 case STATE_CMD_ERASE2:
 926                         return "STATE_CMD_ERASE2";
 927                 case STATE_CMD_RESET:
 928                         return "STATE_CMD_RESET";
 929                 case STATE_ADDR_PAGE:
 930                         return "STATE_ADDR_PAGE";
 931                 case STATE_ADDR_SEC:
 932                         return "STATE_ADDR_SEC";
 933                 case STATE_ADDR_ZERO:
 934                         return "STATE_ADDR_ZERO";
 935                 case STATE_DATAIN:
 936                         return "STATE_DATAIN";
 937                 case STATE_DATAOUT:
 938                         return "STATE_DATAOUT";
 939                 case STATE_DATAOUT_ID:
 940                         return "STATE_DATAOUT_ID";
 941                 case STATE_DATAOUT_STATUS:
 942                         return "STATE_DATAOUT_STATUS";
 943                 case STATE_DATAOUT_STATUS_M:
 944                         return "STATE_DATAOUT_STATUS_M";
 945                 case STATE_READY:
 946                         return "STATE_READY";
 947                 case STATE_UNKNOWN:
 948                         return "STATE_UNKNOWN";
 949         }
 950
 951         NS_ERR("get_state_name: unknown state, BUG\n");
 952         return NULL;
 953 }
 954
 955 /*
 956  * Check if command is valid.
 957  *
 958  * RETURNS: 1 if wrong command, 0 if right.
 959  */
 960 static int check_command(int cmd)
 961 {
 962         switch (cmd) {
 963
 964         case NAND_CMD_READ0:
 965         case NAND_CMD_READSTART:
 966         case NAND_CMD_PAGEPROG:
 967         case NAND_CMD_READOOB:
 968         case NAND_CMD_ERASE1:
 969         case NAND_CMD_STATUS:
 970         case NAND_CMD_SEQIN:
 971         case NAND_CMD_READID:
 972         case NAND_CMD_ERASE2:
 973         case NAND_CMD_RESET:
 974         case NAND_CMD_READ1:
 975                 return 0;
 976
 977         case NAND_CMD_STATUS_MULTI:
 978         default:
 979                 return 1;
 980         }
 981 }
 982
 983 /*
 984  * Returns state after command is accepted by command number.
 985  */
 986 static uint32_t get_state_by_command(unsigned command)
 987 {
 988         switch (command) {
 989                 case NAND_CMD_READ0:
 990                         return STATE_CMD_READ0;
 991                 case NAND_CMD_READ1:
 992                         return STATE_CMD_READ1;
 993                 case NAND_CMD_PAGEPROG:
 994                         return STATE_CMD_PAGEPROG;
 995                 case NAND_CMD_READSTART:
 996                         return STATE_CMD_READSTART;
 997                 case NAND_CMD_READOOB:
 998                         return STATE_CMD_READOOB;
 999                 case NAND_CMD_ERASE1:
1000                         return STATE_CMD_ERASE1;
1001                 case NAND_CMD_STATUS:
1002                         return STATE_CMD_STATUS;
1003                 case NAND_CMD_STATUS_MULTI:
1004                         return STATE_CMD_STATUS_M;
1005                 case NAND_CMD_SEQIN:
1006                         return STATE_CMD_SEQIN;
1007                 case NAND_CMD_READID:
1008                         return STATE_CMD_READID;
1009                 case NAND_CMD_ERASE2:
1010                         return STATE_CMD_ERASE2;
1011                 case NAND_CMD_RESET:
1012                         return STATE_CMD_RESET;
1013         }
1014
1015         NS_ERR("get_state_by_command: unknown command, BUG\n");
1016         return 0;
1017 }
1018
1019 /*
1020  * Move an address byte to the correspondent internal register.
1021  */
1022 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1023 {
1024         uint byte = (uint)bt;
1025
1026         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1027                 ns->regs.column |= (byte << 8 * ns->regs.count);
1028         else {
1029                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1030                                                 ns->geom.pgaddrbytes +
1031                                                 ns->geom.secaddrbytes));
1032         }
1033
1034         return;
1035 }
1036
1037 /*
1038  * Switch to STATE_READY state.
1039  */
1040 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1041 {
1042         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1043
1044         ns->state       = STATE_READY;
1045         ns->nxstate     = STATE_UNKNOWN;
1046         ns->op          = NULL;
1047         ns->npstates    = 0;
1048         ns->stateidx    = 0;
1049         ns->regs.num    = 0;
1050         ns->regs.count  = 0;
1051         ns->regs.off    = 0;
1052         ns->regs.row    = 0;
1053         ns->regs.column = 0;
1054         ns->regs.status = status;
1055 }
1056
1057 /*
1058  * If the operation isn't known yet, try to find it in the global array
1059  * of supported operations.
1060  *
1061  * Operation can be unknown because of the following.
1062  *   1. New command was accepted and this is the firs call to find the
1063  *      correspondent states chain. In this case ns->npstates = 0;
1064  *   2. There is several operations which begin with the same command(s)
1065  *      (for example program from the second half and read from the
1066  *      second half operations both begin with the READ1 command). In this
1067  *      case the ns->pstates[] array contains previous states.
1068  *
1069  * Thus, the function tries to find operation containing the following
1070  * states (if the 'flag' parameter is 0):
1071  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1072  *
1073  * If (one and only one) matching operation is found, it is accepted (
1074  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1075  * zeroed).
1076  *
1077  * If there are several maches, the current state is pushed to the
1078  * ns->pstates.
1079  *
1080  * The operation can be unknown only while commands are input to the chip.
1081  * As soon as address command is accepted, the operation must be known.
1082  * In such situation the function is called with 'flag' != 0, and the
1083  * operation is searched using the following pattern:
1084  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1085  *
1086  * It is supposed that this pattern must either match one operation on
1087  * none. There can't be ambiguity in that case.
1088  *
1089  * If no matches found, the functions does the following:
1090  *   1. if there are saved states present, try to ignore them and search
1091  *      again only using the last command. If nothing was found, switch
1092  *      to the STATE_READY state.
1093  *   2. if there are no saved states, switch to the STATE_READY state.
1094  *
1095  * RETURNS: -2 - no matched operations found.
1096  *          -1 - several matches.
1097  *           0 - operation is found.
1098  */
1099 static int find_operation(struct nandsim *ns, uint32_t flag)
1100 {
1101         int opsfound = 0;
1102         int i, j, idx = 0;
1103
1104         for (i = 0; i < NS_OPER_NUM; i++) {
1105
1106                 int found = 1;
1107
1108                 if (!(ns->options & ops[i].reqopts))
1109                         /* Ignore operations we can't perform */
1110                         continue;
1111
1112                 if (flag) {
1113                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1114                                 continue;
1115                 } else {
1116                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1117                                 continue;
1118                 }
1119
1120                 for (j = 0; j < ns->npstates; j++)
1121                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1122                                 && (ns->options & ops[idx].reqopts)) {
1123                                 found = 0;
1124                                 break;
1125                         }
1126
1127                 if (found) {
1128                         idx = i;
1129                         opsfound += 1;
1130                 }
1131         }
1132
1133         if (opsfound == 1) {
1134                 /* Exact match */
1135                 ns->op = &ops[idx].states[0];
1136                 if (flag) {
1137                         /*
1138                          * In this case the find_operation function was
1139                          * called when address has just began input. But it isn't
1140                          * yet fully input and the current state must
1141                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1142                          * state must be the next state (ns->nxstate).
1143                          */
1144                         ns->stateidx = ns->npstates - 1;
1145                 } else {
1146                         ns->stateidx = ns->npstates;
1147                 }
1148                 ns->npstates = 0;
1149                 ns->state = ns->op[ns->stateidx];
1150                 ns->nxstate = ns->op[ns->stateidx + 1];
1151                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1152                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1153                 return 0;
1154         }
1155
1156         if (opsfound == 0) {
1157                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1158                 if (ns->npstates != 0) {
1159                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1160                                         get_state_name(ns->state));
1161                         ns->npstates = 0;
1162                         return find_operation(ns, 0);
1163
1164                 }
1165                 NS_DBG("find_operation: no operations found\n");
1166                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1167                 return -2;
1168         }
1169
1170         if (flag) {
1171                 /* This shouldn't happen */
1172                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1173                 return -2;
1174         }
1175
1176         NS_DBG("find_operation: there is still ambiguity\n");
1177
1178         ns->pstates[ns->npstates++] = ns->state;
1179
1180         return -1;
1181 }
1182
1183 /*
1184  * Returns a pointer to the current page.
1185  */
1186 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1187 {
1188         return &(ns->pages[ns->regs.row]);
1189 }
1190
1191 /*
1192  * Retuns a pointer to the current byte, within the current page.
1193  */
1194 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1195 {
1196         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1197 }
1198
1199 /*
1200  * Fill the NAND buffer with data read from the specified page.
1201  */
1202 static void read_page(struct nandsim *ns, int num)
1203 {
1204         union ns_mem *mypage;
1205
1206         mypage = NS_GET_PAGE(ns);
1207         if (mypage->byte == NULL) {
1208                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1209                 memset(ns->buf.byte, 0xFF, num);
1210         } else {
1211                 unsigned int page_no = ns->regs.row;
1212                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1213                         ns->regs.row, ns->regs.column + ns->regs.off);
1214                 if (read_error(page_no)) {
1215                         int i;
1216                         memset(ns->buf.byte, 0xFF, num);
1217                         for (i = 0; i < num; ++i)
1218                                 ns->buf.byte[i] = random32();
1219                         NS_WARN("simulating read error in page %u\n", page_no);
1220                         return;
1221                 }
1222                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1223                 if (bitflips && random32() < (1 << 22)) {
1224                         int flips = 1;
1225                         if (bitflips > 1)
1226                                 flips = (random32() % (int) bitflips) + 1;
1227                         while (flips--) {
1228                                 int pos = random32() % (num * 8);
1229                                 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1230                                 NS_WARN("read_page: flipping bit %d in page %d "
1231                                         "reading from %d ecc: corrected=%u failed=%u\n",
1232                                         pos, ns->regs.row, ns->regs.column + ns->regs.off,
1233                                         nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1234                         }
1235                 }
1236         }
1237 }
1238
1239 /*
1240  * Erase all pages in the specified sector.
1241  */
1242 static void erase_sector(struct nandsim *ns)
1243 {
1244         union ns_mem *mypage;
1245         int i;
1246
1247         mypage = NS_GET_PAGE(ns);
1248         for (i = 0; i < ns->geom.pgsec; i++) {
1249                 if (mypage->byte != NULL) {
1250                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1251                         kfree(mypage->byte);
1252                         mypage->byte = NULL;
1253                 }
1254                 mypage++;
1255         }
1256 }
1257
1258 /*
1259  * Program the specified page with the contents from the NAND buffer.
1260  */
1261 static int prog_page(struct nandsim *ns, int num)
1262 {
1263         int i;
1264         union ns_mem *mypage;
1265         u_char *pg_off;
1266
1267         mypage = NS_GET_PAGE(ns);
1268         if (mypage->byte == NULL) {
1269                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1270                 mypage->byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
1271                 if (mypage->byte == NULL) {
1272                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1273                         return -1;
1274                 }
1275                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1276         }
1277
1278         pg_off = NS_PAGE_BYTE_OFF(ns);
1279         for (i = 0; i < num; i++)
1280                 pg_off[i] &= ns->buf.byte[i];
1281
1282         return 0;
1283 }
1284
1285 /*
1286  * If state has any action bit, perform this action.
1287  *
1288  * RETURNS: 0 if success, -1 if error.
1289  */
1290 static int do_state_action(struct nandsim *ns, uint32_t action)
1291 {
1292         int num;
1293         int busdiv = ns->busw == 8 ? 1 : 2;
1294         unsigned int erase_block_no, page_no;
1295
1296         action &= ACTION_MASK;
1297
1298         /* Check that page address input is correct */
1299         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1300                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1301                 return -1;
1302         }
1303
1304         switch (action) {
1305
1306         case ACTION_CPY:
1307                 /*
1308                  * Copy page data to the internal buffer.
1309                  */
1310
1311                 /* Column shouldn't be very large */
1312                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1313                         NS_ERR("do_state_action: column number is too large\n");
1314                         break;
1315                 }
1316                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1317                 read_page(ns, num);
1318
1319                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1320                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1321
1322                 if (ns->regs.off == 0)
1323                         NS_LOG("read page %d\n", ns->regs.row);
1324                 else if (ns->regs.off < ns->geom.pgsz)
1325                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1326                 else
1327                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1328
1329                 NS_UDELAY(access_delay);
1330                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1331
1332                 break;
1333
1334         case ACTION_SECERASE:
1335                 /*
1336                  * Erase sector.
1337                  */
1338
1339                 if (ns->lines.wp) {
1340                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1341                         return -1;
1342                 }
1343
1344                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1345                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1346                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1347                         return -1;
1348                 }
1349
1350                 ns->regs.row = (ns->regs.row <<
1351                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1352                 ns->regs.column = 0;
1353
1354                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1355
1356                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1357                                 ns->regs.row, NS_RAW_OFFSET(ns));
1358                 NS_LOG("erase sector %u\n", erase_block_no);
1359
1360                 erase_sector(ns);
1361
1362                 NS_MDELAY(erase_delay);
1363
1364                 if (erase_block_wear)
1365                         update_wear(erase_block_no);
1366
1367                 if (erase_error(erase_block_no)) {
1368                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1369                         return -1;
1370                 }
1371
1372                 break;
1373
1374         case ACTION_PRGPAGE:
1375                 /*
1376                  * Programm page - move internal buffer data to the page.
1377                  */
1378
1379                 if (ns->lines.wp) {
1380                         NS_WARN("do_state_action: device is write-protected, programm\n");
1381                         return -1;
1382                 }
1383
1384                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1385                 if (num != ns->regs.count) {
1386                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1387                                         ns->regs.count, num);
1388                         return -1;
1389                 }
1390
1391                 if (prog_page(ns, num) == -1)
1392                         return -1;
1393
1394                 page_no = ns->regs.row;
1395
1396                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1397                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1398                 NS_LOG("programm page %d\n", ns->regs.row);
1399
1400                 NS_UDELAY(programm_delay);
1401                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1402
1403                 if (write_error(page_no)) {
1404                         NS_WARN("simulating write failure in page %u\n", page_no);
1405                         return -1;
1406                 }
1407
1408                 break;
1409
1410         case ACTION_ZEROOFF:
1411                 NS_DBG("do_state_action: set internal offset to 0\n");
1412                 ns->regs.off = 0;
1413                 break;
1414
1415         case ACTION_HALFOFF:
1416                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1417                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1418                                 "byte page size 8x chips\n");
1419                         return -1;
1420                 }
1421                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1422                 ns->regs.off = ns->geom.pgsz/2;
1423                 break;
1424
1425         case ACTION_OOBOFF:
1426                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1427                 ns->regs.off = ns->geom.pgsz;
1428                 break;
1429
1430         default:
1431                 NS_DBG("do_state_action: BUG! unknown action\n");
1432         }
1433
1434         return 0;
1435 }
1436
1437 /*
1438  * Switch simulator's state.
1439  */
1440 static void switch_state(struct nandsim *ns)
1441 {
1442         if (ns->op) {
1443                 /*
1444                  * The current operation have already been identified.
1445                  * Just follow the states chain.
1446                  */
1447
1448                 ns->stateidx += 1;
1449                 ns->state = ns->nxstate;
1450                 ns->nxstate = ns->op[ns->stateidx + 1];
1451
1452                 NS_DBG("switch_state: operation is known, switch to the next state, "
1453                         "state: %s, nxstate: %s\n",
1454                         get_state_name(ns->state), get_state_name(ns->nxstate));
1455
1456                 /* See, whether we need to do some action */
1457                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1458                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1459                         return;
1460                 }
1461
1462         } else {
1463                 /*
1464                  * We don't yet know which operation we perform.
1465                  * Try to identify it.
1466                  */
1467
1468                 /*
1469                  *  The only event causing the switch_state function to
1470                  *  be called with yet unknown operation is new command.
1471                  */
1472                 ns->state = get_state_by_command(ns->regs.command);
1473
1474                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1475
1476                 if (find_operation(ns, 0) != 0)
1477                         return;
1478
1479                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1480                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1481                         return;
1482                 }
1483         }
1484
1485         /* For 16x devices column means the page offset in words */
1486         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1487                 NS_DBG("switch_state: double the column number for 16x device\n");
1488                 ns->regs.column <<= 1;
1489         }
1490
1491         if (NS_STATE(ns->nxstate) == STATE_READY) {
1492                 /*
1493                  * The current state is the last. Return to STATE_READY
1494                  */
1495
1496                 u_char status = NS_STATUS_OK(ns);
1497
1498                 /* In case of data states, see if all bytes were input/output */
1499                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1500                         && ns->regs.count != ns->regs.num) {
1501                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1502                                         ns->regs.num - ns->regs.count);
1503                         status = NS_STATUS_FAILED(ns);
1504                 }
1505
1506                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1507
1508                 switch_to_ready_state(ns, status);
1509
1510                 return;
1511         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1512                 /*
1513                  * If the next state is data input/output, switch to it now
1514                  */
1515
1516                 ns->state      = ns->nxstate;
1517                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1518                 ns->regs.num   = ns->regs.count = 0;
1519
1520                 NS_DBG("switch_state: the next state is data I/O, switch, "
1521                         "state: %s, nxstate: %s\n",
1522                         get_state_name(ns->state), get_state_name(ns->nxstate));
1523
1524                 /*
1525                  * Set the internal register to the count of bytes which
1526                  * are expected to be input or output
1527                  */
1528                 switch (NS_STATE(ns->state)) {
1529                         case STATE_DATAIN:
1530                         case STATE_DATAOUT:
1531                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1532                                 break;
1533
1534                         case STATE_DATAOUT_ID:
1535                                 ns->regs.num = ns->geom.idbytes;
1536                                 break;
1537
1538                         case STATE_DATAOUT_STATUS:
1539                         case STATE_DATAOUT_STATUS_M:
1540                                 ns->regs.count = ns->regs.num = 0;
1541                                 break;
1542
1543                         default:
1544                                 NS_ERR("switch_state: BUG! unknown data state\n");
1545                 }
1546
1547         } else if (ns->nxstate & STATE_ADDR_MASK) {
1548                 /*
1549                  * If the next state is address input, set the internal
1550                  * register to the number of expected address bytes
1551                  */
1552
1553                 ns->regs.count = 0;
1554
1555                 switch (NS_STATE(ns->nxstate)) {
1556                         case STATE_ADDR_PAGE:
1557                                 ns->regs.num = ns->geom.pgaddrbytes;
1558
1559                                 break;
1560                         case STATE_ADDR_SEC:
1561                                 ns->regs.num = ns->geom.secaddrbytes;
1562                                 break;
1563
1564                         case STATE_ADDR_ZERO:
1565                                 ns->regs.num = 1;
1566                                 break;
1567
1568                         default:
1569                                 NS_ERR("switch_state: BUG! unknown address state\n");
1570                 }
1571         } else {
1572                 /*
1573                  * Just reset internal counters.
1574                  */
1575
1576                 ns->regs.num = 0;
1577                 ns->regs.count = 0;
1578         }
1579 }
1580
1581 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1582 {
1583         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1584         u_char outb = 0x00;
1585
1586         /* Sanity and correctness checks */
1587         if (!ns->lines.ce) {
1588                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1589                 return outb;
1590         }
1591         if (ns->lines.ale || ns->lines.cle) {
1592                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1593                 return outb;
1594         }
1595         if (!(ns->state & STATE_DATAOUT_MASK)) {
1596                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1597                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1598                 return outb;
1599         }
1600
1601         /* Status register may be read as many times as it is wanted */
1602         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1603                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1604                 return ns->regs.status;
1605         }
1606
1607         /* Check if there is any data in the internal buffer which may be read */
1608         if (ns->regs.count == ns->regs.num) {
1609                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1610                 return outb;
1611         }
1612
1613         switch (NS_STATE(ns->state)) {
1614                 case STATE_DATAOUT:
1615                         if (ns->busw == 8) {
1616                                 outb = ns->buf.byte[ns->regs.count];
1617                                 ns->regs.count += 1;
1618                         } else {
1619                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1620                                 ns->regs.count += 2;
1621                         }
1622                         break;
1623                 case STATE_DATAOUT_ID:
1624                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1625                         outb = ns->ids[ns->regs.count];
1626                         ns->regs.count += 1;
1627                         break;
1628                 default:
1629                         BUG();
1630         }
1631
1632         if (ns->regs.count == ns->regs.num) {
1633                 NS_DBG("read_byte: all bytes were read\n");
1634
1635                 /*
1636                  * The OPT_AUTOINCR allows to read next conseqitive pages without
1637                  * new read operation cycle.
1638                  */
1639                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1640                         ns->regs.count = 0;
1641                         if (ns->regs.row + 1 < ns->geom.pgnum)
1642                                 ns->regs.row += 1;
1643                         NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1644                         do_state_action(ns, ACTION_CPY);
1645                 }
1646                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1647                         switch_state(ns);
1648
1649         }
1650
1651         return outb;
1652 }
1653
1654 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1655 {
1656         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1657
1658         /* Sanity and correctness checks */
1659         if (!ns->lines.ce) {
1660                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1661                 return;
1662         }
1663         if (ns->lines.ale && ns->lines.cle) {
1664                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1665                 return;
1666         }
1667
1668         if (ns->lines.cle == 1) {
1669                 /*
1670                  * The byte written is a command.
1671                  */
1672
1673                 if (byte == NAND_CMD_RESET) {
1674                         NS_LOG("reset chip\n");
1675                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1676                         return;
1677                 }
1678
1679                 /*
1680                  * Chip might still be in STATE_DATAOUT
1681                  * (if OPT_AUTOINCR feature is supported), STATE_DATAOUT_STATUS or
1682                  * STATE_DATAOUT_STATUS_M state. If so, switch state.
1683                  */
1684                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1685                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1686                         || ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT))
1687                         switch_state(ns);
1688
1689                 /* Check if chip is expecting command */
1690                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1691                         /*
1692                          * We are in situation when something else (not command)
1693                          * was expected but command was input. In this case ignore
1694                          * previous command(s)/state(s) and accept the last one.
1695                          */
1696                         NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1697                                 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1698                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1699                 }
1700
1701                 /* Check that the command byte is correct */
1702                 if (check_command(byte)) {
1703                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1704                         return;
1705                 }
1706
1707                 NS_DBG("command byte corresponding to %s state accepted\n",
1708                         get_state_name(get_state_by_command(byte)));
1709                 ns->regs.command = byte;
1710                 switch_state(ns);
1711
1712         } else if (ns->lines.ale == 1) {
1713                 /*
1714                  * The byte written is an address.
1715                  */
1716
1717                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
1718
1719                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
1720
1721                         if (find_operation(ns, 1) < 0)
1722                                 return;
1723
1724                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1725                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1726                                 return;
1727                         }
1728
1729                         ns->regs.count = 0;
1730                         switch (NS_STATE(ns->nxstate)) {
1731                                 case STATE_ADDR_PAGE:
1732                                         ns->regs.num = ns->geom.pgaddrbytes;
1733                                         break;
1734                                 case STATE_ADDR_SEC:
1735                                         ns->regs.num = ns->geom.secaddrbytes;
1736                                         break;
1737                                 case STATE_ADDR_ZERO:
1738                                         ns->regs.num = 1;
1739                                         break;
1740                                 default:
1741                                         BUG();
1742                         }
1743                 }
1744
1745                 /* Check that chip is expecting address */
1746                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
1747                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
1748                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
1749                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1750                         return;
1751                 }
1752
1753                 /* Check if this is expected byte */
1754                 if (ns->regs.count == ns->regs.num) {
1755                         NS_ERR("write_byte: no more address bytes expected\n");
1756                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1757                         return;
1758                 }
1759
1760                 accept_addr_byte(ns, byte);
1761
1762                 ns->regs.count += 1;
1763
1764                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
1765                                 (uint)byte, ns->regs.count, ns->regs.num);
1766
1767                 if (ns->regs.count == ns->regs.num) {
1768                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
1769                         switch_state(ns);
1770                 }
1771
1772         } else {
1773                 /*
1774                  * The byte written is an input data.
1775                  */
1776
1777                 /* Check that chip is expecting data input */
1778                 if (!(ns->state & STATE_DATAIN_MASK)) {
1779                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
1780                                 "switch to %s\n", (uint)byte,
1781                                 get_state_name(ns->state), get_state_name(STATE_READY));
1782                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1783                         return;
1784                 }
1785
1786                 /* Check if this is expected byte */
1787                 if (ns->regs.count == ns->regs.num) {
1788                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
1789                                         ns->regs.num);
1790                         return;
1791                 }
1792
1793                 if (ns->busw == 8) {
1794                         ns->buf.byte[ns->regs.count] = byte;
1795                         ns->regs.count += 1;
1796                 } else {
1797                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
1798                         ns->regs.count += 2;
1799                 }
1800         }
1801
1802         return;
1803 }
1804
1805 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
1806 {
1807         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1808
1809         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
1810         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
1811         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
1812
1813         if (cmd != NAND_CMD_NONE)
1814                 ns_nand_write_byte(mtd, cmd);
1815 }
1816
1817 static int ns_device_ready(struct mtd_info *mtd)
1818 {
1819         NS_DBG("device_ready\n");
1820         return 1;
1821 }
1822
1823 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
1824 {
1825         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
1826
1827         NS_DBG("read_word\n");
1828
1829         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
1830 }
1831
1832 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
1833 {
1834         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1835
1836         /* Check that chip is expecting data input */
1837         if (!(ns->state & STATE_DATAIN_MASK)) {
1838                 NS_ERR("write_buf: data input isn't expected, state is %s, "
1839                         "switch to STATE_READY\n", get_state_name(ns->state));
1840                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1841                 return;
1842         }
1843
1844         /* Check if these are expected bytes */
1845         if (ns->regs.count + len > ns->regs.num) {
1846                 NS_ERR("write_buf: too many input bytes\n");
1847                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1848                 return;
1849         }
1850
1851         memcpy(ns->buf.byte + ns->regs.count, buf, len);
1852         ns->regs.count += len;
1853
1854         if (ns->regs.count == ns->regs.num) {
1855                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
1856         }
1857 }
1858
1859 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
1860 {
1861         struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1862
1863         /* Sanity and correctness checks */
1864         if (!ns->lines.ce) {
1865                 NS_ERR("read_buf: chip is disabled\n");
1866                 return;
1867         }
1868         if (ns->lines.ale || ns->lines.cle) {
1869                 NS_ERR("read_buf: ALE or CLE pin is high\n");
1870                 return;
1871         }
1872         if (!(ns->state & STATE_DATAOUT_MASK)) {
1873                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
1874                         get_state_name(ns->state));
1875                 return;
1876         }
1877
1878         if (NS_STATE(ns->state) != STATE_DATAOUT) {
1879                 int i;
1880
1881                 for (i = 0; i < len; i++)
1882                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
1883
1884                 return;
1885         }
1886
1887         /* Check if these are expected bytes */
1888         if (ns->regs.count + len > ns->regs.num) {
1889                 NS_ERR("read_buf: too many bytes to read\n");
1890                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1891                 return;
1892         }
1893
1894         memcpy(buf, ns->buf.byte + ns->regs.count, len);
1895         ns->regs.count += len;
1896
1897         if (ns->regs.count == ns->regs.num) {
1898                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1899                         ns->regs.count = 0;
1900                         if (ns->regs.row + 1 < ns->geom.pgnum)
1901                                 ns->regs.row += 1;
1902                         NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
1903                         do_state_action(ns, ACTION_CPY);
1904                 }
1905                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1906                         switch_state(ns);
1907         }
1908
1909         return;
1910 }
1911
1912 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
1913 {
1914         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
1915
1916         if (!memcmp(buf, &ns_verify_buf[0], len)) {
1917                 NS_DBG("verify_buf: the buffer is OK\n");
1918                 return 0;
1919         } else {
1920                 NS_DBG("verify_buf: the buffer is wrong\n");
1921                 return -EFAULT;
1922         }
1923 }
1924
1925 /*
1926  * Module initialization function
1927  */
1928 static int __init ns_init_module(void)
1929 {
1930         struct nand_chip *chip;
1931         struct nandsim *nand;
1932         int retval = -ENOMEM, i;
1933
1934         if (bus_width != 8 && bus_width != 16) {
1935                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
1936                 return -EINVAL;
1937         }
1938
1939         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
1940         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
1941                                 + sizeof(struct nandsim), GFP_KERNEL);
1942         if (!nsmtd) {
1943                 NS_ERR("unable to allocate core structures.\n");
1944                 return -ENOMEM;
1945         }
1946         chip        = (struct nand_chip *)(nsmtd + 1);
1947         nsmtd->priv = (void *)chip;
1948         nand        = (struct nandsim *)(chip + 1);
1949         chip->priv  = (void *)nand;
1950
1951         /*
1952          * Register simulator's callbacks.
1953          */
1954         chip->cmd_ctrl   = ns_hwcontrol;
1955         chip->read_byte  = ns_nand_read_byte;
1956         chip->dev_ready  = ns_device_ready;
1957         chip->write_buf  = ns_nand_write_buf;
1958         chip->read_buf   = ns_nand_read_buf;
1959         chip->verify_buf = ns_nand_verify_buf;
1960         chip->read_word  = ns_nand_read_word;
1961         chip->ecc.mode   = NAND_ECC_SOFT;
1962         chip->options   |= NAND_SKIP_BBTSCAN;
1963
1964         /*
1965          * Perform minimum nandsim structure initialization to handle
1966          * the initial ID read command correctly
1967          */
1968         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
1969                 nand->geom.idbytes = 4;
1970         else
1971                 nand->geom.idbytes = 2;
1972         nand->regs.status = NS_STATUS_OK(nand);
1973         nand->nxstate = STATE_UNKNOWN;
1974         nand->options |= OPT_PAGE256; /* temporary value */
1975         nand->ids[0] = first_id_byte;
1976         nand->ids[1] = second_id_byte;
1977         nand->ids[2] = third_id_byte;
1978         nand->ids[3] = fourth_id_byte;
1979         if (bus_width == 16) {
1980                 nand->busw = 16;
1981                 chip->options |= NAND_BUSWIDTH_16;
1982         }
1983
1984         nsmtd->owner = THIS_MODULE;
1985
1986         if ((retval = parse_weakblocks()) != 0)
1987                 goto error;
1988
1989         if ((retval = parse_weakpages()) != 0)
1990                 goto error;
1991
1992         if ((retval = parse_gravepages()) != 0)
1993                 goto error;
1994
1995         if ((retval = nand_scan(nsmtd, 1)) != 0) {
1996                 NS_ERR("can't register NAND Simulator\n");
1997                 if (retval > 0)
1998                         retval = -ENXIO;
1999                 goto error;
2000         }
2001
2002         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2003                 goto err_exit;
2004
2005         if ((retval = init_nandsim(nsmtd)) != 0)
2006                 goto err_exit;
2007
2008         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2009                 goto err_exit;
2010
2011         if ((retval = nand_default_bbt(nsmtd)) != 0)
2012                 goto err_exit;
2013
2014         /* Register NAND partitions */
2015         if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2016                 goto err_exit;
2017
2018         return 0;
2019
2020 err_exit:
2021         free_nandsim(nand);
2022         nand_release(nsmtd);
2023         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2024                 kfree(nand->partitions[i].name);
2025 error:
2026         kfree(nsmtd);
2027         free_lists();
2028
2029         return retval;
2030 }
2031
2032 module_init(ns_init_module);
2033
2034 /*
2035  * Module clean-up function
2036  */
2037 static void __exit ns_cleanup_module(void)
2038 {
2039         struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
2040         int i;
2041
2042         free_nandsim(ns);    /* Free nandsim private resources */
2043         nand_release(nsmtd); /* Unregister driver */
2044         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2045                 kfree(ns->partitions[i].name);
2046         kfree(nsmtd);        /* Free other structures */
2047         free_lists();
2048 }
2049
2050 module_exit(ns_cleanup_module);
2051
2052 MODULE_LICENSE ("GPL");
2053 MODULE_AUTHOR ("Artem B. Bityuckiy");
2054 MODULE_DESCRIPTION ("The NAND flash simulator");