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[MTD] [NAND] FSL-UPM: add multi chip support
[linux-2.6-omap-h63xx.git] / drivers / mtd / nand / fsl_upm.c
1 /*
2  * Freescale UPM NAND driver.
3  *
4  * Copyright © 2007-2008  MontaVista Software, Inc.
5  *
6  * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/mtd/nand.h>
18 #include <linux/mtd/nand_ecc.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/of_platform.h>
22 #include <linux/of_gpio.h>
23 #include <linux/io.h>
24 #include <asm/fsl_lbc.h>
25
26 struct fsl_upm_nand {
27         struct device *dev;
28         struct mtd_info mtd;
29         struct nand_chip chip;
30         int last_ctrl;
31 #ifdef CONFIG_MTD_PARTITIONS
32         struct mtd_partition *parts;
33 #endif
34
35         struct fsl_upm upm;
36         uint8_t upm_addr_offset;
37         uint8_t upm_cmd_offset;
38         void __iomem *io_base;
39         int rnb_gpio[NAND_MAX_CHIPS];
40         uint32_t mchip_offsets[NAND_MAX_CHIPS];
41         uint32_t mchip_count;
42         uint32_t mchip_number;
43         int chip_delay;
44 };
45
46 #define to_fsl_upm_nand(mtd) container_of(mtd, struct fsl_upm_nand, mtd)
47
48 static int fun_chip_ready(struct mtd_info *mtd)
49 {
50         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
51
52         if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
53                 return 1;
54
55         dev_vdbg(fun->dev, "busy\n");
56         return 0;
57 }
58
59 static void fun_wait_rnb(struct fsl_upm_nand *fun)
60 {
61         if (fun->rnb_gpio[fun->mchip_number] >= 0) {
62                 int cnt = 1000000;
63
64                 while (--cnt && !fun_chip_ready(&fun->mtd))
65                         cpu_relax();
66                 if (!cnt)
67                         dev_err(fun->dev, "tired waiting for RNB\n");
68         } else {
69                 ndelay(100);
70         }
71 }
72
73 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
74 {
75         struct nand_chip *chip = mtd->priv;
76         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
77         u32 mar;
78
79         if (!(ctrl & fun->last_ctrl)) {
80                 fsl_upm_end_pattern(&fun->upm);
81
82                 if (cmd == NAND_CMD_NONE)
83                         return;
84
85                 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
86         }
87
88         if (ctrl & NAND_CTRL_CHANGE) {
89                 if (ctrl & NAND_ALE)
90                         fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
91                 else if (ctrl & NAND_CLE)
92                         fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
93         }
94
95         mar = (cmd << (32 - fun->upm.width)) |
96                 fun->mchip_offsets[fun->mchip_number];
97         fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
98
99         fun_wait_rnb(fun);
100 }
101
102 static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
103 {
104         struct nand_chip *chip = mtd->priv;
105         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
106
107         if (mchip_nr == -1) {
108                 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
109         } else if (mchip_nr >= 0) {
110                 fun->mchip_number = mchip_nr;
111                 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
112                 chip->IO_ADDR_W = chip->IO_ADDR_R;
113         } else {
114                 BUG();
115         }
116 }
117
118 static uint8_t fun_read_byte(struct mtd_info *mtd)
119 {
120         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
121
122         return in_8(fun->chip.IO_ADDR_R);
123 }
124
125 static void fun_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
126 {
127         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
128         int i;
129
130         for (i = 0; i < len; i++)
131                 buf[i] = in_8(fun->chip.IO_ADDR_R);
132 }
133
134 static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
135 {
136         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
137         int i;
138
139         for (i = 0; i < len; i++) {
140                 out_8(fun->chip.IO_ADDR_W, buf[i]);
141                 fun_wait_rnb(fun);
142         }
143 }
144
145 static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
146                                    const struct device_node *upm_np,
147                                    const struct resource *io_res)
148 {
149         int ret;
150         struct device_node *flash_np;
151 #ifdef CONFIG_MTD_PARTITIONS
152         static const char *part_types[] = { "cmdlinepart", NULL, };
153 #endif
154
155         fun->chip.IO_ADDR_R = fun->io_base;
156         fun->chip.IO_ADDR_W = fun->io_base;
157         fun->chip.cmd_ctrl = fun_cmd_ctrl;
158         fun->chip.chip_delay = fun->chip_delay;
159         fun->chip.read_byte = fun_read_byte;
160         fun->chip.read_buf = fun_read_buf;
161         fun->chip.write_buf = fun_write_buf;
162         fun->chip.ecc.mode = NAND_ECC_SOFT;
163         if (fun->mchip_count > 1)
164                 fun->chip.select_chip = fun_select_chip;
165
166         if (fun->rnb_gpio[0] >= 0)
167                 fun->chip.dev_ready = fun_chip_ready;
168
169         fun->mtd.priv = &fun->chip;
170         fun->mtd.owner = THIS_MODULE;
171
172         flash_np = of_get_next_child(upm_np, NULL);
173         if (!flash_np)
174                 return -ENODEV;
175
176         fun->mtd.name = kasprintf(GFP_KERNEL, "%x.%s", io_res->start,
177                                   flash_np->name);
178         if (!fun->mtd.name) {
179                 ret = -ENOMEM;
180                 goto err;
181         }
182
183         ret = nand_scan(&fun->mtd, fun->mchip_count);
184         if (ret)
185                 goto err;
186
187 #ifdef CONFIG_MTD_PARTITIONS
188         ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0);
189
190 #ifdef CONFIG_MTD_OF_PARTS
191         if (ret == 0) {
192                 ret = of_mtd_parse_partitions(fun->dev, flash_np, &fun->parts);
193                 if (ret < 0)
194                         goto err;
195         }
196 #endif
197         if (ret > 0)
198                 ret = add_mtd_partitions(&fun->mtd, fun->parts, ret);
199         else
200 #endif
201                 ret = add_mtd_device(&fun->mtd);
202 err:
203         of_node_put(flash_np);
204         return ret;
205 }
206
207 static int __devinit fun_probe(struct of_device *ofdev,
208                                const struct of_device_id *ofid)
209 {
210         struct fsl_upm_nand *fun;
211         struct resource io_res;
212         const uint32_t *prop;
213         int rnb_gpio;
214         int ret;
215         int size;
216         int i;
217
218         fun = kzalloc(sizeof(*fun), GFP_KERNEL);
219         if (!fun)
220                 return -ENOMEM;
221
222         ret = of_address_to_resource(ofdev->node, 0, &io_res);
223         if (ret) {
224                 dev_err(&ofdev->dev, "can't get IO base\n");
225                 goto err1;
226         }
227
228         ret = fsl_upm_find(io_res.start, &fun->upm);
229         if (ret) {
230                 dev_err(&ofdev->dev, "can't find UPM\n");
231                 goto err1;
232         }
233
234         prop = of_get_property(ofdev->node, "fsl,upm-addr-offset", &size);
235         if (!prop || size != sizeof(uint32_t)) {
236                 dev_err(&ofdev->dev, "can't get UPM address offset\n");
237                 ret = -EINVAL;
238                 goto err1;
239         }
240         fun->upm_addr_offset = *prop;
241
242         prop = of_get_property(ofdev->node, "fsl,upm-cmd-offset", &size);
243         if (!prop || size != sizeof(uint32_t)) {
244                 dev_err(&ofdev->dev, "can't get UPM command offset\n");
245                 ret = -EINVAL;
246                 goto err1;
247         }
248         fun->upm_cmd_offset = *prop;
249
250         prop = of_get_property(ofdev->node,
251                                "fsl,upm-addr-line-cs-offsets", &size);
252         if (prop && (size / sizeof(uint32_t)) > 0) {
253                 fun->mchip_count = size / sizeof(uint32_t);
254                 if (fun->mchip_count >= NAND_MAX_CHIPS) {
255                         dev_err(&ofdev->dev, "too much multiple chips\n");
256                         goto err1;
257                 }
258                 for (i = 0; i < fun->mchip_count; i++)
259                         fun->mchip_offsets[i] = prop[i];
260         } else {
261                 fun->mchip_count = 1;
262         }
263
264         for (i = 0; i < fun->mchip_count; i++) {
265                 fun->rnb_gpio[i] = -1;
266                 rnb_gpio = of_get_gpio(ofdev->node, i);
267                 if (rnb_gpio >= 0) {
268                         ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
269                         if (ret) {
270                                 dev_err(&ofdev->dev,
271                                         "can't request RNB gpio #%d\n", i);
272                                 goto err2;
273                         }
274                         gpio_direction_input(rnb_gpio);
275                         fun->rnb_gpio[i] = rnb_gpio;
276                 } else if (rnb_gpio == -EINVAL) {
277                         dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
278                         goto err2;
279                 }
280         }
281
282         prop = of_get_property(ofdev->node, "chip-delay", NULL);
283         if (prop)
284                 fun->chip_delay = *prop;
285         else
286                 fun->chip_delay = 50;
287
288         fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
289                                             io_res.end - io_res.start + 1);
290         if (!fun->io_base) {
291                 ret = -ENOMEM;
292                 goto err2;
293         }
294
295         fun->dev = &ofdev->dev;
296         fun->last_ctrl = NAND_CLE;
297
298         ret = fun_chip_init(fun, ofdev->node, &io_res);
299         if (ret)
300                 goto err2;
301
302         dev_set_drvdata(&ofdev->dev, fun);
303
304         return 0;
305 err2:
306         for (i = 0; i < fun->mchip_count; i++) {
307                 if (fun->rnb_gpio[i] < 0)
308                         break;
309                 gpio_free(fun->rnb_gpio[i]);
310         }
311 err1:
312         kfree(fun);
313
314         return ret;
315 }
316
317 static int __devexit fun_remove(struct of_device *ofdev)
318 {
319         struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
320         int i;
321
322         nand_release(&fun->mtd);
323         kfree(fun->mtd.name);
324
325         for (i = 0; i < fun->mchip_count; i++) {
326                 if (fun->rnb_gpio[i] < 0)
327                         break;
328                 gpio_free(fun->rnb_gpio[i]);
329         }
330
331         kfree(fun);
332
333         return 0;
334 }
335
336 static struct of_device_id of_fun_match[] = {
337         { .compatible = "fsl,upm-nand" },
338         {},
339 };
340 MODULE_DEVICE_TABLE(of, of_fun_match);
341
342 static struct of_platform_driver of_fun_driver = {
343         .name           = "fsl,upm-nand",
344         .match_table    = of_fun_match,
345         .probe          = fun_probe,
346         .remove         = __devexit_p(fun_remove),
347 };
348
349 static int __init fun_module_init(void)
350 {
351         return of_register_platform_driver(&of_fun_driver);
352 }
353 module_init(fun_module_init);
354
355 static void __exit fun_module_exit(void)
356 {
357         of_unregister_platform_driver(&of_fun_driver);
358 }
359 module_exit(fun_module_exit);
360
361 MODULE_LICENSE("GPL");
362 MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
363 MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
364                    "LocalBus User-Programmable Machine");