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[MTD] [NAND] fsl_upm: update driver for the new OF bindings
[linux-2.6-omap-h63xx.git] / drivers / mtd / nand / fsl_upm.c
1 /*
2  * Freescale UPM NAND driver.
3  *
4  * Copyright © 2007-2008  MontaVista Software, Inc.
5  *
6  * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mtd/nand.h>
17 #include <linux/mtd/nand_ecc.h>
18 #include <linux/mtd/partitions.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/of_platform.h>
21 #include <linux/of_gpio.h>
22 #include <linux/io.h>
23 #include <asm/fsl_lbc.h>
24
25 struct fsl_upm_nand {
26         struct device *dev;
27         struct mtd_info mtd;
28         struct nand_chip chip;
29         int last_ctrl;
30 #ifdef CONFIG_MTD_PARTITIONS
31         struct mtd_partition *parts;
32 #endif
33
34         struct fsl_upm upm;
35         uint8_t upm_addr_offset;
36         uint8_t upm_cmd_offset;
37         void __iomem *io_base;
38         int rnb_gpio;
39 };
40
41 #define to_fsl_upm_nand(mtd) container_of(mtd, struct fsl_upm_nand, mtd)
42
43 static int fun_chip_ready(struct mtd_info *mtd)
44 {
45         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
46
47         if (gpio_get_value(fun->rnb_gpio))
48                 return 1;
49
50         dev_vdbg(fun->dev, "busy\n");
51         return 0;
52 }
53
54 static void fun_wait_rnb(struct fsl_upm_nand *fun)
55 {
56         int cnt = 1000000;
57
58         if (fun->rnb_gpio >= 0) {
59                 while (--cnt && !fun_chip_ready(&fun->mtd))
60                         cpu_relax();
61         }
62
63         if (!cnt)
64                 dev_err(fun->dev, "tired waiting for RNB\n");
65 }
66
67 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
68 {
69         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
70
71         if (!(ctrl & fun->last_ctrl)) {
72                 fsl_upm_end_pattern(&fun->upm);
73
74                 if (cmd == NAND_CMD_NONE)
75                         return;
76
77                 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
78         }
79
80         if (ctrl & NAND_CTRL_CHANGE) {
81                 if (ctrl & NAND_ALE)
82                         fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
83                 else if (ctrl & NAND_CLE)
84                         fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
85         }
86
87         fsl_upm_run_pattern(&fun->upm, fun->io_base, cmd);
88
89         fun_wait_rnb(fun);
90 }
91
92 static uint8_t fun_read_byte(struct mtd_info *mtd)
93 {
94         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
95
96         return in_8(fun->chip.IO_ADDR_R);
97 }
98
99 static void fun_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
100 {
101         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
102         int i;
103
104         for (i = 0; i < len; i++)
105                 buf[i] = in_8(fun->chip.IO_ADDR_R);
106 }
107
108 static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
109 {
110         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
111         int i;
112
113         for (i = 0; i < len; i++) {
114                 out_8(fun->chip.IO_ADDR_W, buf[i]);
115                 fun_wait_rnb(fun);
116         }
117 }
118
119 static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
120                                    const struct device_node *upm_np,
121                                    const struct resource *io_res)
122 {
123         int ret;
124         struct device_node *flash_np;
125 #ifdef CONFIG_MTD_PARTITIONS
126         static const char *part_types[] = { "cmdlinepart", NULL, };
127 #endif
128
129         fun->chip.IO_ADDR_R = fun->io_base;
130         fun->chip.IO_ADDR_W = fun->io_base;
131         fun->chip.cmd_ctrl = fun_cmd_ctrl;
132         fun->chip.chip_delay = 50;
133         fun->chip.read_byte = fun_read_byte;
134         fun->chip.read_buf = fun_read_buf;
135         fun->chip.write_buf = fun_write_buf;
136         fun->chip.ecc.mode = NAND_ECC_SOFT;
137
138         if (fun->rnb_gpio >= 0)
139                 fun->chip.dev_ready = fun_chip_ready;
140
141         fun->mtd.priv = &fun->chip;
142         fun->mtd.owner = THIS_MODULE;
143
144         flash_np = of_get_next_child(upm_np, NULL);
145         if (!flash_np)
146                 return -ENODEV;
147
148         fun->mtd.name = kasprintf(GFP_KERNEL, "%x.%s", io_res->start,
149                                   flash_np->name);
150         if (!fun->mtd.name) {
151                 ret = -ENOMEM;
152                 goto err;
153         }
154
155         ret = nand_scan(&fun->mtd, 1);
156         if (ret)
157                 goto err;
158
159 #ifdef CONFIG_MTD_PARTITIONS
160         ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0);
161
162 #ifdef CONFIG_MTD_OF_PARTS
163         if (ret == 0)
164                 ret = of_mtd_parse_partitions(fun->dev, &fun->mtd,
165                                               flash_np, &fun->parts);
166 #endif
167         if (ret > 0)
168                 ret = add_mtd_partitions(&fun->mtd, fun->parts, ret);
169         else
170 #endif
171                 ret = add_mtd_device(&fun->mtd);
172 err:
173         of_node_put(flash_np);
174         return ret;
175 }
176
177 static int __devinit fun_probe(struct of_device *ofdev,
178                                const struct of_device_id *ofid)
179 {
180         struct fsl_upm_nand *fun;
181         struct resource io_res;
182         const uint32_t *prop;
183         int ret;
184         int size;
185
186         fun = kzalloc(sizeof(*fun), GFP_KERNEL);
187         if (!fun)
188                 return -ENOMEM;
189
190         ret = of_address_to_resource(ofdev->node, 0, &io_res);
191         if (ret) {
192                 dev_err(&ofdev->dev, "can't get IO base\n");
193                 goto err1;
194         }
195
196         ret = fsl_upm_find(io_res.start, &fun->upm);
197         if (ret) {
198                 dev_err(&ofdev->dev, "can't find UPM\n");
199                 goto err1;
200         }
201
202         prop = of_get_property(ofdev->node, "fsl,upm-addr-offset", &size);
203         if (!prop || size != sizeof(uint32_t)) {
204                 dev_err(&ofdev->dev, "can't get UPM address offset\n");
205                 ret = -EINVAL;
206                 goto err2;
207         }
208         fun->upm_addr_offset = *prop;
209
210         prop = of_get_property(ofdev->node, "fsl,upm-cmd-offset", &size);
211         if (!prop || size != sizeof(uint32_t)) {
212                 dev_err(&ofdev->dev, "can't get UPM command offset\n");
213                 ret = -EINVAL;
214                 goto err2;
215         }
216         fun->upm_cmd_offset = *prop;
217
218         fun->rnb_gpio = of_get_gpio(ofdev->node, 0);
219         if (fun->rnb_gpio >= 0) {
220                 ret = gpio_request(fun->rnb_gpio, ofdev->dev.bus_id);
221                 if (ret) {
222                         dev_err(&ofdev->dev, "can't request RNB gpio\n");
223                         goto err2;
224                 }
225                 gpio_direction_input(fun->rnb_gpio);
226         } else if (fun->rnb_gpio == -EINVAL) {
227                 dev_err(&ofdev->dev, "specified RNB gpio is invalid\n");
228                 goto err2;
229         }
230
231         fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
232                                           io_res.end - io_res.start + 1);
233         if (!fun->io_base) {
234                 ret = -ENOMEM;
235                 goto err2;
236         }
237
238         fun->dev = &ofdev->dev;
239         fun->last_ctrl = NAND_CLE;
240
241         ret = fun_chip_init(fun, ofdev->node, &io_res);
242         if (ret)
243                 goto err2;
244
245         dev_set_drvdata(&ofdev->dev, fun);
246
247         return 0;
248 err2:
249         if (fun->rnb_gpio >= 0)
250                 gpio_free(fun->rnb_gpio);
251 err1:
252         kfree(fun);
253
254         return ret;
255 }
256
257 static int __devexit fun_remove(struct of_device *ofdev)
258 {
259         struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
260
261         nand_release(&fun->mtd);
262         kfree(fun->mtd.name);
263
264         if (fun->rnb_gpio >= 0)
265                 gpio_free(fun->rnb_gpio);
266
267         kfree(fun);
268
269         return 0;
270 }
271
272 static struct of_device_id of_fun_match[] = {
273         { .compatible = "fsl,upm-nand" },
274         {},
275 };
276 MODULE_DEVICE_TABLE(of, of_fun_match);
277
278 static struct of_platform_driver of_fun_driver = {
279         .name           = "fsl,upm-nand",
280         .match_table    = of_fun_match,
281         .probe          = fun_probe,
282         .remove         = __devexit_p(fun_remove),
283 };
284
285 static int __init fun_module_init(void)
286 {
287         return of_register_platform_driver(&of_fun_driver);
288 }
289 module_init(fun_module_init);
290
291 static void __exit fun_module_exit(void)
292 {
293         of_unregister_platform_driver(&of_fun_driver);
294 }
295 module_exit(fun_module_exit);
296
297 MODULE_LICENSE("GPL");
298 MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
299 MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
300                    "LocalBus User-Programmable Machine");