2 * Copyright (C) 2003 Rick Bronson
4 * Derived from drivers/mtd/nand/autcpu12.c
5 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
7 * Derived from drivers/mtd/spia.c
8 * Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
11 * Add Hardware ECC support for AT91SAM9260 / AT91SAM9263
12 * Richard Genoud (richard.genoud@gmail.com), Adeneo Copyright (C) 2007
14 * Derived from Das U-Boot source code
15 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
16 * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation.
25 #include <linux/slab.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/nand.h>
30 #include <linux/mtd/partitions.h>
32 #include <linux/gpio.h>
35 #include <asm/arch/board.h>
37 #ifdef CONFIG_MTD_NAND_ATMEL_ECC_HW
43 #ifdef CONFIG_MTD_NAND_ATMEL_ECC_NONE
49 /* Register access macros */
50 #define ecc_readl(add, reg) \
51 __raw_readl(add + ATMEL_ECC_##reg)
52 #define ecc_writel(add, reg, value) \
53 __raw_writel((value), add + ATMEL_ECC_##reg)
55 #include "atmel_nand_ecc.h" /* Hardware ECC registers */
57 /* oob layout for large page size
58 * bad block info is on bytes 0 and 1
59 * the bytes have to be consecutives to avoid
60 * several NAND_CMD_RNDOUT during read
62 static struct nand_ecclayout atmel_oobinfo_large = {
64 .eccpos = {60, 61, 62, 63},
70 /* oob layout for small page size
71 * bad block info is on bytes 4 and 5
72 * the bytes have to be consecutives to avoid
73 * several NAND_CMD_RNDOUT during read
75 static struct nand_ecclayout atmel_oobinfo_small = {
77 .eccpos = {0, 1, 2, 3},
83 struct atmel_nand_host {
84 struct nand_chip nand_chip;
86 void __iomem *io_base;
87 struct atmel_nand_data *board;
95 static void atmel_nand_enable(struct atmel_nand_host *host)
97 if (host->board->enable_pin)
98 gpio_set_value(host->board->enable_pin, 0);
104 static void atmel_nand_disable(struct atmel_nand_host *host)
106 if (host->board->enable_pin)
107 gpio_set_value(host->board->enable_pin, 1);
111 * Hardware specific access to control-lines
113 static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
115 struct nand_chip *nand_chip = mtd->priv;
116 struct atmel_nand_host *host = nand_chip->priv;
118 if (ctrl & NAND_CTRL_CHANGE) {
120 atmel_nand_enable(host);
122 atmel_nand_disable(host);
124 if (cmd == NAND_CMD_NONE)
128 writeb(cmd, host->io_base + (1 << host->board->cle));
130 writeb(cmd, host->io_base + (1 << host->board->ale));
134 * Read the Device Ready pin.
136 static int atmel_nand_device_ready(struct mtd_info *mtd)
138 struct nand_chip *nand_chip = mtd->priv;
139 struct atmel_nand_host *host = nand_chip->priv;
141 return gpio_get_value(host->board->rdy_pin);
145 * write oob for small pages
147 static int atmel_nand_write_oob_512(struct mtd_info *mtd,
148 struct nand_chip *chip, int page)
150 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
151 int eccsize = chip->ecc.size, length = mtd->oobsize;
152 int len, pos, status = 0;
153 const uint8_t *bufpoi = chip->oob_poi;
155 pos = eccsize + chunk;
157 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
158 len = min_t(int, length, chunk);
159 chip->write_buf(mtd, bufpoi, len);
163 chip->write_buf(mtd, bufpoi, length);
165 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
166 status = chip->waitfunc(mtd, chip);
168 return status & NAND_STATUS_FAIL ? -EIO : 0;
173 * read oob for small pages
175 static int atmel_nand_read_oob_512(struct mtd_info *mtd,
176 struct nand_chip *chip, int page, int sndcmd)
179 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
182 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
189 * function called after a write
191 * mtd: MTD block structure
192 * dat: raw data (unused)
193 * ecc_code: buffer for ECC
195 static int atmel_nand_calculate(struct mtd_info *mtd,
196 const u_char *dat, unsigned char *ecc_code)
198 struct nand_chip *nand_chip = mtd->priv;
199 struct atmel_nand_host *host = nand_chip->priv;
200 uint32_t *eccpos = nand_chip->ecc.layout->eccpos;
201 unsigned int ecc_value;
203 /* get the first 2 ECC bytes */
204 ecc_value = ecc_readl(host->ecc, PR);
206 ecc_code[eccpos[0]] = ecc_value & 0xFF;
207 ecc_code[eccpos[1]] = (ecc_value >> 8) & 0xFF;
209 /* get the last 2 ECC bytes */
210 ecc_value = ecc_readl(host->ecc, NPR) & ATMEL_ECC_NPARITY;
212 ecc_code[eccpos[2]] = ecc_value & 0xFF;
213 ecc_code[eccpos[3]] = (ecc_value >> 8) & 0xFF;
219 * HW ECC read page function
221 * mtd: mtd info structure
222 * chip: nand chip info structure
223 * buf: buffer to store read data
225 static int atmel_nand_read_page(struct mtd_info *mtd,
226 struct nand_chip *chip, uint8_t *buf)
228 int eccsize = chip->ecc.size;
229 int eccbytes = chip->ecc.bytes;
230 uint32_t *eccpos = chip->ecc.layout->eccpos;
232 uint8_t *oob = chip->oob_poi;
237 chip->read_buf(mtd, p, eccsize);
239 /* move to ECC position if needed */
240 if (eccpos[0] != 0) {
241 /* This only works on large pages
242 * because the ECC controller waits for
243 * NAND_CMD_RNDOUTSTART after the
245 * anyway, for small pages, the eccpos[0] == 0
247 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
248 mtd->writesize + eccpos[0], -1);
251 /* the ECC controller needs to read the ECC just after the data */
252 ecc_pos = oob + eccpos[0];
253 chip->read_buf(mtd, ecc_pos, eccbytes);
255 /* check if there's an error */
256 stat = chip->ecc.correct(mtd, p, oob, NULL);
259 mtd->ecc_stats.failed++;
261 mtd->ecc_stats.corrected += stat;
263 /* get back to oob start (end of page) */
264 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
267 chip->read_buf(mtd, oob, mtd->oobsize);
275 * function called after a read
277 * mtd: MTD block structure
278 * dat: raw data read from the chip
279 * read_ecc: ECC from the chip (unused)
282 * Detect and correct a 1 bit error for a page
284 static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
285 u_char *read_ecc, u_char *isnull)
287 struct nand_chip *nand_chip = mtd->priv;
288 struct atmel_nand_host *host = nand_chip->priv;
289 unsigned int ecc_status;
290 unsigned int ecc_word, ecc_bit;
292 /* get the status from the Status Register */
293 ecc_status = ecc_readl(host->ecc, SR);
295 /* if there's no error */
296 if (likely(!(ecc_status & ATMEL_ECC_RECERR)))
299 /* get error bit offset (4 bits) */
300 ecc_bit = ecc_readl(host->ecc, PR) & ATMEL_ECC_BITADDR;
301 /* get word address (12 bits) */
302 ecc_word = ecc_readl(host->ecc, PR) & ATMEL_ECC_WORDADDR;
305 /* if there are multiple errors */
306 if (ecc_status & ATMEL_ECC_MULERR) {
307 /* check if it is a freshly erased block
308 * (filled with 0xff) */
309 if ((ecc_bit == ATMEL_ECC_BITADDR)
310 && (ecc_word == (ATMEL_ECC_WORDADDR >> 4))) {
311 /* the block has just been erased, return OK */
314 /* it doesn't seems to be a freshly
316 * We can't correct so many errors */
317 dev_dbg(host->dev, "atmel_nand : multiple errors detected."
318 " Unable to correct.\n");
322 /* if there's a single bit error : we can correct it */
323 if (ecc_status & ATMEL_ECC_ECCERR) {
324 /* there's nothing much to do here.
325 * the bit error is on the ECC itself.
327 dev_dbg(host->dev, "atmel_nand : one bit error on ECC code."
328 " Nothing to correct\n");
332 dev_dbg(host->dev, "atmel_nand : one bit error on data."
333 " (word offset in the page :"
334 " 0x%x bit offset : 0x%x)\n",
336 /* correct the error */
337 if (nand_chip->options & NAND_BUSWIDTH_16) {
339 ((unsigned short *) dat)[ecc_word] ^= (1 << ecc_bit);
342 dat[ecc_word] ^= (1 << ecc_bit);
344 dev_dbg(host->dev, "atmel_nand : error corrected\n");
349 * Enable HW ECC : unsused
351 static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) { ; }
353 #ifdef CONFIG_MTD_PARTITIONS
354 static const char *part_probes[] = { "cmdlinepart", NULL };
358 * Probe for the NAND device.
360 static int __init atmel_nand_probe(struct platform_device *pdev)
362 struct atmel_nand_host *host;
363 struct mtd_info *mtd;
364 struct nand_chip *nand_chip;
365 struct resource *regs;
366 struct resource *mem;
369 #ifdef CONFIG_MTD_PARTITIONS
370 struct mtd_partition *partitions = NULL;
371 int num_partitions = 0;
374 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
376 printk(KERN_ERR "atmel_nand: can't get I/O resource mem\n");
380 /* Allocate memory for the device structure (and zero it) */
381 host = kzalloc(sizeof(struct atmel_nand_host), GFP_KERNEL);
383 printk(KERN_ERR "atmel_nand: failed to allocate device structure.\n");
387 host->io_base = ioremap(mem->start, mem->end - mem->start + 1);
388 if (host->io_base == NULL) {
389 printk(KERN_ERR "atmel_nand: ioremap failed\n");
391 goto err_nand_ioremap;
395 nand_chip = &host->nand_chip;
396 host->board = pdev->dev.platform_data;
397 host->dev = &pdev->dev;
399 nand_chip->priv = host; /* link the private data structures */
400 mtd->priv = nand_chip;
401 mtd->owner = THIS_MODULE;
403 /* Set address of NAND IO lines */
404 nand_chip->IO_ADDR_R = host->io_base;
405 nand_chip->IO_ADDR_W = host->io_base;
406 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
408 if (host->board->rdy_pin)
409 nand_chip->dev_ready = atmel_nand_device_ready;
411 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
412 if (!regs && hard_ecc) {
413 printk(KERN_ERR "atmel_nand: can't get I/O resource "
414 "regs\nFalling back on software ECC\n");
417 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
419 nand_chip->ecc.mode = NAND_ECC_NONE;
420 if (hard_ecc && regs) {
421 host->ecc = ioremap(regs->start, regs->end - regs->start + 1);
422 if (host->ecc == NULL) {
423 printk(KERN_ERR "atmel_nand: ioremap failed\n");
425 goto err_ecc_ioremap;
427 nand_chip->ecc.mode = NAND_ECC_HW_SYNDROME;
428 nand_chip->ecc.calculate = atmel_nand_calculate;
429 nand_chip->ecc.correct = atmel_nand_correct;
430 nand_chip->ecc.hwctl = atmel_nand_hwctl;
431 nand_chip->ecc.read_page = atmel_nand_read_page;
432 nand_chip->ecc.bytes = 4;
433 nand_chip->ecc.prepad = 0;
434 nand_chip->ecc.postpad = 0;
437 nand_chip->chip_delay = 20; /* 20us command delay time */
439 if (host->board->bus_width_16) /* 16-bit bus width */
440 nand_chip->options |= NAND_BUSWIDTH_16;
442 platform_set_drvdata(pdev, host);
443 atmel_nand_enable(host);
445 if (host->board->det_pin) {
446 if (gpio_get_value(host->board->det_pin)) {
447 printk("No SmartMedia card inserted.\n");
453 /* first scan to find the device and get the page size */
454 if (nand_scan_ident(mtd, 1)) {
459 if (nand_chip->ecc.mode == NAND_ECC_HW_SYNDROME) {
460 /* ECC is calculated for the whole page (1 step) */
461 nand_chip->ecc.size = mtd->writesize;
463 /* set ECC page size and oob layout */
464 switch (mtd->writesize) {
466 nand_chip->ecc.layout = &atmel_oobinfo_small;
467 nand_chip->ecc.read_oob = atmel_nand_read_oob_512;
468 nand_chip->ecc.write_oob = atmel_nand_write_oob_512;
469 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528);
472 nand_chip->ecc.layout = &atmel_oobinfo_large;
473 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056);
476 nand_chip->ecc.layout = &atmel_oobinfo_large;
477 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112);
480 nand_chip->ecc.layout = &atmel_oobinfo_large;
481 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224);
484 /* page size not handled by HW ECC */
485 /* switching back to soft ECC */
486 nand_chip->ecc.mode = NAND_ECC_SOFT;
487 nand_chip->ecc.calculate = NULL;
488 nand_chip->ecc.correct = NULL;
489 nand_chip->ecc.hwctl = NULL;
490 nand_chip->ecc.read_page = NULL;
491 nand_chip->ecc.postpad = 0;
492 nand_chip->ecc.prepad = 0;
493 nand_chip->ecc.bytes = 0;
498 /* second phase scan */
499 if (nand_scan_tail(mtd)) {
504 #ifdef CONFIG_MTD_PARTITIONS
505 #ifdef CONFIG_MTD_CMDLINE_PARTS
506 mtd->name = "atmel_nand";
507 num_partitions = parse_mtd_partitions(mtd, part_probes,
510 if (num_partitions <= 0 && host->board->partition_info)
511 partitions = host->board->partition_info(mtd->size,
514 if ((!partitions) || (num_partitions == 0)) {
515 printk(KERN_ERR "atmel_nand: No parititions defined, or unsupported device.\n");
517 goto err_no_partitions;
520 res = add_mtd_partitions(mtd, partitions, num_partitions);
522 res = add_mtd_device(mtd);
528 #ifdef CONFIG_MTD_PARTITIONS
535 atmel_nand_disable(host);
536 platform_set_drvdata(pdev, NULL);
540 iounmap(host->io_base);
547 * Remove a NAND device.
549 static int __devexit atmel_nand_remove(struct platform_device *pdev)
551 struct atmel_nand_host *host = platform_get_drvdata(pdev);
552 struct mtd_info *mtd = &host->mtd;
556 atmel_nand_disable(host);
560 iounmap(host->io_base);
566 static struct platform_driver atmel_nand_driver = {
567 .probe = atmel_nand_probe,
568 .remove = atmel_nand_remove,
570 .name = "atmel_nand",
571 .owner = THIS_MODULE,
575 static int __init atmel_nand_init(void)
577 return platform_driver_register(&atmel_nand_driver);
581 static void __exit atmel_nand_exit(void)
583 platform_driver_unregister(&atmel_nand_driver);
587 module_init(atmel_nand_init);
588 module_exit(atmel_nand_exit);
590 MODULE_LICENSE("GPL");
591 MODULE_AUTHOR("Rick Bronson");
592 MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91 / AVR32");
593 MODULE_ALIAS("platform:atmel_nand");