drivers/mmc/omap.c

   1 /*
   2  *  linux/drivers/media/mmc/omap.c
   3  *
   4  *  Copyright (C) 2004 Nokia Corporation
   5  *  Written by Tuukka Tikkanen and Juha Yrjölä <juha.yrjola@nokia.com>
   6  *  Misc hacks here and there by Tony Lindgren <tony@atomide.com>
   7  *  Other hacks (DMA, SD, etc) by David Brownell
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/config.h>
  15
  16 // #define CONFIG_MMC_DEBUG
  17 #ifdef CONFIG_MMC_DEBUG
  18 #define DEBUG   /* for dev_dbg(), pr_debug(), etc */
  19 #endif
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/init.h>
  24 #include <linux/ioport.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/delay.h>
  29 #include <linux/spinlock.h>
  30 #include <linux/timer.h>
  31 #include <linux/mmc/host.h>
  32 #include <linux/mmc/protocol.h>
  33 #include <linux/mmc/card.h>
  34 #include <linux/clk.h>
  35
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/scatterlist.h>
  39 #include <asm/mach-types.h>
  40
  41 #include <asm/arch/board.h>
  42 #include <asm/arch/gpio.h>
  43 #include <asm/arch/dma.h>
  44 #include <asm/arch/mux.h>
  45 #include <asm/arch/fpga.h>
  46 #include <asm/arch/tps65010.h>
  47 #include <asm/arch/menelaus.h>
  48
  49 #include "omap.h"
  50
  51 #define DRIVER_NAME "mmci-omap"
  52
  53 #ifdef CONFIG_MMC_DEBUG
  54 #define DBG(x...)       pr_debug(x)
  55 //#define DBG(x...)     printk(x)
  56 #else
  57 #define DBG(x...)       do { } while (0)
  58 #endif
  59
  60 /* Specifies how often in millisecs to poll for card status changes
  61  * when the cover switch is open */
  62 #define OMAP_MMC_SWITCH_POLL_DELAY      500
  63
  64 static int mmc_omap_enable_poll = 1;
  65
  66 struct mmc_omap_host {
  67         int                     initialized;
  68         int                     suspended;
  69         struct mmc_request *    mrq;
  70         struct mmc_command *    cmd;
  71         struct mmc_data *       data;
  72         struct mmc_host *       mmc;
  73         struct device *         dev;
  74         unsigned char           id; /* 16xx chips have 2 MMC blocks */
  75         struct clk *            iclk;
  76         struct clk *            fclk;
  77         void __iomem            *base;
  78         int                     irq;
  79         unsigned char           bus_mode;
  80         unsigned char           hw_bus_mode;
  81
  82         unsigned int            sg_len;
  83         int                     sg_idx;
  84         u16 *                   buffer;
  85         u32                     buffer_bytes_left;
  86         u32                     total_bytes_left;
  87
  88         unsigned                use_dma:1;
  89         unsigned                brs_received:1, dma_done:1;
  90         unsigned                dma_is_read:1;
  91         unsigned                dma_in_use:1;
  92         int                     dma_ch;
  93         spinlock_t              dma_lock;
  94         struct timer_list       dma_timer;
  95         unsigned                dma_len;
  96
  97         short                   power_pin;
  98         short                   wp_pin;
  99
 100         int                     switch_pin;
 101         struct work_struct      switch_work;
 102         struct timer_list       switch_timer;
 103         int                     switch_last_state;
 104 };
 105
 106 static inline int
 107 mmc_omap_cover_is_open(struct mmc_omap_host *host)
 108 {
 109         if (host->switch_pin < 0)
 110                 return 0;
 111         return omap_get_gpio_datain(host->switch_pin);
 112 }
 113
 114 static ssize_t
 115 mmc_omap_show_cover_switch(struct device *dev,
 116         struct device_attribute *attr, char *buf)
 117 {
 118         struct mmc_omap_host *host = dev_get_drvdata(dev);
 119
 120         return sprintf(buf, "%s\n", mmc_omap_cover_is_open(host) ? "open" : "closed");
 121 }
 122
 123 static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
 124
 125 static ssize_t
 126 mmc_omap_show_enable_poll(struct device *dev,
 127         struct device_attribute *attr, char *buf)
 128 {
 129         return snprintf(buf, PAGE_SIZE, "%d\n", mmc_omap_enable_poll);
 130 }
 131
 132 static ssize_t
 133 mmc_omap_store_enable_poll(struct device *dev,
 134         struct device_attribute *attr, const char *buf,
 135         size_t size)
 136 {
 137         int enable_poll;
 138
 139         if (sscanf(buf, "%10d", &enable_poll) != 1)
 140                 return -EINVAL;
 141
 142         if (enable_poll != mmc_omap_enable_poll) {
 143                 struct mmc_omap_host *host = dev_get_drvdata(dev);
 144
 145                 mmc_omap_enable_poll = enable_poll;
 146                 if (enable_poll && host->switch_pin >= 0)
 147                         schedule_work(&host->switch_work);
 148         }
 149         return size;
 150 }
 151
 152 static DEVICE_ATTR(enable_poll, 0664,
 153                    mmc_omap_show_enable_poll, mmc_omap_store_enable_poll);
 154
 155 static void
 156 mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
 157 {
 158         u32 cmdreg;
 159         u32 resptype;
 160         u32 cmdtype;
 161
 162         pr_debug("MMC%d: CMD%d, argument 0x%08x%s%s%s%s\n",
 163                 host->id, cmd->opcode, cmd->arg,
 164                 (cmd->flags & MMC_RSP_SHORT) ?  ", 32-bit response" : "",
 165                 (cmd->flags & MMC_RSP_LONG) ?  ", 128-bit response" : "",
 166                 (cmd->flags & MMC_RSP_CRC) ?  ", CRC" : "",
 167                 (cmd->flags & MMC_RSP_BUSY) ?  ", busy notification" : "");
 168
 169         host->cmd = cmd;
 170
 171         resptype = 0;
 172         cmdtype = 0;
 173
 174         /*
 175          * On 24xx we may have external MMC transceiver on Menelaus.
 176          * In that case we need to manually toggle between open-drain
 177          * and push-pull states.
 178          */
 179         if (omap_has_menelaus() && (host->bus_mode != host->hw_bus_mode)) {
 180                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 181                         menelaus_mmc_opendrain(1);
 182                 else
 183                         menelaus_mmc_opendrain(0);
 184                 host->hw_bus_mode = host->bus_mode;
 185         }
 186
 187         if (!(cmd->flags & MMC_RSP_PRESENT))
 188                 resptype = 0;                   /* Resp 0 */
 189
 190         if (cmd->flags & MMC_RSP_136)
 191                 resptype = 2;                   /* Resp 2 */
 192         else {
 193                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 194                         resptype = 3;           /* Resp 3 */
 195                 else
 196                         resptype = 1;           /* Resp 1, Resp 1b */
 197         }
 198
 199         /* Protocol layer does not provide command type, but our hardware
 200          * needs it!
 201          * any data transfer means adtc type (but that information is not
 202          * in command structure, so we flagged it into host struct.)
 203          * However, telling bc, bcr and ac apart based on response is
 204          * not foolproof:
 205          * CMD0  = bc  = resp0  CMD15 = ac  = resp0
 206          * CMD2  = bcr = resp2  CMD10 = ac  = resp2
 207          *
 208          * Resolve to best guess with some exception testing:
 209          * resp0 -> bc, except CMD15 = ac
 210          * rest are ac, except if opendrain
 211          */
 212         if (host->data) {
 213                 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
 214         } else if (resptype == 0 && cmd->opcode != 15) {
 215                 cmdtype = OMAP_MMC_CMDTYPE_BC;
 216         } else if (host->bus_mode == MMC_BUSMODE_OPENDRAIN) {
 217                 cmdtype = OMAP_MMC_CMDTYPE_BCR;
 218         } else {
 219                 cmdtype = OMAP_MMC_CMDTYPE_AC;
 220         }
 221
 222         cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
 223
 224         if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 225                 cmdreg |= 1 << 6;
 226
 227         if (cmd->flags & MMC_RSP_BUSY)
 228                 cmdreg |= 1 << 11;
 229
 230         if (host->data && !(host->data->flags & MMC_DATA_WRITE))
 231                 cmdreg |= 1 << 15;
 232
 233         clk_enable(host->fclk);
 234
 235         OMAP_MMC_WRITE(host->base, CTO, 200);
 236         OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
 237         OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
 238         OMAP_MMC_WRITE(host->base, IE,
 239                        OMAP_MMC_STAT_A_EMPTY    | OMAP_MMC_STAT_A_FULL    |
 240                        OMAP_MMC_STAT_CMD_CRC    | OMAP_MMC_STAT_CMD_TOUT  |
 241                        OMAP_MMC_STAT_DATA_CRC   | OMAP_MMC_STAT_DATA_TOUT |
 242                        OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR  |
 243                        OMAP_MMC_STAT_END_OF_DATA);
 244         OMAP_MMC_WRITE(host->base, CMD, cmdreg);
 245 }
 246
 247 static void
 248 mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
 249 {
 250         if (host->dma_in_use) {
 251                 enum dma_data_direction dma_data_dir;
 252
 253                 BUG_ON(host->dma_ch < 0);
 254                 if (data->error != MMC_ERR_NONE)
 255                         omap_stop_dma(host->dma_ch);
 256                 /* Release DMA channel lazily */
 257                 mod_timer(&host->dma_timer, jiffies + HZ);
 258                 if (data->flags & MMC_DATA_WRITE)
 259                         dma_data_dir = DMA_TO_DEVICE;
 260                 else
 261                         dma_data_dir = DMA_FROM_DEVICE;
 262                 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len,
 263                              dma_data_dir);
 264         }
 265         host->data = NULL;
 266         host->sg_len = 0;
 267         clk_disable(host->fclk);
 268
 269         /* NOTE:  MMC layer will sometimes poll-wait CMD13 next, issuing
 270          * dozens of requests until the card finishes writing data.
 271          * It'd be cheaper to just wait till an EOFB interrupt arrives...
 272          */
 273
 274         if (!data->stop) {
 275                 host->mrq = NULL;
 276                 mmc_request_done(host->mmc, data->mrq);
 277                 return;
 278         }
 279
 280         mmc_omap_start_command(host, data->stop);
 281 }
 282
 283 static void
 284 mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data)
 285 {
 286         unsigned long flags;
 287         int done;
 288
 289         if (!host->dma_in_use) {
 290                 mmc_omap_xfer_done(host, data);
 291                 return;
 292         }
 293         done = 0;
 294         spin_lock_irqsave(&host->dma_lock, flags);
 295         if (host->dma_done)
 296                 done = 1;
 297         else
 298                 host->brs_received = 1;
 299         spin_unlock_irqrestore(&host->dma_lock, flags);
 300         if (done)
 301                 mmc_omap_xfer_done(host, data);
 302 }
 303
 304 static void
 305 mmc_omap_dma_timer(unsigned long data)
 306 {
 307         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 308
 309         DBG("MMC%d: Freeing DMA channel %d\n", host->id, host->dma_ch);
 310         BUG_ON(host->dma_ch < 0);
 311         omap_free_dma(host->dma_ch);
 312         host->dma_ch = -1;
 313 }
 314
 315 static void
 316 mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data)
 317 {
 318         unsigned long flags;
 319         int done;
 320
 321         done = 0;
 322         spin_lock_irqsave(&host->dma_lock, flags);
 323         if (host->brs_received)
 324                 done = 1;
 325         else
 326                 host->dma_done = 1;
 327         spin_unlock_irqrestore(&host->dma_lock, flags);
 328         if (done)
 329                 mmc_omap_xfer_done(host, data);
 330 }
 331
 332 static void
 333 mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
 334 {
 335         host->cmd = NULL;
 336
 337         if (cmd->flags & MMC_RSP_136) {
 338                 /* Response type 2 */
 339                 cmd->resp[3] =
 340                         OMAP_MMC_READ(host->base, RSP0) |
 341                         (OMAP_MMC_READ(host->base, RSP1) << 16);
 342                 cmd->resp[2] =
 343                         OMAP_MMC_READ(host->base, RSP2) |
 344                         (OMAP_MMC_READ(host->base, RSP3) << 16);
 345                 cmd->resp[1] =
 346                         OMAP_MMC_READ(host->base, RSP4) |
 347                         (OMAP_MMC_READ(host->base, RSP5) << 16);
 348                 cmd->resp[0] =
 349                         OMAP_MMC_READ(host->base, RSP6) |
 350                         (OMAP_MMC_READ(host->base, RSP7) << 16);
 351                 DBG("MMC%d: Response %08x %08x %08x %08x\n", host->id,
 352                     cmd->resp[0], cmd->resp[1],
 353                     cmd->resp[2], cmd->resp[3]);
 354         } else {
 355                 /* Response types 1, 1b, 3, 4, 5, 6 */
 356                 cmd->resp[0] =
 357                         OMAP_MMC_READ(host->base, RSP6) |
 358                         (OMAP_MMC_READ(host->base, RSP7) << 16);
 359                 DBG("MMC%d: Response %08x\n", host->id, cmd->resp[0]);
 360         }
 361
 362         if (host->data == NULL || cmd->error != MMC_ERR_NONE) {
 363                 DBG("MMC%d: End request, err %x\n", host->id, cmd->error);
 364                 host->mrq = NULL;
 365                 clk_disable(host->fclk);
 366                 mmc_request_done(host->mmc, cmd->mrq);
 367         }
 368 }
 369
 370 /* PIO only */
 371 static void
 372 mmc_omap_sg_to_buf(struct mmc_omap_host *host)
 373 {
 374         struct scatterlist *sg;
 375
 376         sg = host->data->sg + host->sg_idx;
 377         host->buffer_bytes_left = sg->length;
 378         host->buffer = page_address(sg->page) + sg->offset;
 379         if (host->buffer_bytes_left > host->total_bytes_left)
 380                 host->buffer_bytes_left = host->total_bytes_left;
 381 }
 382
 383 /* PIO only */
 384 static void
 385 mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
 386 {
 387         int n;
 388         void __iomem *reg;
 389         u16 *p;
 390
 391         if (host->buffer_bytes_left == 0) {
 392                 host->sg_idx++;
 393                 BUG_ON(host->sg_idx == host->sg_len);
 394                 mmc_omap_sg_to_buf(host);
 395         }
 396         n = 64;
 397         if (n > host->buffer_bytes_left)
 398                 n = host->buffer_bytes_left;
 399         host->buffer_bytes_left -= n;
 400         host->total_bytes_left -= n;
 401         host->data->bytes_xfered += n;
 402
 403         /* Optimize the loop a bit by calculating the register only
 404          * once */
 405         reg = host->base + OMAP_MMC_REG_DATA;
 406         p = host->buffer;
 407         n /= 2;
 408         if (write) {
 409                 while (n--)
 410                         __raw_writew(*p++, reg);
 411         } else {
 412                 while (n-- > 0)
 413                         *p++ = __raw_readw(reg);
 414         }
 415         host->buffer = p;
 416 }
 417
 418 static inline void mmc_omap_report_irq(u16 status)
 419 {
 420         static const char *mmc_omap_status_bits[] = {
 421                 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
 422                 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
 423         };
 424         int i, c = 0;
 425
 426         for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
 427                 if (status & (1 << i)) {
 428                         if (c)
 429                                 printk(" ");
 430                         printk("%s", mmc_omap_status_bits[i]);
 431                         c++;
 432                 }
 433 }
 434
 435 static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
 436 {
 437         struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
 438         u16 status;
 439         int end_command;
 440         int end_transfer;
 441         int transfer_error;
 442
 443         if (host->cmd == NULL && host->data == NULL) {
 444                 status = OMAP_MMC_READ(host->base, STAT);
 445                 printk(KERN_INFO "MMC%d: Spurious interrupt 0x%04x\n", host->id, status);
 446                 if (status != 0) {
 447                         OMAP_MMC_WRITE(host->base, STAT, status);
 448                         OMAP_MMC_WRITE(host->base, IE, 0);
 449                 }
 450                 return IRQ_HANDLED;
 451         }
 452
 453         end_command = 0;
 454         end_transfer = 0;
 455         transfer_error = 0;
 456
 457         while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
 458                 OMAP_MMC_WRITE(host->base, STAT, status); // Reset status bits
 459 #ifdef CONFIG_MMC_DEBUG
 460                 printk(KERN_DEBUG "\tMMC IRQ %04x (CMD %d): ", status,
 461                        host->cmd != NULL ? host->cmd->opcode : -1);
 462                 mmc_omap_report_irq(status);
 463                 printk("\n");
 464 #endif
 465                 if (host->total_bytes_left) {
 466                         if ((status & OMAP_MMC_STAT_A_FULL) ||
 467                             (status & OMAP_MMC_STAT_END_OF_DATA))
 468                                 mmc_omap_xfer_data(host, 0);
 469                         if (status & OMAP_MMC_STAT_A_EMPTY)
 470                                 mmc_omap_xfer_data(host, 1);
 471                 }
 472
 473                 if (status & OMAP_MMC_STAT_END_OF_DATA) {
 474                         // Block sent/received
 475                         end_transfer = 1;
 476                 }
 477
 478                 if (status & OMAP_MMC_STAT_DATA_TOUT) {
 479                         // Data timeout
 480                         printk(KERN_DEBUG "MMC%d: Data timeout\n", host->id);
 481                         if (host->data) {
 482                                 host->data->error |= MMC_ERR_TIMEOUT;
 483                                 transfer_error = 1;
 484                         }
 485                 }
 486
 487                 if (status & OMAP_MMC_STAT_DATA_CRC) {
 488                         // Data CRC error
 489                         if (host->data) {
 490                                 host->data->error |= MMC_ERR_BADCRC;
 491                                 printk(KERN_DEBUG "MMC%d: Data CRC error, bytes left %d\n",
 492                                        host->id, host->total_bytes_left);
 493                                 transfer_error = 1;
 494                         } else {
 495                                 printk(KERN_DEBUG "MMC%d: Data CRC error\n",
 496                                        host->id);
 497                         }
 498                 }
 499
 500                 if (status & OMAP_MMC_STAT_CMD_TOUT) {
 501                         /* Timeouts are routine with some commands */
 502                         if (host->cmd) {
 503                                 if (host->cmd->opcode != MMC_ALL_SEND_CID &&
 504                                     host->cmd->opcode != MMC_SEND_OP_COND &&
 505                                     host->cmd->opcode != MMC_APP_CMD &&
 506                                     !mmc_omap_cover_is_open(host))
 507                                         printk(KERN_ERR "MMC%d: Command timeout, CMD%d\n",
 508                                                host->id, host->cmd->opcode);
 509                                 host->cmd->error |= MMC_ERR_TIMEOUT;
 510                                 end_command = 1;
 511                         }
 512                 }
 513
 514                 if (status & OMAP_MMC_STAT_CMD_CRC) {
 515                         // Command CRC error
 516                         if (host->cmd) {
 517                                 printk(KERN_ERR "MMC%d: Command CRC error (CMD%d, arg 0x%08x)\n",
 518                                        host->id, host->cmd->opcode,
 519                                        host->cmd->arg);
 520                                 host->cmd->error |= MMC_ERR_BADCRC;
 521                                 end_command = 1;
 522                         } else
 523                                 printk(KERN_ERR "MMC%d: Command CRC error without cmd?\n", host->id);
 524                 }
 525
 526                 if (status & OMAP_MMC_STAT_OCR_BUSY) {
 527                         /* OCR Busy ... happens a lot */
 528                         if (host->cmd && host->cmd->opcode != MMC_SEND_OP_COND
 529                                 && host->cmd->opcode != MMC_SET_RELATIVE_ADDR) {
 530                                 DBG("MMC%d: OCR busy error, CMD%d\n",
 531                                        host->id, host->cmd->opcode);
 532                         }
 533                 }
 534
 535                 if (status & OMAP_MMC_STAT_CARD_ERR) {
 536                         if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
 537                                 u32 response = OMAP_MMC_READ(host->base, RSP6)
 538                                         | (OMAP_MMC_READ(host->base, RSP7) << 16);
 539                                 /* STOP sometimes sets must-ignore bits */
 540                                 if (!(response & (R1_CC_ERROR
 541         | R1_ILLEGAL_COMMAND
 542         | R1_COM_CRC_ERROR))) {
 543                                         end_command = 1;
 544                                         continue;
 545                                 }
 546                         }
 547
 548                         // Card status error
 549                         printk(KERN_DEBUG "MMC%d: Card status error (CMD%d)\n",
 550                                host->id, host->cmd->opcode);
 551                         if (host->cmd) {
 552                                 host->cmd->error |= MMC_ERR_FAILED;
 553                                 end_command = 1;
 554                         }
 555                         if (host->data) {
 556                                 host->data->error |= MMC_ERR_FAILED;
 557                                 transfer_error = 1;
 558                         }
 559                 }
 560
 561                 /*
 562                  * NOTE: On 1610 the END_OF_CMD may come too early when
 563                  *       starting a write
 564                  */
 565                 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
 566                     (!(status & OMAP_MMC_STAT_A_EMPTY))) {
 567                         // End of command phase
 568                         end_command = 1;
 569                 }
 570         }
 571
 572         if (end_command) {
 573                 mmc_omap_cmd_done(host, host->cmd);
 574         }
 575         if (transfer_error)
 576                 mmc_omap_xfer_done(host, host->data);
 577         else if (end_transfer)
 578                 mmc_omap_end_of_data(host, host->data);
 579
 580         return IRQ_HANDLED;
 581 }
 582
 583 static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id, struct pt_regs *regs)
 584 {
 585         struct mmc_omap_host *host = (struct mmc_omap_host *) dev_id;
 586
 587         DBG("MMC%d cover is now %s\n", host->id,
 588             omap_get_gpio_datain(host->switch_pin) ? "open" : "closed");
 589         schedule_work(&host->switch_work);
 590
 591         return IRQ_HANDLED;
 592 }
 593
 594 static void mmc_omap_switch_timer(unsigned long arg)
 595 {
 596         struct mmc_omap_host *host = (struct mmc_omap_host *) arg;
 597
 598         schedule_work(&host->switch_work);
 599 }
 600
 601 /* FIXME: Handle card insertion and removal properly. Maybe use a mask
 602  * for MMC state? */
 603 static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
 604 {
 605         if (machine_is_omap_h4()) {
 606                 if (mmc_mask & 0x1)
 607                         printk("XXX card in slot 1\n");
 608                 if (mmc_mask & 0x2)
 609                         printk("XXX card in slot 2\n");
 610         } else {
 611                 /* Assume card detect connected to cover switch */
 612                 if (mmc_mask & 0x2)
 613                         printk("XXX cover open\n");
 614                 else
 615                         printk("XXX cover closed\n");
 616         }
 617 }
 618
 619 static void mmc_omap_switch_handler(void *data)
 620 {
 621         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 622         struct mmc_card *card;
 623         static int complained = 0;
 624         int cards = 0, cover_open;
 625
 626         if (host->switch_pin == -1)
 627                 return;
 628         cover_open = mmc_omap_cover_is_open(host);
 629         if (cover_open != host->switch_last_state) {
 630                 kobject_uevent(&host->dev->kobj, KOBJ_CHANGE);
 631                 host->switch_last_state = cover_open;
 632         }
 633         DBG("MMC cover switch handler started\n");
 634         mmc_detect_change(host->mmc, 0);
 635         list_for_each_entry(card, &host->mmc->cards, node) {
 636                 if (mmc_card_present(card))
 637                         cards++;
 638         }
 639         DBG("MMC%d: %d card(s) present\n", host->id, cards);
 640         if (mmc_omap_cover_is_open(host)) {
 641                 if (!complained) {
 642                         printk(KERN_INFO "MMC%d: cover is open\n", host->id);
 643                         complained = 1;
 644                 }
 645                 if (mmc_omap_enable_poll)
 646                         mod_timer(&host->switch_timer, jiffies +
 647                                 msecs_to_jiffies(OMAP_MMC_SWITCH_POLL_DELAY));
 648         } else {
 649                 complained = 0;
 650         }
 651 }
 652
 653 /* prepare to transfer the next segment of a scatterlist */
 654 static void
 655 mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
 656 {
 657         int dma_ch = host->dma_ch;
 658         unsigned long data_addr;
 659         u16 buf, frame;
 660         u32 count;
 661         struct scatterlist *sg = &data->sg[host->sg_idx];
 662         int src_port = 0;
 663         int dst_port = 0;
 664         int sync_dev = 0;
 665
 666         data_addr = (unsigned long)io_v2p((void __force *) host->base) + OMAP_MMC_REG_DATA;
 667         frame = 1 << data->blksz_bits;
 668         count = (u32)sg_dma_len(sg);
 669
 670         /* the MMC layer is confused about single block writes... */
 671         if ((data->blocks == 1) && (count > (1 << data->blksz_bits))) {
 672                 pr_debug("patch bogus single block length! %d > %d\n",
 673                                 count, frame);
 674                 count = frame;
 675         }
 676         host->dma_len = count;
 677
 678         /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx.
 679          * Use 16 or 32 word frames when the blocksize is at least that large.
 680          * Blocksize is usually 512 bytes; but not for some SD reads.
 681          */
 682         if (cpu_is_omap15xx() && frame > 32)
 683                 frame = 32;
 684         else if (frame > 64)
 685                 frame = 64;
 686         count /= frame;
 687         frame >>= 1;
 688
 689         if (!(data->flags & MMC_DATA_WRITE)) {
 690                 buf = 0x800f | ((frame - 1) << 8);
 691
 692                 if (cpu_class_is_omap1()) {
 693                         src_port = OMAP_DMA_PORT_TIPB;
 694                         dst_port = OMAP_DMA_PORT_EMIFF;
 695                 }
 696                 if (cpu_is_omap24xx())
 697                         sync_dev = OMAP24XX_DMA_MMC1_RX;
 698
 699                 omap_set_dma_src_params(dma_ch, src_port,
 700                                         OMAP_DMA_AMODE_CONSTANT,
 701                                         data_addr, 0, 0);
 702                 omap_set_dma_dest_params(dma_ch, dst_port,
 703                                          OMAP_DMA_AMODE_POST_INC,
 704                                          sg_dma_address(sg), 0, 0);
 705                 omap_set_dma_dest_data_pack(dma_ch, 1);
 706                 omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
 707         } else {
 708                 buf = 0x0f80 | ((frame - 1) << 0);
 709
 710                 if (cpu_class_is_omap1()) {
 711                         src_port = OMAP_DMA_PORT_EMIFF;
 712                         dst_port = OMAP_DMA_PORT_TIPB;
 713                 }
 714                 if (cpu_is_omap24xx())
 715                         sync_dev = OMAP24XX_DMA_MMC1_TX;
 716
 717                 omap_set_dma_dest_params(dma_ch, dst_port,
 718                                          OMAP_DMA_AMODE_CONSTANT,
 719                                          data_addr, 0, 0);
 720                 omap_set_dma_src_params(dma_ch, src_port,
 721                                         OMAP_DMA_AMODE_POST_INC,
 722                                         sg_dma_address(sg), 0, 0);
 723                 omap_set_dma_src_data_pack(dma_ch, 1);
 724                 omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
 725         }
 726
 727         /* Max limit for DMA frame count is 0xffff */
 728         if (unlikely(count > 0xffff))
 729                 BUG();
 730
 731         OMAP_MMC_WRITE(host->base, BUF, buf);
 732         omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
 733                                      frame, count, OMAP_DMA_SYNC_FRAME,
 734                                      sync_dev, 0);
 735 }
 736
 737 /* a scatterlist segment completed */
 738 static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
 739 {
 740         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 741         struct mmc_data *mmcdat = host->data;
 742
 743         if (unlikely(host->dma_ch < 0)) {
 744                 printk(KERN_ERR "MMC%d: DMA callback while DMA not enabled\n",
 745                        host->id);
 746                 return;
 747         }
 748         /* FIXME: We really should do something to _handle_ the errors */
 749         if (ch_status & OMAP_DMA_TOUT_IRQ) {
 750                 printk(KERN_ERR "MMC%d: DMA timeout\n", host->id);
 751                 return;
 752         }
 753         if (ch_status & OMAP_DMA_DROP_IRQ) {
 754                 printk(KERN_ERR "MMC%d: DMA sync error\n", host->id);
 755                 return;
 756         }
 757         if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) {
 758                 /* REVISIT we should be able to avoid getting IRQs with
 759                  * just SYNC status ...
 760                  */
 761                 if ((ch_status & ~OMAP1_DMA_SYNC_IRQ))
 762                         pr_debug("MMC%d: DMA channel status: %04x\n",
 763                                host->id, ch_status);
 764                 return;
 765         }
 766         mmcdat->bytes_xfered += host->dma_len;
 767
 768         pr_debug("\tMMC DMA %d bytes CB %04x (%d segments to go), %p\n",
 769                 host->dma_len, ch_status,
 770                 host->sg_len - host->sg_idx - 1, host->data);
 771
 772         host->sg_idx++;
 773         if (host->sg_idx < host->sg_len) {
 774                 mmc_omap_prepare_dma(host, host->data);
 775                 omap_start_dma(host->dma_ch);
 776         } else
 777                 mmc_omap_dma_done(host, host->data);
 778 }
 779
 780 static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data *data)
 781 {
 782         const char *dev_name;
 783         int sync_dev, dma_ch, is_read, r;
 784
 785         is_read = !(data->flags & MMC_DATA_WRITE);
 786         del_timer_sync(&host->dma_timer);
 787         if (host->dma_ch >= 0) {
 788                 if (is_read == host->dma_is_read)
 789                         return 0;
 790                 omap_free_dma(host->dma_ch);
 791                 host->dma_ch = -1;
 792         }
 793
 794         if (is_read) {
 795                 if (host->id == 1) {
 796                         sync_dev = OMAP_DMA_MMC_RX;
 797                         dev_name = "MMC1 read";
 798                 } else {
 799                         sync_dev = OMAP_DMA_MMC2_RX;
 800                         dev_name = "MMC2 read";
 801                 }
 802         } else {
 803                 if (host->id == 1) {
 804                         sync_dev = OMAP_DMA_MMC_TX;
 805                         dev_name = "MMC1 write";
 806                 } else {
 807                         sync_dev = OMAP_DMA_MMC2_TX;
 808                         dev_name = "MMC2 write";
 809                 }
 810         }
 811         r = omap_request_dma(sync_dev, dev_name, mmc_omap_dma_cb,
 812                              host, &dma_ch);
 813         if (r != 0) {
 814                 printk("MMC%d: omap_request_dma() failed with %d\n",
 815                        host->id, r);
 816                 return r;
 817         }
 818         host->dma_ch = dma_ch;
 819         host->dma_is_read = is_read;
 820
 821         return 0;
 822 }
 823
 824 static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 825 {
 826         u16 reg;
 827
 828         reg = OMAP_MMC_READ(host->base, SDIO);
 829         reg &= ~(1 << 5);
 830         OMAP_MMC_WRITE(host->base, SDIO, reg);
 831         /* Set maximum timeout */
 832         OMAP_MMC_WRITE(host->base, CTO, 0xff);
 833 }
 834
 835 static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 836 {
 837         int timeout;
 838         u16 reg;
 839
 840         /* Convert ns to clock cycles by assuming 20MHz frequency
 841          * 1 cycle at 20MHz = 500 ns
 842          */
 843         timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
 844
 845         /* Some cards require more time to do at least the first read operation */
 846         timeout = timeout << 4;
 847
 848         /* Check if we need to use timeout multiplier register */
 849         reg = OMAP_MMC_READ(host->base, SDIO);
 850         if (timeout > 0xffff) {
 851                 reg |= (1 << 5);
 852                 timeout /= 1024;
 853         } else
 854                 reg &= ~(1 << 5);
 855         OMAP_MMC_WRITE(host->base, SDIO, reg);
 856         OMAP_MMC_WRITE(host->base, DTO, timeout);
 857 }
 858
 859 static void
 860 mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
 861 {
 862         struct mmc_data *data = req->data;
 863         int i, use_dma, block_size;
 864         unsigned sg_len;
 865
 866         host->data = data;
 867         if (data == NULL) {
 868                 OMAP_MMC_WRITE(host->base, BLEN, 0);
 869                 OMAP_MMC_WRITE(host->base, NBLK, 0);
 870                 OMAP_MMC_WRITE(host->base, BUF, 0);
 871                 host->dma_in_use = 0;
 872                 set_cmd_timeout(host, req);
 873                 return;
 874         }
 875
 876
 877         block_size = 1 << data->blksz_bits;
 878
 879         OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
 880         OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
 881         set_data_timeout(host, req);
 882
 883         /* cope with calling layer confusion; it issues "single
 884          * block" writes using multi-block scatterlists.
 885          */
 886         sg_len = (data->blocks == 1) ? 1 : data->sg_len;
 887
 888         /* Only do DMA for entire blocks */
 889         use_dma = host->use_dma;
 890         if (use_dma) {
 891                 for (i = 0; i < sg_len; i++) {
 892                         if ((data->sg[i].length % block_size) != 0) {
 893                                 use_dma = 0;
 894                                 break;
 895                         }
 896                 }
 897         }
 898
 899         host->sg_idx = 0;
 900         if (use_dma) {
 901                 if (mmc_omap_get_dma_channel(host, data) == 0) {
 902                         enum dma_data_direction dma_data_dir;
 903
 904                         if (data->flags & MMC_DATA_WRITE)
 905                                 dma_data_dir = DMA_TO_DEVICE;
 906                         else
 907                                 dma_data_dir = DMA_FROM_DEVICE;
 908
 909                         host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
 910                                                 sg_len, dma_data_dir);
 911                         host->total_bytes_left = 0;
 912                         mmc_omap_prepare_dma(host, req->data);
 913                         host->brs_received = 0;
 914                         host->dma_done = 0;
 915                         host->dma_in_use = 1;
 916                 } else
 917                         use_dma = 0;
 918         }
 919
 920         /* Revert to PIO? */
 921         if (!use_dma) {
 922                 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
 923                 host->total_bytes_left = data->blocks * block_size;
 924                 host->sg_len = sg_len;
 925                 mmc_omap_sg_to_buf(host);
 926                 host->dma_in_use = 0;
 927         }
 928
 929         pr_debug("MMC%d: %s %s %s, DTO %d cycles + %d ns, "
 930                         "%d blocks of %d bytes, %d segments\n",
 931                 host->id, use_dma ? "DMA" : "PIO",
 932                 (data->flags & MMC_DATA_STREAM) ? "stream" : "block",
 933                 (data->flags & MMC_DATA_WRITE) ? "write" : "read",
 934                 data->timeout_clks, data->timeout_ns, data->blocks,
 935                 block_size, host->sg_len);
 936 }
 937
 938 static inline int is_broken_card(struct mmc_card *card)
 939 {
 940         int i;
 941         struct mmc_cid *c = &card->cid;
 942         static const struct broken_card_cid {
 943                 unsigned int manfid;
 944                 char prod_name[8];
 945                 unsigned char hwrev;
 946                 unsigned char fwrev;
 947         } broken_cards[] = {
 948                 { 0x00150000, "\x30\x30\x30\x30\x30\x30\x15\x00", 0x06, 0x03 },
 949         };
 950
 951         for (i = 0; i < sizeof(broken_cards)/sizeof(broken_cards[0]); i++) {
 952                 const struct broken_card_cid *b = broken_cards + i;
 953
 954                 if (b->manfid != c->manfid)
 955                         continue;
 956                 if (memcmp(b->prod_name, c->prod_name, sizeof(b->prod_name)) != 0)
 957                         continue;
 958                 if (b->hwrev != c->hwrev || b->fwrev != c->fwrev)
 959                         continue;
 960                 return 1;
 961         }
 962         return 0;
 963 }
 964
 965 static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
 966 {
 967         struct mmc_omap_host *host = mmc_priv(mmc);
 968
 969         WARN_ON(host->mrq != NULL);
 970
 971         host->mrq = req;
 972
 973         /* Some cards (vendor left unnamed to protect the guilty) seem to
 974          * require this delay after power-up. Otherwise we'll get mysterious
 975          * data timeouts. */
 976         if (req->cmd->opcode == MMC_SEND_CSD) {
 977                 struct mmc_card *card;
 978                 int broken_present = 0;
 979
 980                 list_for_each_entry(card, &mmc->cards, node) {
 981                         if (is_broken_card(card)) {
 982                                 broken_present = 1;
 983                                 break;
 984                         }
 985                 }
 986                 if (broken_present) {
 987                         static int complained = 0;
 988
 989                         if (!complained) {
 990                                 printk(KERN_WARNING "MMC%d: Broken card workaround enabled\n",
 991                                        host->id);
 992                                 complained = 1;
 993                         }
 994                         if (in_interrupt()) {
 995                                 /* This is nasty */
 996                                  printk(KERN_ERR "Sleeping in IRQ handler, FIXME please!\n");
 997                                  dump_stack();
 998                                  mdelay(100);
 999                         } else {
1000                                 set_current_state(TASK_UNINTERRUPTIBLE);
1001                                 schedule_timeout(100 * HZ / 1000);
1002                         }
1003                 }
1004         }
1005
1006         /* only touch fifo AFTER the controller readies it */
1007         mmc_omap_prepare_data(host, req);
1008         mmc_omap_start_command(host, req->cmd);
1009         if (host->dma_in_use)
1010                 omap_start_dma(host->dma_ch);
1011 }
1012
1013 static void innovator_fpga_socket_power(int on)
1014 {
1015 #if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
1016
1017         if (on) {
1018                 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
1019                      OMAP1510_FPGA_POWER);
1020         } else {
1021                 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
1022                      OMAP1510_FPGA_POWER);
1023         }
1024 #endif
1025 }
1026
1027 /*
1028  * Turn the socket power on/off. Innovator uses FPGA, most boards
1029  * probably use GPIO.
1030  */
1031 static void mmc_omap_power(struct mmc_omap_host *host, int on)
1032 {
1033         if (on) {
1034                 if (machine_is_omap_innovator())
1035                         innovator_fpga_socket_power(1);
1036                 else if (machine_is_omap_h2())
1037                         tps65010_set_gpio_out_value(GPIO3, HIGH);
1038                 else if (machine_is_omap_h3())
1039                         /* GPIO 4 of TPS65010 sends SD_EN signal */
1040                         tps65010_set_gpio_out_value(GPIO4, HIGH);
1041                 else if (cpu_is_omap24xx()) {
1042                         u16 reg = OMAP_MMC_READ(host->base, CON);
1043                         OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
1044                 } else
1045                         if (host->power_pin >= 0)
1046                                 omap_set_gpio_dataout(host->power_pin, 1);
1047         } else {
1048                 if (machine_is_omap_innovator())
1049                         innovator_fpga_socket_power(0);
1050                 else if (machine_is_omap_h2())
1051                         tps65010_set_gpio_out_value(GPIO3, LOW);
1052                 else if (machine_is_omap_h3())
1053                         tps65010_set_gpio_out_value(GPIO4, LOW);
1054                 else if (cpu_is_omap24xx()) {
1055                         u16 reg = OMAP_MMC_READ(host->base, CON);
1056                         OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
1057                 } else
1058                         if (host->power_pin >= 0)
1059                                 omap_set_gpio_dataout(host->power_pin, 0);
1060         }
1061 }
1062
1063 static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1064 {
1065         struct mmc_omap_host *host = mmc_priv(mmc);
1066         int dsor;
1067         int realclock, i;
1068
1069         DBG("MMC%d: set_ios: clock %dHz busmode %d powermode %d Vdd %d.%02d\n",
1070             host->id, ios->clock, ios->bus_mode, ios->power_mode,
1071             ios->vdd / 100, ios->vdd % 100);
1072
1073         if (ios->power_mode == MMC_POWER_UP && ios->clock < 400000)
1074                 realclock = 400000;             /* Fix for broken stack */
1075         else
1076                 realclock = ios->clock;
1077
1078         if (ios->clock == 0)
1079                 dsor = 0;
1080         else {
1081                 int func_clk_rate = clk_get_rate(host->fclk);
1082
1083                 dsor = func_clk_rate / realclock;
1084                 if (dsor < 1)
1085                         dsor = 1;
1086
1087                 if (func_clk_rate / dsor > realclock)
1088                         dsor++;
1089
1090                 if (dsor > 250)
1091                         dsor = 250;
1092                 dsor++;
1093
1094                 if (ios->bus_width == MMC_BUS_WIDTH_4)
1095                         dsor |= 1 << 15;
1096         }
1097
1098         switch (ios->power_mode) {
1099         case MMC_POWER_OFF:
1100                 mmc_omap_power(host, 0);
1101                 break;
1102         case MMC_POWER_UP:
1103         case MMC_POWER_ON:
1104                 mmc_omap_power(host, 1);
1105                 dsor |= 1<<11;
1106                 break;
1107         }
1108
1109         host->bus_mode = ios->bus_mode;
1110         if (omap_has_menelaus()) {
1111                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
1112                         menelaus_mmc_opendrain(1);
1113                 else
1114                         menelaus_mmc_opendrain(0);
1115         }
1116         host->hw_bus_mode = host->bus_mode;
1117
1118         clk_enable(host->fclk);
1119
1120         /* On insanely high arm_per frequencies something sometimes
1121          * goes somehow out of sync, and the POW bit is not being set,
1122          * which results in the while loop below getting stuck.
1123          * Writing to the CON register twice seems to do the trick. */
1124         for (i = 0; i < 2; i++)
1125                 OMAP_MMC_WRITE(host->base, CON, dsor);
1126         if (ios->power_mode == MMC_POWER_UP) {
1127                 /* Send clock cycles, poll completion */
1128                 OMAP_MMC_WRITE(host->base, IE, 0);
1129                 OMAP_MMC_WRITE(host->base, STAT, 0xffff);
1130                 OMAP_MMC_WRITE(host->base, CMD, 1<<7);
1131                 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
1132                 OMAP_MMC_WRITE(host->base, STAT, 1);
1133         }
1134         clk_disable(host->fclk);
1135 }
1136
1137 static int mmc_omap_get_ro(struct mmc_host *mmc)
1138 {
1139         struct mmc_omap_host *host = mmc_priv(mmc);
1140
1141         return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
1142 }
1143
1144 static struct mmc_host_ops mmc_omap_ops = {
1145         .request        = mmc_omap_request,
1146         .set_ios        = mmc_omap_set_ios,
1147         .get_ro         = mmc_omap_get_ro,
1148 };
1149
1150 static int __init mmc_omap_probe(struct platform_device *pdev)
1151 {
1152         struct omap_mmc_conf *minfo = pdev->dev.platform_data;
1153         struct mmc_host *mmc;
1154         struct mmc_omap_host *host = NULL;
1155         int ret = 0;
1156
1157         if (pdev->resource[0].flags != IORESOURCE_MEM
1158             || pdev->resource[1].flags != IORESOURCE_IRQ) {
1159                 printk(KERN_ERR "mmc_omap_probe: invalid resource type\n");
1160                 return -ENODEV;
1161         }
1162
1163         if (!request_mem_region(pdev->resource[0].start,
1164                                 pdev->resource[0].end - pdev->resource[0].start + 1,
1165                                 pdev->name)) {
1166                 dev_dbg(&pdev->dev, "request_mem_region failed\n");
1167                 return -EBUSY;
1168         }
1169
1170         mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
1171         if (!mmc) {
1172                 ret = -ENOMEM;
1173                 goto out;
1174         }
1175
1176         host = mmc_priv(mmc);
1177         host->mmc = mmc;
1178
1179         spin_lock_init(&host->dma_lock);
1180         init_timer(&host->dma_timer);
1181         host->dma_timer.function = mmc_omap_dma_timer;
1182         host->dma_timer.data = (unsigned long) host;
1183
1184         host->id = pdev->id;
1185
1186         if (cpu_is_omap24xx()) {
1187                 host->iclk = clk_get(&pdev->dev, "mmc_ick");
1188                 if (IS_ERR(host->iclk))
1189                         goto out;
1190                 clk_enable(host->iclk);
1191         }
1192
1193         if (!cpu_is_omap24xx())
1194                 host->fclk = clk_get(&pdev->dev,
1195                                     (host->id == 1) ? "mmc1_ck" : "mmc2_ck");
1196         else
1197                 host->fclk = clk_get(&pdev->dev, "mmc_fck");
1198
1199         if (IS_ERR(host->fclk)) {
1200                 ret = PTR_ERR(host->fclk);
1201                 goto out;
1202         }
1203
1204         /* REVISIT:
1205          * Also, use minfo->cover to decide how to manage
1206          * the card detect sensing.
1207          */
1208         host->power_pin = minfo->power_pin;
1209         host->switch_pin = minfo->switch_pin;
1210         host->wp_pin = minfo->wp_pin;
1211         host->use_dma = 1;
1212         host->dma_ch = -1;
1213
1214         host->irq = pdev->resource[1].start;
1215         host->base = (void __iomem *)pdev->resource[0].start;
1216
1217          if (minfo->wire4)
1218                  mmc->caps |= MMC_CAP_4_BIT_DATA;
1219
1220         mmc->ops = &mmc_omap_ops;
1221         mmc->f_min = 400000;
1222         mmc->f_max = 24000000;
1223         mmc->ocr_avail = MMC_VDD_33_34;
1224
1225         /* Use scatterlist DMA to reduce per-transfer costs.
1226          * NOTE max_seg_size assumption that small blocks aren't
1227          * normally used (except e.g. for reading SD registers).
1228          */
1229         mmc->max_phys_segs = 32;
1230         mmc->max_hw_segs = 32;
1231         mmc->max_sectors = 256; /* NBLK max 11-bits, OMAP also limited by DMA */
1232         mmc->max_seg_size = mmc->max_sectors * 512;
1233
1234         if (host->power_pin >= 0) {
1235                 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
1236                         printk(KERN_ERR "MMC%d: Unable to get GPIO pin for MMC power\n",
1237                                host->id);
1238                         goto out;
1239                 }
1240                 omap_set_gpio_direction(host->power_pin, 0);
1241         }
1242
1243         ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1244         if (ret)
1245                 goto out;
1246
1247         host->dev = &pdev->dev;
1248         platform_set_drvdata(pdev, host);
1249
1250         mmc_add_host(mmc);
1251
1252         if (host->switch_pin >= 0) {
1253                 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
1254                 init_timer(&host->switch_timer);
1255                 host->switch_timer.function = mmc_omap_switch_timer;
1256                 host->switch_timer.data = (unsigned long) host;
1257                 if (omap_request_gpio(host->switch_pin) != 0) {
1258                         printk(KERN_WARNING "MMC%d: Unable to get GPIO pin for MMC cover switch\n",
1259                                host->id);
1260                         host->switch_pin = -1;
1261                         goto no_switch;
1262                 }
1263
1264                 omap_set_gpio_direction(host->switch_pin, 1);
1265                 set_irq_type(OMAP_GPIO_IRQ(host->switch_pin), IRQT_RISING);
1266                 ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
1267                                   mmc_omap_switch_irq, 0, DRIVER_NAME, host);
1268                 if (ret) {
1269                         printk(KERN_WARNING "MMC%d: Unable to get IRQ for MMC cover switch\n",
1270                                host->id);
1271                         omap_free_gpio(host->switch_pin);
1272                         host->switch_pin = -1;
1273                         goto no_switch;
1274                 }
1275                 ret = device_create_file(&pdev->dev, &dev_attr_cover_switch);
1276                 if (ret == 0) {
1277                         ret = device_create_file(&pdev->dev, &dev_attr_enable_poll);
1278                         if (ret != 0)
1279                                 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1280                 }
1281                 if (ret) {
1282                         printk(KERN_WARNING "MMC%d: Unable to create sysfs attributes\n",
1283                                host->id);
1284                         free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1285                         omap_free_gpio(host->switch_pin);
1286                         host->switch_pin = -1;
1287                         goto no_switch;
1288                 }
1289                 if (mmc_omap_enable_poll && mmc_omap_cover_is_open(host))
1290                         schedule_work(&host->switch_work);
1291         }
1292
1293         if (omap_has_menelaus())
1294                 menelaus_mmc_register(mmc_omap_switch_callback,
1295           (unsigned long)&host);
1296
1297 no_switch:
1298         return 0;
1299
1300 out:
1301         /* FIXME: Free other resources too. */
1302         if (host) {
1303                 if (host->iclk && !IS_ERR(host->iclk))
1304                         clk_put(host->iclk);
1305                 if (host->fclk && !IS_ERR(host->fclk))
1306                         clk_put(host->fclk);
1307                 mmc_free_host(host->mmc);
1308         }
1309         return ret;
1310 }
1311
1312 static int mmc_omap_remove(struct platform_device *pdev)
1313 {
1314         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1315
1316         platform_set_drvdata(pdev, NULL);
1317
1318         if (host) {
1319                 mmc_remove_host(host->mmc);
1320                 free_irq(host->irq, host);
1321                 mmc_omap_power(host, 0);
1322
1323                 if (host->power_pin >= 0)
1324                         omap_free_gpio(host->power_pin);
1325                 if (host->switch_pin >= 0) {
1326                         device_remove_file(&pdev->dev, &dev_attr_enable_poll);
1327                         device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1328                         free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1329                         omap_free_gpio(host->switch_pin);
1330                         host->switch_pin = -1;
1331                         del_timer_sync(&host->switch_timer);
1332                         flush_scheduled_work();
1333                 }
1334                 if (host->iclk && !IS_ERR(host->iclk))
1335                         clk_put(host->iclk);
1336                 if (host->fclk && !IS_ERR(host->fclk))
1337                         clk_put(host->fclk);
1338                 mmc_free_host(host->mmc);
1339         }
1340
1341         if (omap_has_menelaus())
1342                 menelaus_mmc_remove();
1343
1344         release_mem_region(pdev->resource[0].start,
1345                            pdev->resource[0].end - pdev->resource[0].start + 1);
1346
1347         return 0;
1348 }
1349
1350 #ifdef CONFIG_PM
1351 static int mmc_omap_suspend(struct platform_device *pdev, pm_message_t mesg)
1352 {
1353         int ret = 0;
1354         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1355
1356         if (host && host->suspended)
1357                 return 0;
1358
1359         if (!irqs_disabled())
1360                 return -EAGAIN;
1361
1362         if (host) {
1363                 ret = mmc_suspend_host(host->mmc, mesg);
1364                 if (ret == 0)
1365                         host->suspended = 1;
1366         }
1367         return ret;
1368 }
1369
1370 static int mmc_omap_resume(struct platform_device *pdev)
1371 {
1372         int ret = 0;
1373         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1374
1375         if (host && !host->suspended)
1376                 return 0;
1377
1378         if (host) {
1379                 ret = mmc_resume_host(host->mmc);
1380                 if (ret == 0)
1381                         host->suspended = 0;
1382         }
1383
1384         return ret;
1385 }
1386 #else
1387 #define mmc_omap_suspend        NULL
1388 #define mmc_omap_resume         NULL
1389 #endif
1390
1391 static struct platform_driver mmc_omap_driver = {
1392         .probe          = mmc_omap_probe,
1393         .remove         = mmc_omap_remove,
1394         .suspend        = mmc_omap_suspend,
1395         .resume         = mmc_omap_resume,
1396         .driver         = {
1397                 .name   = DRIVER_NAME,
1398         },
1399 };
1400
1401 static int __init mmc_omap_init(void)
1402 {
1403         return platform_driver_register(&mmc_omap_driver);
1404 }
1405
1406 static void __exit mmc_omap_exit(void)
1407 {
1408         platform_driver_unregister(&mmc_omap_driver);
1409 }
1410
1411 module_init(mmc_omap_init);
1412 module_exit(mmc_omap_exit);
1413
1414 MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1415 MODULE_LICENSE("GPL");
1416 MODULE_ALIAS(DRIVER_NAME);
1417 MODULE_AUTHOR("Juha Yrjölä");