drivers/mmc/omap.c

   1 /*
   2  *  linux/drivers/media/mmc/omap.c
   3  *
   4  *  Copyright (C) 2004 Nokia Corporation
   5  *  Written by Tuukka Tikkanen and Juha Yrjölä <juha.yrjola@nokia.com>
   6  *  Misc hacks here and there by Tony Lindgren <tony@atomide.com>
   7  *  Other hacks (DMA, SD, etc) by David Brownell
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/config.h>
  15
  16 // #define CONFIG_MMC_DEBUG
  17 #ifdef CONFIG_MMC_DEBUG
  18 #define DEBUG   /* for dev_dbg(), pr_debug(), etc */
  19 #endif
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/init.h>
  24 #include <linux/ioport.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/delay.h>
  29 #include <linux/spinlock.h>
  30 #include <linux/timer.h>
  31 #include <linux/mmc/host.h>
  32 #include <linux/mmc/protocol.h>
  33 #include <linux/mmc/card.h>
  34 #include <linux/clk.h>
  35
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/scatterlist.h>
  39 #include <asm/mach-types.h>
  40
  41 #include <asm/arch/board.h>
  42 #include <asm/arch/gpio.h>
  43 #include <asm/arch/dma.h>
  44 #include <asm/arch/mux.h>
  45 #include <asm/arch/fpga.h>
  46 #include <asm/arch/tps65010.h>
  47 #include <asm/arch/menelaus.h>
  48
  49 #include "omap.h"
  50
  51 #define DRIVER_NAME "mmci-omap"
  52
  53 #ifdef CONFIG_MMC_DEBUG
  54 #define DBG(x...)       pr_debug(x)
  55 //#define DBG(x...)     printk(x)
  56 #else
  57 #define DBG(x...)       do { } while (0)
  58 #endif
  59
  60 /* Specifies how often in millisecs to poll for card status changes
  61  * when the cover switch is open */
  62 #define OMAP_MMC_SWITCH_POLL_DELAY      500
  63
  64 static int mmc_omap_enable_poll = 1;
  65
  66 struct mmc_omap_host {
  67         int                     initialized;
  68         int                     suspended;
  69         struct mmc_request *    mrq;
  70         struct mmc_command *    cmd;
  71         struct mmc_data *       data;
  72         struct mmc_host *       mmc;
  73         struct device *         dev;
  74         unsigned char           id; /* 16xx chips have 2 MMC blocks */
  75         struct clk *            iclk;
  76         struct clk *            fclk;
  77         void __iomem            *base;
  78         int                     irq;
  79         unsigned char           bus_mode;
  80         unsigned char           hw_bus_mode;
  81
  82         unsigned int            sg_len;
  83         int                     sg_idx;
  84         u16 *                   buffer;
  85         u32                     buffer_bytes_left;
  86         u32                     total_bytes_left;
  87
  88         unsigned                use_dma:1;
  89         unsigned                brs_received:1, dma_done:1;
  90         unsigned                dma_is_read:1;
  91         unsigned                dma_in_use:1;
  92         int                     dma_ch;
  93         spinlock_t              dma_lock;
  94         struct timer_list       dma_timer;
  95         unsigned                dma_len;
  96
  97         short                   power_pin;
  98         short                   wp_pin;
  99
 100         int                     switch_pin;
 101         struct work_struct      switch_work;
 102         struct timer_list       switch_timer;
 103         int                     switch_last_state;
 104 };
 105
 106 static inline int
 107 mmc_omap_cover_is_open(struct mmc_omap_host *host)
 108 {
 109         if (host->switch_pin < 0)
 110                 return 0;
 111         return omap_get_gpio_datain(host->switch_pin);
 112 }
 113
 114 static ssize_t
 115 mmc_omap_show_cover_switch(struct device *dev,
 116         struct device_attribute *attr, char *buf)
 117 {
 118         struct mmc_omap_host *host = dev_get_drvdata(dev);
 119
 120         return sprintf(buf, "%s\n", mmc_omap_cover_is_open(host) ? "open" : "closed");
 121 }
 122
 123 static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
 124
 125 static ssize_t
 126 mmc_omap_show_enable_poll(struct device *dev,
 127         struct device_attribute *attr, char *buf)
 128 {
 129         return snprintf(buf, PAGE_SIZE, "%d\n", mmc_omap_enable_poll);
 130 }
 131
 132 static ssize_t
 133 mmc_omap_store_enable_poll(struct device *dev,
 134         struct device_attribute *attr, const char *buf,
 135         size_t size)
 136 {
 137         int enable_poll;
 138
 139         if (sscanf(buf, "%10d", &enable_poll) != 1)
 140                 return -EINVAL;
 141
 142         if (enable_poll != mmc_omap_enable_poll) {
 143                 struct mmc_omap_host *host = dev_get_drvdata(dev);
 144
 145                 mmc_omap_enable_poll = enable_poll;
 146                 if (enable_poll && host->switch_pin >= 0)
 147                         schedule_work(&host->switch_work);
 148         }
 149         return size;
 150 }
 151
 152 static DEVICE_ATTR(enable_poll, 0664,
 153                    mmc_omap_show_enable_poll, mmc_omap_store_enable_poll);
 154
 155 static void
 156 mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
 157 {
 158         u32 cmdreg;
 159         u32 resptype;
 160         u32 cmdtype;
 161
 162         pr_debug("MMC%d: CMD%d, argument 0x%08x%s%s%s%s\n",
 163                 host->id, cmd->opcode, cmd->arg,
 164                 (cmd->flags & MMC_RSP_SHORT) ?  ", 32-bit response" : "",
 165                 (cmd->flags & MMC_RSP_LONG) ?  ", 128-bit response" : "",
 166                 (cmd->flags & MMC_RSP_CRC) ?  ", CRC" : "",
 167                 (cmd->flags & MMC_RSP_BUSY) ?  ", busy notification" : "");
 168
 169         host->cmd = cmd;
 170
 171         resptype = 0;
 172         cmdtype = 0;
 173
 174         /*
 175          * On 24xx we may have external MMC transceiver on Menelaus.
 176          * In that case we need to manually toggle between open-drain
 177          * and push-pull states.
 178          */
 179         if (omap_has_menelaus() && (host->bus_mode != host->hw_bus_mode)) {
 180                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 181                         menelaus_mmc_opendrain(1);
 182                 else
 183                         menelaus_mmc_opendrain(0);
 184                 host->hw_bus_mode = host->bus_mode;
 185         }
 186
 187         /* Protocol layer does not provide response type,
 188          * but our hardware needs to know exact type, not just size!
 189          */
 190         switch (cmd->flags & MMC_RSP_MASK) {
 191         case MMC_RSP_NONE:
 192                 /* resp 0 */
 193                 break;
 194         case MMC_RSP_SHORT:
 195                 /* resp 1, resp 1b */
 196                 /* OR resp 3!! (assume this if bus is set opendrain) */
 197                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 198                         resptype = 3;
 199                 else
 200                         resptype = 1;
 201                 break;
 202         case MMC_RSP_LONG:
 203                 /* resp 2 */
 204                 resptype = 2;
 205                 break;
 206         }
 207
 208         /* Protocol layer does not provide command type, but our hardware
 209          * needs it!
 210          * any data transfer means adtc type (but that information is not
 211          * in command structure, so we flagged it into host struct.)
 212          * However, telling bc, bcr and ac apart based on response is
 213          * not foolproof:
 214          * CMD0  = bc  = resp0  CMD15 = ac  = resp0
 215          * CMD2  = bcr = resp2  CMD10 = ac  = resp2
 216          *
 217          * Resolve to best guess with some exception testing:
 218          * resp0 -> bc, except CMD15 = ac
 219          * rest are ac, except if opendrain
 220          */
 221         if (host->data) {
 222                 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
 223         } else if (resptype == 0 && cmd->opcode != 15) {
 224                 cmdtype = OMAP_MMC_CMDTYPE_BC;
 225         } else if (host->bus_mode == MMC_BUSMODE_OPENDRAIN) {
 226                 cmdtype = OMAP_MMC_CMDTYPE_BCR;
 227         } else {
 228                 cmdtype = OMAP_MMC_CMDTYPE_AC;
 229         }
 230
 231         cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
 232
 233         if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
 234                 cmdreg |= 1 << 6;
 235
 236         if (cmd->flags & MMC_RSP_BUSY)
 237                 cmdreg |= 1 << 11;
 238
 239         if (host->data && !(host->data->flags & MMC_DATA_WRITE))
 240                 cmdreg |= 1 << 15;
 241
 242         clk_enable(host->fclk);
 243
 244         OMAP_MMC_WRITE(host->base, CTO, 200);
 245         OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
 246         OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
 247         OMAP_MMC_WRITE(host->base, IE,
 248                        OMAP_MMC_STAT_A_EMPTY    | OMAP_MMC_STAT_A_FULL    |
 249                        OMAP_MMC_STAT_CMD_CRC    | OMAP_MMC_STAT_CMD_TOUT  |
 250                        OMAP_MMC_STAT_DATA_CRC   | OMAP_MMC_STAT_DATA_TOUT |
 251                        OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR  |
 252                        OMAP_MMC_STAT_END_OF_DATA);
 253         OMAP_MMC_WRITE(host->base, CMD, cmdreg);
 254 }
 255
 256 static void
 257 mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
 258 {
 259         if (host->dma_in_use) {
 260                 enum dma_data_direction dma_data_dir;
 261
 262                 BUG_ON(host->dma_ch < 0);
 263                 if (data->error != MMC_ERR_NONE)
 264                         omap_stop_dma(host->dma_ch);
 265                 /* Release DMA channel lazily */
 266                 mod_timer(&host->dma_timer, jiffies + HZ);
 267                 if (data->flags & MMC_DATA_WRITE)
 268                         dma_data_dir = DMA_TO_DEVICE;
 269                 else
 270                         dma_data_dir = DMA_FROM_DEVICE;
 271                 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len,
 272                              dma_data_dir);
 273         }
 274         host->data = NULL;
 275         host->sg_len = 0;
 276         clk_disable(host->fclk);
 277
 278         /* NOTE:  MMC layer will sometimes poll-wait CMD13 next, issuing
 279          * dozens of requests until the card finishes writing data.
 280          * It'd be cheaper to just wait till an EOFB interrupt arrives...
 281          */
 282
 283         if (!data->stop) {
 284                 host->mrq = NULL;
 285                 mmc_request_done(host->mmc, data->mrq);
 286                 return;
 287         }
 288
 289         mmc_omap_start_command(host, data->stop);
 290 }
 291
 292 static void
 293 mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data)
 294 {
 295         unsigned long flags;
 296         int done;
 297
 298         if (!host->dma_in_use) {
 299                 mmc_omap_xfer_done(host, data);
 300                 return;
 301         }
 302         done = 0;
 303         spin_lock_irqsave(&host->dma_lock, flags);
 304         if (host->dma_done)
 305                 done = 1;
 306         else
 307                 host->brs_received = 1;
 308         spin_unlock_irqrestore(&host->dma_lock, flags);
 309         if (done)
 310                 mmc_omap_xfer_done(host, data);
 311 }
 312
 313 static void
 314 mmc_omap_dma_timer(unsigned long data)
 315 {
 316         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 317
 318         DBG("MMC%d: Freeing DMA channel %d\n", host->id, host->dma_ch);
 319         BUG_ON(host->dma_ch < 0);
 320         omap_free_dma(host->dma_ch);
 321         host->dma_ch = -1;
 322 }
 323
 324 static void
 325 mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data)
 326 {
 327         unsigned long flags;
 328         int done;
 329
 330         done = 0;
 331         spin_lock_irqsave(&host->dma_lock, flags);
 332         if (host->brs_received)
 333                 done = 1;
 334         else
 335                 host->dma_done = 1;
 336         spin_unlock_irqrestore(&host->dma_lock, flags);
 337         if (done)
 338                 mmc_omap_xfer_done(host, data);
 339 }
 340
 341 static void
 342 mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
 343 {
 344         host->cmd = NULL;
 345
 346         switch (cmd->flags & MMC_RSP_MASK) {
 347         case MMC_RSP_NONE:
 348                 /* resp 0 */
 349                 break;
 350         case MMC_RSP_SHORT:
 351                 /* response types 1, 1b, 3, 4, 5, 6 */
 352                 cmd->resp[0] =
 353                         OMAP_MMC_READ(host->base, RSP6) |
 354                         (OMAP_MMC_READ(host->base, RSP7) << 16);
 355                 DBG("MMC%d: Response %08x\n", host->id, cmd->resp[0]);
 356                 break;
 357         case MMC_RSP_LONG:
 358                 /* response type 2 */
 359                 cmd->resp[3] =
 360                         OMAP_MMC_READ(host->base, RSP0) |
 361                         (OMAP_MMC_READ(host->base, RSP1) << 16);
 362                 cmd->resp[2] =
 363                         OMAP_MMC_READ(host->base, RSP2) |
 364                         (OMAP_MMC_READ(host->base, RSP3) << 16);
 365                 cmd->resp[1] =
 366                         OMAP_MMC_READ(host->base, RSP4) |
 367                         (OMAP_MMC_READ(host->base, RSP5) << 16);
 368                 cmd->resp[0] =
 369                         OMAP_MMC_READ(host->base, RSP6) |
 370                         (OMAP_MMC_READ(host->base, RSP7) << 16);
 371                 DBG("MMC%d: Response %08x %08x %08x %08x\n", host->id,
 372                     cmd->resp[0], cmd->resp[1],
 373                     cmd->resp[2], cmd->resp[3]);
 374                 break;
 375         }
 376
 377         if (host->data == NULL || cmd->error != MMC_ERR_NONE) {
 378                 DBG("MMC%d: End request, err %x\n", host->id, cmd->error);
 379                 host->mrq = NULL;
 380                 clk_disable(host->fclk);
 381                 mmc_request_done(host->mmc, cmd->mrq);
 382         }
 383 }
 384
 385 /* PIO only */
 386 static void
 387 mmc_omap_sg_to_buf(struct mmc_omap_host *host)
 388 {
 389         struct scatterlist *sg;
 390
 391         sg = host->data->sg + host->sg_idx;
 392         host->buffer_bytes_left = sg->length;
 393         host->buffer = page_address(sg->page) + sg->offset;
 394         if (host->buffer_bytes_left > host->total_bytes_left)
 395                 host->buffer_bytes_left = host->total_bytes_left;
 396 }
 397
 398 /* PIO only */
 399 static void
 400 mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
 401 {
 402         int n;
 403         void __iomem *reg;
 404         u16 *p;
 405
 406         if (host->buffer_bytes_left == 0) {
 407                 host->sg_idx++;
 408                 BUG_ON(host->sg_idx == host->sg_len);
 409                 mmc_omap_sg_to_buf(host);
 410         }
 411         n = 64;
 412         if (n > host->buffer_bytes_left)
 413                 n = host->buffer_bytes_left;
 414         host->buffer_bytes_left -= n;
 415         host->total_bytes_left -= n;
 416         host->data->bytes_xfered += n;
 417
 418         /* Optimize the loop a bit by calculating the register only
 419          * once */
 420         reg = host->base + OMAP_MMC_REG_DATA;
 421         p = host->buffer;
 422         n /= 2;
 423         if (write) {
 424                 while (n--)
 425                         __raw_writew(*p++, reg);
 426         } else {
 427                 while (n-- > 0)
 428                         *p++ = __raw_readw(reg);
 429         }
 430         host->buffer = p;
 431 }
 432
 433 static inline void mmc_omap_report_irq(u16 status)
 434 {
 435         static const char *mmc_omap_status_bits[] = {
 436                 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
 437                 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
 438         };
 439         int i, c = 0;
 440
 441         for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
 442                 if (status & (1 << i)) {
 443                         if (c)
 444                                 printk(" ");
 445                         printk("%s", mmc_omap_status_bits[i]);
 446                         c++;
 447                 }
 448 }
 449
 450 static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
 451 {
 452         struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
 453         u16 status;
 454         int end_command;
 455         int end_transfer;
 456         int transfer_error;
 457
 458         if (host->cmd == NULL && host->data == NULL) {
 459                 status = OMAP_MMC_READ(host->base, STAT);
 460                 printk(KERN_INFO "MMC%d: Spurious interrupt 0x%04x\n", host->id, status);
 461                 if (status != 0) {
 462                         OMAP_MMC_WRITE(host->base, STAT, status);
 463                         OMAP_MMC_WRITE(host->base, IE, 0);
 464                 }
 465                 return IRQ_HANDLED;
 466         }
 467
 468         end_command = 0;
 469         end_transfer = 0;
 470         transfer_error = 0;
 471
 472         while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
 473                 OMAP_MMC_WRITE(host->base, STAT, status); // Reset status bits
 474 #ifdef CONFIG_MMC_DEBUG
 475                 printk(KERN_DEBUG "\tMMC IRQ %04x (CMD %d): ", status,
 476                        host->cmd != NULL ? host->cmd->opcode : -1);
 477                 mmc_omap_report_irq(status);
 478                 printk("\n");
 479 #endif
 480                 if (host->total_bytes_left) {
 481                         if ((status & OMAP_MMC_STAT_A_FULL) ||
 482                             (status & OMAP_MMC_STAT_END_OF_DATA))
 483                                 mmc_omap_xfer_data(host, 0);
 484                         if (status & OMAP_MMC_STAT_A_EMPTY)
 485                                 mmc_omap_xfer_data(host, 1);
 486                 }
 487
 488                 if (status & OMAP_MMC_STAT_END_OF_DATA) {
 489                         // Block sent/received
 490                         end_transfer = 1;
 491                 }
 492
 493                 if (status & OMAP_MMC_STAT_DATA_TOUT) {
 494                         // Data timeout
 495                         printk(KERN_DEBUG "MMC%d: Data timeout\n", host->id);
 496                         if (host->data) {
 497                                 host->data->error |= MMC_ERR_TIMEOUT;
 498                                 transfer_error = 1;
 499                         }
 500                 }
 501
 502                 if (status & OMAP_MMC_STAT_DATA_CRC) {
 503                         // Data CRC error
 504                         if (host->data) {
 505                                 host->data->error |= MMC_ERR_BADCRC;
 506                                 printk(KERN_DEBUG "MMC%d: Data CRC error, bytes left %d\n",
 507                                        host->id, host->total_bytes_left);
 508                                 transfer_error = 1;
 509                         } else {
 510                                 printk(KERN_DEBUG "MMC%d: Data CRC error\n",
 511                                        host->id);
 512                         }
 513                 }
 514
 515                 if (status & OMAP_MMC_STAT_CMD_TOUT) {
 516                         /* Timeouts are routine with some commands */
 517                         if (host->cmd) {
 518                                 if (host->cmd->opcode != MMC_ALL_SEND_CID &&
 519                                     host->cmd->opcode != MMC_SEND_OP_COND &&
 520                                     host->cmd->opcode != MMC_APP_CMD &&
 521                                     !mmc_omap_cover_is_open(host))
 522                                         printk(KERN_ERR "MMC%d: Command timeout, CMD%d\n",
 523                                                host->id, host->cmd->opcode);
 524                                 host->cmd->error |= MMC_ERR_TIMEOUT;
 525                                 end_command = 1;
 526                         }
 527                 }
 528
 529                 if (status & OMAP_MMC_STAT_CMD_CRC) {
 530                         // Command CRC error
 531                         if (host->cmd) {
 532                                 printk(KERN_ERR "MMC%d: Command CRC error (CMD%d, arg 0x%08x)\n",
 533                                        host->id, host->cmd->opcode,
 534                                        host->cmd->arg);
 535                                 host->cmd->error |= MMC_ERR_BADCRC;
 536                                 end_command = 1;
 537                         } else
 538                                 printk(KERN_ERR "MMC%d: Command CRC error without cmd?\n", host->id);
 539                 }
 540
 541                 if (status & OMAP_MMC_STAT_OCR_BUSY) {
 542                         /* OCR Busy ... happens a lot */
 543                         if (host->cmd && host->cmd->opcode != MMC_SEND_OP_COND
 544                                 && host->cmd->opcode != MMC_SET_RELATIVE_ADDR) {
 545                                 DBG("MMC%d: OCR busy error, CMD%d\n",
 546                                        host->id, host->cmd->opcode);
 547                         }
 548                 }
 549
 550                 if (status & OMAP_MMC_STAT_CARD_ERR) {
 551                         if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
 552                                 u32 response = OMAP_MMC_READ(host->base, RSP6)
 553                                         | (OMAP_MMC_READ(host->base, RSP7) << 16);
 554                                 /* STOP sometimes sets must-ignore bits */
 555                                 if (!(response & (R1_CC_ERROR
 556         | R1_ILLEGAL_COMMAND
 557         | R1_COM_CRC_ERROR))) {
 558                                         end_command = 1;
 559                                         continue;
 560                                 }
 561                         }
 562
 563                         // Card status error
 564                         printk(KERN_DEBUG "MMC%d: Card status error (CMD%d)\n",
 565                                host->id, host->cmd->opcode);
 566                         if (host->cmd) {
 567                                 host->cmd->error |= MMC_ERR_FAILED;
 568                                 end_command = 1;
 569                         }
 570                         if (host->data) {
 571                                 host->data->error |= MMC_ERR_FAILED;
 572                                 transfer_error = 1;
 573                         }
 574                 }
 575
 576                 /*
 577                  * NOTE: On 1610 the END_OF_CMD may come too early when
 578                  *       starting a write
 579                  */
 580                 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
 581                     (!(status & OMAP_MMC_STAT_A_EMPTY))) {
 582                         // End of command phase
 583                         end_command = 1;
 584                 }
 585         }
 586
 587         if (end_command) {
 588                 mmc_omap_cmd_done(host, host->cmd);
 589         }
 590         if (transfer_error)
 591                 mmc_omap_xfer_done(host, host->data);
 592         else if (end_transfer)
 593                 mmc_omap_end_of_data(host, host->data);
 594
 595         return IRQ_HANDLED;
 596 }
 597
 598 static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id, struct pt_regs *regs)
 599 {
 600         struct mmc_omap_host *host = (struct mmc_omap_host *) dev_id;
 601
 602         DBG("MMC%d cover is now %s\n", host->id,
 603             omap_get_gpio_datain(host->switch_pin) ? "open" : "closed");
 604         schedule_work(&host->switch_work);
 605
 606         return IRQ_HANDLED;
 607 }
 608
 609 static void mmc_omap_switch_timer(unsigned long arg)
 610 {
 611         struct mmc_omap_host *host = (struct mmc_omap_host *) arg;
 612
 613         schedule_work(&host->switch_work);
 614 }
 615
 616 /* FIXME: Handle card insertion and removal properly. Maybe use a mask
 617  * for MMC state? */
 618 static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
 619 {
 620         if (machine_is_omap_h4()) {
 621                 if (mmc_mask & 0x1)
 622                         printk("XXX card in slot 1\n");
 623                 if (mmc_mask & 0x2)
 624                         printk("XXX card in slot 2\n");
 625         } else {
 626                 /* Assume card detect connected to cover switch */
 627                 if (mmc_mask & 0x2)
 628                         printk("XXX cover open\n");
 629                 else
 630                         printk("XXX cover closed\n");
 631         }
 632 }
 633
 634 static void mmc_omap_switch_handler(void *data)
 635 {
 636         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 637         struct mmc_card *card;
 638         static int complained = 0;
 639         int cards = 0, cover_open;
 640
 641         if (host->switch_pin == -1)
 642                 return;
 643         cover_open = mmc_omap_cover_is_open(host);
 644         if (cover_open != host->switch_last_state) {
 645                 kobject_uevent(&host->dev->kobj, KOBJ_CHANGE);
 646                 host->switch_last_state = cover_open;
 647         }
 648         DBG("MMC cover switch handler started\n");
 649         mmc_detect_change(host->mmc, 0);
 650         list_for_each_entry(card, &host->mmc->cards, node) {
 651                 if (mmc_card_present(card))
 652                         cards++;
 653         }
 654         DBG("MMC%d: %d card(s) present\n", host->id, cards);
 655         if (mmc_omap_cover_is_open(host)) {
 656                 if (!complained) {
 657                         printk(KERN_INFO "MMC%d: cover is open\n", host->id);
 658                         complained = 1;
 659                 }
 660                 if (mmc_omap_enable_poll)
 661                         mod_timer(&host->switch_timer, jiffies +
 662                                 msecs_to_jiffies(OMAP_MMC_SWITCH_POLL_DELAY));
 663         } else {
 664                 complained = 0;
 665         }
 666 }
 667
 668 /* prepare to transfer the next segment of a scatterlist */
 669 static void
 670 mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
 671 {
 672         int dma_ch = host->dma_ch;
 673         unsigned long data_addr;
 674         u16 buf, frame;
 675         u32 count;
 676         struct scatterlist *sg = &data->sg[host->sg_idx];
 677         int src_port = 0;
 678         int dst_port = 0;
 679         int sync_dev = 0;
 680
 681         data_addr = (unsigned long)io_v2p((void __force *) host->base) + OMAP_MMC_REG_DATA;
 682         frame = 1 << data->blksz_bits;
 683         count = (u32)sg_dma_len(sg);
 684
 685         /* the MMC layer is confused about single block writes... */
 686         if ((data->blocks == 1) && (count > (1 << data->blksz_bits))) {
 687                 pr_debug("patch bogus single block length! %d > %d\n",
 688                                 count, frame);
 689                 count = frame;
 690         }
 691         host->dma_len = count;
 692
 693         /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx.
 694          * Use 16 or 32 word frames when the blocksize is at least that large.
 695          * Blocksize is usually 512 bytes; but not for some SD reads.
 696          */
 697         if (cpu_is_omap15xx() && frame > 32)
 698                 frame = 32;
 699         else if (frame > 64)
 700                 frame = 64;
 701         count /= frame;
 702         frame >>= 1;
 703
 704         if (!(data->flags & MMC_DATA_WRITE)) {
 705                 buf = 0x800f | ((frame - 1) << 8);
 706
 707                 if (cpu_class_is_omap1()) {
 708                         src_port = OMAP_DMA_PORT_TIPB;
 709                         dst_port = OMAP_DMA_PORT_EMIFF;
 710                 }
 711                 if (cpu_is_omap24xx())
 712                         sync_dev = OMAP24XX_DMA_MMC1_RX;
 713
 714                 omap_set_dma_src_params(dma_ch, src_port,
 715                                         OMAP_DMA_AMODE_CONSTANT,
 716                                         data_addr, 0, 0);
 717                 omap_set_dma_dest_params(dma_ch, dst_port,
 718                                          OMAP_DMA_AMODE_POST_INC,
 719                                          sg_dma_address(sg), 0, 0);
 720                 omap_set_dma_dest_data_pack(dma_ch, 1);
 721                 omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
 722         } else {
 723                 buf = 0x0f80 | ((frame - 1) << 0);
 724
 725                 if (cpu_class_is_omap1()) {
 726                         src_port = OMAP_DMA_PORT_EMIFF;
 727                         dst_port = OMAP_DMA_PORT_TIPB;
 728                 }
 729                 if (cpu_is_omap24xx())
 730                         sync_dev = OMAP24XX_DMA_MMC1_TX;
 731
 732                 omap_set_dma_dest_params(dma_ch, dst_port,
 733                                          OMAP_DMA_AMODE_CONSTANT,
 734                                          data_addr, 0, 0);
 735                 omap_set_dma_src_params(dma_ch, src_port,
 736                                         OMAP_DMA_AMODE_POST_INC,
 737                                         sg_dma_address(sg), 0, 0);
 738                 omap_set_dma_src_data_pack(dma_ch, 1);
 739                 omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
 740         }
 741
 742         /* Max limit for DMA frame count is 0xffff */
 743         if (unlikely(count > 0xffff))
 744                 BUG();
 745
 746         OMAP_MMC_WRITE(host->base, BUF, buf);
 747         omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
 748                                      frame, count, OMAP_DMA_SYNC_FRAME,
 749                                      sync_dev, 0);
 750 }
 751
 752 /* a scatterlist segment completed */
 753 static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
 754 {
 755         struct mmc_omap_host *host = (struct mmc_omap_host *) data;
 756         struct mmc_data *mmcdat = host->data;
 757
 758         if (unlikely(host->dma_ch < 0)) {
 759                 printk(KERN_ERR "MMC%d: DMA callback while DMA not enabled\n",
 760                        host->id);
 761                 return;
 762         }
 763         /* FIXME: We really should do something to _handle_ the errors */
 764         if (ch_status & OMAP_DMA_TOUT_IRQ) {
 765                 printk(KERN_ERR "MMC%d: DMA timeout\n", host->id);
 766                 return;
 767         }
 768         if (ch_status & OMAP_DMA_DROP_IRQ) {
 769                 printk(KERN_ERR "MMC%d: DMA sync error\n", host->id);
 770                 return;
 771         }
 772         if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) {
 773                 /* REVISIT we should be able to avoid getting IRQs with
 774                  * just SYNC status ...
 775                  */
 776                 if ((ch_status & ~OMAP1_DMA_SYNC_IRQ))
 777                         pr_debug("MMC%d: DMA channel status: %04x\n",
 778                                host->id, ch_status);
 779                 return;
 780         }
 781         mmcdat->bytes_xfered += host->dma_len;
 782
 783         pr_debug("\tMMC DMA %d bytes CB %04x (%d segments to go), %p\n",
 784                 host->dma_len, ch_status,
 785                 host->sg_len - host->sg_idx - 1, host->data);
 786
 787         host->sg_idx++;
 788         if (host->sg_idx < host->sg_len) {
 789                 mmc_omap_prepare_dma(host, host->data);
 790                 omap_start_dma(host->dma_ch);
 791         } else
 792                 mmc_omap_dma_done(host, host->data);
 793 }
 794
 795 static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data *data)
 796 {
 797         const char *dev_name;
 798         int sync_dev, dma_ch, is_read, r;
 799
 800         is_read = !(data->flags & MMC_DATA_WRITE);
 801         del_timer_sync(&host->dma_timer);
 802         if (host->dma_ch >= 0) {
 803                 if (is_read == host->dma_is_read)
 804                         return 0;
 805                 omap_free_dma(host->dma_ch);
 806                 host->dma_ch = -1;
 807         }
 808
 809         if (is_read) {
 810                 if (host->id == 1) {
 811                         sync_dev = OMAP_DMA_MMC_RX;
 812                         dev_name = "MMC1 read";
 813                 } else {
 814                         sync_dev = OMAP_DMA_MMC2_RX;
 815                         dev_name = "MMC2 read";
 816                 }
 817         } else {
 818                 if (host->id == 1) {
 819                         sync_dev = OMAP_DMA_MMC_TX;
 820                         dev_name = "MMC1 write";
 821                 } else {
 822                         sync_dev = OMAP_DMA_MMC2_TX;
 823                         dev_name = "MMC2 write";
 824                 }
 825         }
 826         r = omap_request_dma(sync_dev, dev_name, mmc_omap_dma_cb,
 827                              host, &dma_ch);
 828         if (r != 0) {
 829                 printk("MMC%d: omap_request_dma() failed with %d\n",
 830                        host->id, r);
 831                 return r;
 832         }
 833         host->dma_ch = dma_ch;
 834         host->dma_is_read = is_read;
 835
 836         return 0;
 837 }
 838
 839 static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 840 {
 841         u16 reg;
 842
 843         reg = OMAP_MMC_READ(host->base, SDIO);
 844         reg &= ~(1 << 5);
 845         OMAP_MMC_WRITE(host->base, SDIO, reg);
 846         /* Set maximum timeout */
 847         OMAP_MMC_WRITE(host->base, CTO, 0xff);
 848 }
 849
 850 static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 851 {
 852         int timeout;
 853         u16 reg;
 854
 855         /* Convert ns to clock cycles by assuming 20MHz frequency
 856          * 1 cycle at 20MHz = 500 ns
 857          */
 858         timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
 859
 860         /* Some cards require more time to do at least the first read operation */
 861         timeout = timeout << 4;
 862
 863         /* Check if we need to use timeout multiplier register */
 864         reg = OMAP_MMC_READ(host->base, SDIO);
 865         if (timeout > 0xffff) {
 866                 reg |= (1 << 5);
 867                 timeout /= 1024;
 868         } else
 869                 reg &= ~(1 << 5);
 870         OMAP_MMC_WRITE(host->base, SDIO, reg);
 871         OMAP_MMC_WRITE(host->base, DTO, timeout);
 872 }
 873
 874 static void
 875 mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
 876 {
 877         struct mmc_data *data = req->data;
 878         int i, use_dma, block_size;
 879         unsigned sg_len;
 880
 881         host->data = data;
 882         if (data == NULL) {
 883                 OMAP_MMC_WRITE(host->base, BLEN, 0);
 884                 OMAP_MMC_WRITE(host->base, NBLK, 0);
 885                 OMAP_MMC_WRITE(host->base, BUF, 0);
 886                 host->dma_in_use = 0;
 887                 set_cmd_timeout(host, req);
 888                 return;
 889         }
 890
 891
 892         block_size = 1 << data->blksz_bits;
 893
 894         OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
 895         OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
 896         set_data_timeout(host, req);
 897
 898         /* cope with calling layer confusion; it issues "single
 899          * block" writes using multi-block scatterlists.
 900          */
 901         sg_len = (data->blocks == 1) ? 1 : data->sg_len;
 902
 903         /* Only do DMA for entire blocks */
 904         use_dma = host->use_dma;
 905         if (use_dma) {
 906                 for (i = 0; i < sg_len; i++) {
 907                         if ((data->sg[i].length % block_size) != 0) {
 908                                 use_dma = 0;
 909                                 break;
 910                         }
 911                 }
 912         }
 913
 914         host->sg_idx = 0;
 915         if (use_dma) {
 916                 if (mmc_omap_get_dma_channel(host, data) == 0) {
 917                         enum dma_data_direction dma_data_dir;
 918
 919                         if (data->flags & MMC_DATA_WRITE)
 920                                 dma_data_dir = DMA_TO_DEVICE;
 921                         else
 922                                 dma_data_dir = DMA_FROM_DEVICE;
 923
 924                         host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
 925                                                 sg_len, dma_data_dir);
 926                         host->total_bytes_left = 0;
 927                         mmc_omap_prepare_dma(host, req->data);
 928                         host->brs_received = 0;
 929                         host->dma_done = 0;
 930                         host->dma_in_use = 1;
 931                 } else
 932                         use_dma = 0;
 933         }
 934
 935         /* Revert to PIO? */
 936         if (!use_dma) {
 937                 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
 938                 host->total_bytes_left = data->blocks * block_size;
 939                 host->sg_len = sg_len;
 940                 mmc_omap_sg_to_buf(host);
 941                 host->dma_in_use = 0;
 942         }
 943
 944         pr_debug("MMC%d: %s %s %s, DTO %d cycles + %d ns, "
 945                         "%d blocks of %d bytes, %d segments\n",
 946                 host->id, use_dma ? "DMA" : "PIO",
 947                 (data->flags & MMC_DATA_STREAM) ? "stream" : "block",
 948                 (data->flags & MMC_DATA_WRITE) ? "write" : "read",
 949                 data->timeout_clks, data->timeout_ns, data->blocks,
 950                 block_size, host->sg_len);
 951 }
 952
 953 static inline int is_broken_card(struct mmc_card *card)
 954 {
 955         int i;
 956         struct mmc_cid *c = &card->cid;
 957         static const struct broken_card_cid {
 958                 unsigned int manfid;
 959                 char prod_name[8];
 960                 unsigned char hwrev;
 961                 unsigned char fwrev;
 962         } broken_cards[] = {
 963                 { 0x00150000, "\x30\x30\x30\x30\x30\x30\x15\x00", 0x06, 0x03 },
 964         };
 965
 966         for (i = 0; i < sizeof(broken_cards)/sizeof(broken_cards[0]); i++) {
 967                 const struct broken_card_cid *b = broken_cards + i;
 968
 969                 if (b->manfid != c->manfid)
 970                         continue;
 971                 if (memcmp(b->prod_name, c->prod_name, sizeof(b->prod_name)) != 0)
 972                         continue;
 973                 if (b->hwrev != c->hwrev || b->fwrev != c->fwrev)
 974                         continue;
 975                 return 1;
 976         }
 977         return 0;
 978 }
 979
 980 static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
 981 {
 982         struct mmc_omap_host *host = mmc_priv(mmc);
 983
 984         WARN_ON(host->mrq != NULL);
 985
 986         host->mrq = req;
 987
 988         /* Some cards (vendor left unnamed to protect the guilty) seem to
 989          * require this delay after power-up. Otherwise we'll get mysterious
 990          * data timeouts. */
 991         if (req->cmd->opcode == MMC_SEND_CSD) {
 992                 struct mmc_card *card;
 993                 int broken_present = 0;
 994
 995                 list_for_each_entry(card, &mmc->cards, node) {
 996                         if (is_broken_card(card)) {
 997                                 broken_present = 1;
 998                                 break;
 999                         }
1000                 }
1001                 if (broken_present) {
1002                         static int complained = 0;
1003
1004                         if (!complained) {
1005                                 printk(KERN_WARNING "MMC%d: Broken card workaround enabled\n",
1006                                        host->id);
1007                                 complained = 1;
1008                         }
1009                         if (in_interrupt()) {
1010                                 /* This is nasty */
1011                                  printk(KERN_ERR "Sleeping in IRQ handler, FIXME please!\n");
1012                                  dump_stack();
1013                                  mdelay(100);
1014                         } else {
1015                                 set_current_state(TASK_UNINTERRUPTIBLE);
1016                                 schedule_timeout(100 * HZ / 1000);
1017                         }
1018                 }
1019         }
1020
1021         /* only touch fifo AFTER the controller readies it */
1022         mmc_omap_prepare_data(host, req);
1023         mmc_omap_start_command(host, req->cmd);
1024         if (host->dma_in_use)
1025                 omap_start_dma(host->dma_ch);
1026 }
1027
1028 static void innovator_fpga_socket_power(int on)
1029 {
1030 #if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
1031
1032         if (on) {
1033                 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
1034                      OMAP1510_FPGA_POWER);
1035         } else {
1036                 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
1037                      OMAP1510_FPGA_POWER);
1038         }
1039 #endif
1040 }
1041
1042 /*
1043  * Turn the socket power on/off. Innovator uses FPGA, most boards
1044  * probably use GPIO.
1045  */
1046 static void mmc_omap_power(struct mmc_omap_host *host, int on)
1047 {
1048         if (on) {
1049                 if (machine_is_omap_innovator())
1050                         innovator_fpga_socket_power(1);
1051                 else if (machine_is_omap_h2())
1052                         tps65010_set_gpio_out_value(GPIO3, HIGH);
1053                 else if (machine_is_omap_h3())
1054                         /* GPIO 4 of TPS65010 sends SD_EN signal */
1055                         tps65010_set_gpio_out_value(GPIO4, HIGH);
1056                 else if (cpu_is_omap24xx()) {
1057                         u16 reg = OMAP_MMC_READ(host->base, CON);
1058                         OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
1059                 } else
1060                         if (host->power_pin >= 0)
1061                                 omap_set_gpio_dataout(host->power_pin, 1);
1062         } else {
1063                 if (machine_is_omap_innovator())
1064                         innovator_fpga_socket_power(0);
1065                 else if (machine_is_omap_h2())
1066                         tps65010_set_gpio_out_value(GPIO3, LOW);
1067                 else if (machine_is_omap_h3())
1068                         tps65010_set_gpio_out_value(GPIO4, LOW);
1069                 else if (cpu_is_omap24xx()) {
1070                         u16 reg = OMAP_MMC_READ(host->base, CON);
1071                         OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
1072                 } else
1073                         if (host->power_pin >= 0)
1074                                 omap_set_gpio_dataout(host->power_pin, 0);
1075         }
1076 }
1077
1078 static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1079 {
1080         struct mmc_omap_host *host = mmc_priv(mmc);
1081         int dsor;
1082         int realclock, i;
1083
1084         DBG("MMC%d: set_ios: clock %dHz busmode %d powermode %d Vdd %d.%02d\n",
1085             host->id, ios->clock, ios->bus_mode, ios->power_mode,
1086             ios->vdd / 100, ios->vdd % 100);
1087
1088         if (ios->power_mode == MMC_POWER_UP && ios->clock < 400000)
1089                 realclock = 400000;             /* Fix for broken stack */
1090         else
1091                 realclock = ios->clock;
1092
1093         if (ios->clock == 0)
1094                 dsor = 0;
1095         else {
1096                 int func_clk_rate = clk_get_rate(host->fclk);
1097
1098                 dsor = func_clk_rate / realclock;
1099                 if (dsor < 1)
1100                         dsor = 1;
1101
1102                 if (func_clk_rate / dsor > realclock)
1103                         dsor++;
1104
1105                 if (dsor > 250)
1106                         dsor = 250;
1107                 dsor++;
1108
1109                 if (ios->bus_width == MMC_BUS_WIDTH_4)
1110                         dsor |= 1 << 15;
1111         }
1112
1113         switch (ios->power_mode) {
1114         case MMC_POWER_OFF:
1115                 mmc_omap_power(host, 0);
1116                 break;
1117         case MMC_POWER_UP:
1118         case MMC_POWER_ON:
1119                 mmc_omap_power(host, 1);
1120                 dsor |= 1<<11;
1121                 break;
1122         }
1123
1124         host->bus_mode = ios->bus_mode;
1125         if (omap_has_menelaus()) {
1126                 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
1127                         menelaus_mmc_opendrain(1);
1128                 else
1129                         menelaus_mmc_opendrain(0);
1130         }
1131         host->hw_bus_mode = host->bus_mode;
1132
1133         clk_enable(host->fclk);
1134
1135         /* On insanely high arm_per frequencies something sometimes
1136          * goes somehow out of sync, and the POW bit is not being set,
1137          * which results in the while loop below getting stuck.
1138          * Writing to the CON register twice seems to do the trick. */
1139         for (i = 0; i < 2; i++)
1140                 OMAP_MMC_WRITE(host->base, CON, dsor);
1141         if (ios->power_mode == MMC_POWER_UP) {
1142                 /* Send clock cycles, poll completion */
1143                 OMAP_MMC_WRITE(host->base, IE, 0);
1144                 OMAP_MMC_WRITE(host->base, STAT, 0xffff);
1145                 OMAP_MMC_WRITE(host->base, CMD, 1<<7);
1146                 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
1147                 OMAP_MMC_WRITE(host->base, STAT, 1);
1148         }
1149         clk_disable(host->fclk);
1150 }
1151
1152 static int mmc_omap_get_ro(struct mmc_host *mmc)
1153 {
1154         struct mmc_omap_host *host = mmc_priv(mmc);
1155
1156         return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
1157 }
1158
1159 static struct mmc_host_ops mmc_omap_ops = {
1160         .request        = mmc_omap_request,
1161         .set_ios        = mmc_omap_set_ios,
1162         .get_ro         = mmc_omap_get_ro,
1163 };
1164
1165 static int __init mmc_omap_probe(struct platform_device *pdev)
1166 {
1167         struct omap_mmc_conf *minfo = pdev->dev.platform_data;
1168         struct mmc_host *mmc;
1169         struct mmc_omap_host *host = NULL;
1170         int ret = 0;
1171
1172         if (pdev->resource[0].flags != IORESOURCE_MEM
1173             || pdev->resource[1].flags != IORESOURCE_IRQ) {
1174                 printk(KERN_ERR "mmc_omap_probe: invalid resource type\n");
1175                 return -ENODEV;
1176         }
1177
1178         if (!request_mem_region(pdev->resource[0].start,
1179                                 pdev->resource[0].end - pdev->resource[0].start + 1,
1180                                 pdev->name)) {
1181                 dev_dbg(&pdev->dev, "request_mem_region failed\n");
1182                 return -EBUSY;
1183         }
1184
1185         mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
1186         if (!mmc) {
1187                 ret = -ENOMEM;
1188                 goto out;
1189         }
1190
1191         host = mmc_priv(mmc);
1192         host->mmc = mmc;
1193
1194         spin_lock_init(&host->dma_lock);
1195         init_timer(&host->dma_timer);
1196         host->dma_timer.function = mmc_omap_dma_timer;
1197         host->dma_timer.data = (unsigned long) host;
1198
1199         host->id = pdev->id;
1200
1201         if (cpu_is_omap24xx()) {
1202                 host->iclk = clk_get(&pdev->dev, "mmc_ick");
1203                 if (IS_ERR(host->iclk))
1204                         goto out;
1205                 clk_enable(host->iclk);
1206         }
1207
1208         if (!cpu_is_omap24xx())
1209                 host->fclk = clk_get(&pdev->dev,
1210                                     (host->id == 1) ? "mmc1_ck" : "mmc2_ck");
1211         else
1212                 host->fclk = clk_get(&pdev->dev, "mmc_fck");
1213
1214         if (IS_ERR(host->fclk)) {
1215                 ret = PTR_ERR(host->fclk);
1216                 goto out;
1217         }
1218
1219         /* REVISIT:
1220          * Also, use minfo->cover to decide how to manage
1221          * the card detect sensing.
1222          */
1223         host->power_pin = minfo->power_pin;
1224         host->switch_pin = minfo->switch_pin;
1225         host->wp_pin = minfo->wp_pin;
1226         host->use_dma = 1;
1227         host->dma_ch = -1;
1228
1229         host->irq = pdev->resource[1].start;
1230         host->base = (void __iomem *)pdev->resource[0].start;
1231
1232          if (minfo->wire4)
1233                  mmc->caps |= MMC_CAP_4_BIT_DATA;
1234
1235         mmc->ops = &mmc_omap_ops;
1236         mmc->f_min = 400000;
1237         mmc->f_max = 24000000;
1238         mmc->ocr_avail = MMC_VDD_33_34;
1239
1240         /* Use scatterlist DMA to reduce per-transfer costs.
1241          * NOTE max_seg_size assumption that small blocks aren't
1242          * normally used (except e.g. for reading SD registers).
1243          */
1244         mmc->max_phys_segs = 32;
1245         mmc->max_hw_segs = 32;
1246         mmc->max_sectors = 256; /* NBLK max 11-bits, OMAP also limited by DMA */
1247         mmc->max_seg_size = mmc->max_sectors * 512;
1248
1249         if (host->power_pin >= 0) {
1250                 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
1251                         printk(KERN_ERR "MMC%d: Unable to get GPIO pin for MMC power\n",
1252                                host->id);
1253                         goto out;
1254                 }
1255                 omap_set_gpio_direction(host->power_pin, 0);
1256         }
1257
1258         ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1259         if (ret)
1260                 goto out;
1261
1262         host->dev = &pdev->dev;
1263         platform_set_drvdata(pdev, host);
1264
1265         mmc_add_host(mmc);
1266
1267         if (host->switch_pin >= 0) {
1268                 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
1269                 init_timer(&host->switch_timer);
1270                 host->switch_timer.function = mmc_omap_switch_timer;
1271                 host->switch_timer.data = (unsigned long) host;
1272                 if (omap_request_gpio(host->switch_pin) != 0) {
1273                         printk(KERN_WARNING "MMC%d: Unable to get GPIO pin for MMC cover switch\n",
1274                                host->id);
1275                         host->switch_pin = -1;
1276                         goto no_switch;
1277                 }
1278
1279                 omap_set_gpio_direction(host->switch_pin, 1);
1280                 set_irq_type(OMAP_GPIO_IRQ(host->switch_pin), IRQT_RISING);
1281                 ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
1282                                   mmc_omap_switch_irq, 0, DRIVER_NAME, host);
1283                 if (ret) {
1284                         printk(KERN_WARNING "MMC%d: Unable to get IRQ for MMC cover switch\n",
1285                                host->id);
1286                         omap_free_gpio(host->switch_pin);
1287                         host->switch_pin = -1;
1288                         goto no_switch;
1289                 }
1290                 ret = device_create_file(&pdev->dev, &dev_attr_cover_switch);
1291                 if (ret == 0) {
1292                         ret = device_create_file(&pdev->dev, &dev_attr_enable_poll);
1293                         if (ret != 0)
1294                                 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1295                 }
1296                 if (ret) {
1297                         printk(KERN_WARNING "MMC%d: Unable to create sysfs attributes\n",
1298                                host->id);
1299                         free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1300                         omap_free_gpio(host->switch_pin);
1301                         host->switch_pin = -1;
1302                         goto no_switch;
1303                 }
1304                 if (mmc_omap_enable_poll && mmc_omap_cover_is_open(host))
1305                         schedule_work(&host->switch_work);
1306         }
1307
1308         if (omap_has_menelaus())
1309                 menelaus_mmc_register(mmc_omap_switch_callback,
1310           (unsigned long)&host);
1311
1312 no_switch:
1313         return 0;
1314
1315 out:
1316         /* FIXME: Free other resources too. */
1317         if (host) {
1318                 if (host->iclk && !IS_ERR(host->iclk))
1319                         clk_put(host->iclk);
1320                 if (host->fclk && !IS_ERR(host->fclk))
1321                         clk_put(host->fclk);
1322                 mmc_free_host(host->mmc);
1323         }
1324         return ret;
1325 }
1326
1327 static int mmc_omap_remove(struct platform_device *pdev)
1328 {
1329         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1330
1331         platform_set_drvdata(pdev, NULL);
1332
1333         if (host) {
1334                 mmc_remove_host(host->mmc);
1335                 free_irq(host->irq, host);
1336                 mmc_omap_power(host, 0);
1337
1338                 if (host->power_pin >= 0)
1339                         omap_free_gpio(host->power_pin);
1340                 if (host->switch_pin >= 0) {
1341                         device_remove_file(&pdev->dev, &dev_attr_enable_poll);
1342                         device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1343                         free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1344                         omap_free_gpio(host->switch_pin);
1345                         host->switch_pin = -1;
1346                         del_timer_sync(&host->switch_timer);
1347                         flush_scheduled_work();
1348                 }
1349                 if (host->iclk && !IS_ERR(host->iclk))
1350                         clk_put(host->iclk);
1351                 if (host->fclk && !IS_ERR(host->fclk))
1352                         clk_put(host->fclk);
1353                 mmc_free_host(host->mmc);
1354         }
1355
1356         if (omap_has_menelaus())
1357                 menelaus_mmc_remove();
1358
1359         release_mem_region(pdev->resource[0].start,
1360                            pdev->resource[0].end - pdev->resource[0].start + 1);
1361
1362         return 0;
1363 }
1364
1365 #ifdef CONFIG_PM
1366 static int mmc_omap_suspend(struct platform_device *pdev, pm_message_t mesg)
1367 {
1368         int ret = 0;
1369         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1370
1371         if (host && host->suspended)
1372                 return 0;
1373
1374         if (!irqs_disabled())
1375                 return -EAGAIN;
1376
1377         if (host) {
1378                 ret = mmc_suspend_host(host->mmc, mesg);
1379                 if (ret == 0)
1380                         host->suspended = 1;
1381         }
1382         return ret;
1383 }
1384
1385 static int mmc_omap_resume(struct platform_device *pdev)
1386 {
1387         int ret = 0;
1388         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1389
1390         if (host && !host->suspended)
1391                 return 0;
1392
1393         if (host) {
1394                 ret = mmc_resume_host(host->mmc);
1395                 if (ret == 0)
1396                         host->suspended = 0;
1397         }
1398
1399         return ret;
1400 }
1401 #else
1402 #define mmc_omap_suspend        NULL
1403 #define mmc_omap_resume         NULL
1404 #endif
1405
1406 static struct platform_driver mmc_omap_driver = {
1407         .probe          = mmc_omap_probe,
1408         .remove         = mmc_omap_remove,
1409         .suspend        = mmc_omap_suspend,
1410         .resume         = mmc_omap_resume,
1411         .driver         = {
1412                 .name   = DRIVER_NAME,
1413         },
1414 };
1415
1416 static int __init mmc_omap_init(void)
1417 {
1418         return platform_driver_register(&mmc_omap_driver);
1419 }
1420
1421 static void __exit mmc_omap_exit(void)
1422 {
1423         platform_driver_unregister(&mmc_omap_driver);
1424 }
1425
1426 module_init(mmc_omap_init);
1427 module_exit(mmc_omap_exit);
1428
1429 MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1430 MODULE_LICENSE("GPL");
1431 MODULE_ALIAS(DRIVER_NAME);
1432 MODULE_AUTHOR("Juha Yrjölä");