drivers/mmc/host/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  *
  11  * Thanks to the following companies for their support:
  12  *
  13  *     - JMicron (hardware and technical support)
  14  */
  15
  16 #include <linux/delay.h>
  17 #include <linux/highmem.h>
  18 #include <linux/io.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/scatterlist.h>
  21
  22 #include <linux/leds.h>
  23
  24 #include <linux/mmc/host.h>
  25
  26 #include "sdhci.h"
  27
  28 #define DRIVER_NAME "sdhci"
  29
  30 #define DBG(f, x...) \
  31         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  32
  33 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  34         defined(CONFIG_MMC_SDHCI_MODULE))
  35 #define SDHCI_USE_LEDS_CLASS
  36 #endif
  37
  38 static unsigned int debug_quirks = 0;
  39
  40 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  41 static void sdhci_finish_data(struct sdhci_host *);
  42
  43 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  44 static void sdhci_finish_command(struct sdhci_host *);
  45
  46 static void sdhci_dumpregs(struct sdhci_host *host)
  47 {
  48         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  49
  50         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  51                 sdhci_readl(host, SDHCI_DMA_ADDRESS),
  52                 sdhci_readw(host, SDHCI_HOST_VERSION));
  53         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  54                 sdhci_readw(host, SDHCI_BLOCK_SIZE),
  55                 sdhci_readw(host, SDHCI_BLOCK_COUNT));
  56         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  57                 sdhci_readl(host, SDHCI_ARGUMENT),
  58                 sdhci_readw(host, SDHCI_TRANSFER_MODE));
  59         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
  60                 sdhci_readl(host, SDHCI_PRESENT_STATE),
  61                 sdhci_readb(host, SDHCI_HOST_CONTROL));
  62         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
  63                 sdhci_readb(host, SDHCI_POWER_CONTROL),
  64                 sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
  65         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
  66                 sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
  67                 sdhci_readw(host, SDHCI_CLOCK_CONTROL));
  68         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
  69                 sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
  70                 sdhci_readl(host, SDHCI_INT_STATUS));
  71         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
  72                 sdhci_readl(host, SDHCI_INT_ENABLE),
  73                 sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
  74         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
  75                 sdhci_readw(host, SDHCI_ACMD12_ERR),
  76                 sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
  77         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
  78                 sdhci_readl(host, SDHCI_CAPABILITIES),
  79                 sdhci_readl(host, SDHCI_MAX_CURRENT));
  80
  81         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
  82 }
  83
  84 /*****************************************************************************\
  85  *                                                                           *
  86  * Low level functions                                                       *
  87  *                                                                           *
  88 \*****************************************************************************/
  89
  90 static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
  91 {
  92         u32 ier;
  93
  94         ier = sdhci_readl(host, SDHCI_INT_ENABLE);
  95         ier &= ~clear;
  96         ier |= set;
  97         sdhci_writel(host, ier, SDHCI_INT_ENABLE);
  98         sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
  99 }
 100
 101 static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
 102 {
 103         sdhci_clear_set_irqs(host, 0, irqs);
 104 }
 105
 106 static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
 107 {
 108         sdhci_clear_set_irqs(host, irqs, 0);
 109 }
 110
 111 static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
 112 {
 113         u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;
 114
 115         if (enable)
 116                 sdhci_unmask_irqs(host, irqs);
 117         else
 118                 sdhci_mask_irqs(host, irqs);
 119 }
 120
 121 static void sdhci_enable_card_detection(struct sdhci_host *host)
 122 {
 123         sdhci_set_card_detection(host, true);
 124 }
 125
 126 static void sdhci_disable_card_detection(struct sdhci_host *host)
 127 {
 128         sdhci_set_card_detection(host, false);
 129 }
 130
 131 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 132 {
 133         unsigned long timeout;
 134
 135         if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 136                 if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
 137                         SDHCI_CARD_PRESENT))
 138                         return;
 139         }
 140
 141         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
 142
 143         if (mask & SDHCI_RESET_ALL)
 144                 host->clock = 0;
 145
 146         /* Wait max 100 ms */
 147         timeout = 100;
 148
 149         /* hw clears the bit when it's done */
 150         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
 151                 if (timeout == 0) {
 152                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 153                                 mmc_hostname(host->mmc), (int)mask);
 154                         sdhci_dumpregs(host);
 155                         return;
 156                 }
 157                 timeout--;
 158                 mdelay(1);
 159         }
 160 }
 161
 162 static void sdhci_init(struct sdhci_host *host)
 163 {
 164         sdhci_reset(host, SDHCI_RESET_ALL);
 165
 166         sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
 167                 SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 168                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 169                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 170                 SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
 171 }
 172
 173 static void sdhci_reinit(struct sdhci_host *host)
 174 {
 175         sdhci_init(host);
 176         sdhci_enable_card_detection(host);
 177 }
 178
 179 static void sdhci_activate_led(struct sdhci_host *host)
 180 {
 181         u8 ctrl;
 182
 183         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 184         ctrl |= SDHCI_CTRL_LED;
 185         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 186 }
 187
 188 static void sdhci_deactivate_led(struct sdhci_host *host)
 189 {
 190         u8 ctrl;
 191
 192         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 193         ctrl &= ~SDHCI_CTRL_LED;
 194         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 195 }
 196
 197 #ifdef SDHCI_USE_LEDS_CLASS
 198 static void sdhci_led_control(struct led_classdev *led,
 199         enum led_brightness brightness)
 200 {
 201         struct sdhci_host *host = container_of(led, struct sdhci_host, led);
 202         unsigned long flags;
 203
 204         spin_lock_irqsave(&host->lock, flags);
 205
 206         if (brightness == LED_OFF)
 207                 sdhci_deactivate_led(host);
 208         else
 209                 sdhci_activate_led(host);
 210
 211         spin_unlock_irqrestore(&host->lock, flags);
 212 }
 213 #endif
 214
 215 /*****************************************************************************\
 216  *                                                                           *
 217  * Core functions                                                            *
 218  *                                                                           *
 219 \*****************************************************************************/
 220
 221 static void sdhci_read_block_pio(struct sdhci_host *host)
 222 {
 223         unsigned long flags;
 224         size_t blksize, len, chunk;
 225         u32 uninitialized_var(scratch);
 226         u8 *buf;
 227
 228         DBG("PIO reading\n");
 229
 230         blksize = host->data->blksz;
 231         chunk = 0;
 232
 233         local_irq_save(flags);
 234
 235         while (blksize) {
 236                 if (!sg_miter_next(&host->sg_miter))
 237                         BUG();
 238
 239                 len = min(host->sg_miter.length, blksize);
 240
 241                 blksize -= len;
 242                 host->sg_miter.consumed = len;
 243
 244                 buf = host->sg_miter.addr;
 245
 246                 while (len) {
 247                         if (chunk == 0) {
 248                                 scratch = sdhci_readl(host, SDHCI_BUFFER);
 249                                 chunk = 4;
 250                         }
 251
 252                         *buf = scratch & 0xFF;
 253
 254                         buf++;
 255                         scratch >>= 8;
 256                         chunk--;
 257                         len--;
 258                 }
 259         }
 260
 261         sg_miter_stop(&host->sg_miter);
 262
 263         local_irq_restore(flags);
 264 }
 265
 266 static void sdhci_write_block_pio(struct sdhci_host *host)
 267 {
 268         unsigned long flags;
 269         size_t blksize, len, chunk;
 270         u32 scratch;
 271         u8 *buf;
 272
 273         DBG("PIO writing\n");
 274
 275         blksize = host->data->blksz;
 276         chunk = 0;
 277         scratch = 0;
 278
 279         local_irq_save(flags);
 280
 281         while (blksize) {
 282                 if (!sg_miter_next(&host->sg_miter))
 283                         BUG();
 284
 285                 len = min(host->sg_miter.length, blksize);
 286
 287                 blksize -= len;
 288                 host->sg_miter.consumed = len;
 289
 290                 buf = host->sg_miter.addr;
 291
 292                 while (len) {
 293                         scratch |= (u32)*buf << (chunk * 8);
 294
 295                         buf++;
 296                         chunk++;
 297                         len--;
 298
 299                         if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
 300                                 sdhci_writel(host, scratch, SDHCI_BUFFER);
 301                                 chunk = 0;
 302                                 scratch = 0;
 303                         }
 304                 }
 305         }
 306
 307         sg_miter_stop(&host->sg_miter);
 308
 309         local_irq_restore(flags);
 310 }
 311
 312 static void sdhci_transfer_pio(struct sdhci_host *host)
 313 {
 314         u32 mask;
 315
 316         BUG_ON(!host->data);
 317
 318         if (host->blocks == 0)
 319                 return;
 320
 321         if (host->data->flags & MMC_DATA_READ)
 322                 mask = SDHCI_DATA_AVAILABLE;
 323         else
 324                 mask = SDHCI_SPACE_AVAILABLE;
 325
 326         /*
 327          * Some controllers (JMicron JMB38x) mess up the buffer bits
 328          * for transfers < 4 bytes. As long as it is just one block,
 329          * we can ignore the bits.
 330          */
 331         if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
 332                 (host->data->blocks == 1))
 333                 mask = ~0;
 334
 335         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 336                 if (host->data->flags & MMC_DATA_READ)
 337                         sdhci_read_block_pio(host);
 338                 else
 339                         sdhci_write_block_pio(host);
 340
 341                 host->blocks--;
 342                 if (host->blocks == 0)
 343                         break;
 344         }
 345
 346         DBG("PIO transfer complete.\n");
 347 }
 348
 349 static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
 350 {
 351         local_irq_save(*flags);
 352         return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 353 }
 354
 355 static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
 356 {
 357         kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 358         local_irq_restore(*flags);
 359 }
 360
 361 static int sdhci_adma_table_pre(struct sdhci_host *host,
 362         struct mmc_data *data)
 363 {
 364         int direction;
 365
 366         u8 *desc;
 367         u8 *align;
 368         dma_addr_t addr;
 369         dma_addr_t align_addr;
 370         int len, offset;
 371
 372         struct scatterlist *sg;
 373         int i;
 374         char *buffer;
 375         unsigned long flags;
 376
 377         /*
 378          * The spec does not specify endianness of descriptor table.
 379          * We currently guess that it is LE.
 380          */
 381
 382         if (data->flags & MMC_DATA_READ)
 383                 direction = DMA_FROM_DEVICE;
 384         else
 385                 direction = DMA_TO_DEVICE;
 386
 387         /*
 388          * The ADMA descriptor table is mapped further down as we
 389          * need to fill it with data first.
 390          */
 391
 392         host->align_addr = dma_map_single(mmc_dev(host->mmc),
 393                 host->align_buffer, 128 * 4, direction);
 394         if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
 395                 goto fail;
 396         BUG_ON(host->align_addr & 0x3);
 397
 398         host->sg_count = dma_map_sg(mmc_dev(host->mmc),
 399                 data->sg, data->sg_len, direction);
 400         if (host->sg_count == 0)
 401                 goto unmap_align;
 402
 403         desc = host->adma_desc;
 404         align = host->align_buffer;
 405
 406         align_addr = host->align_addr;
 407
 408         for_each_sg(data->sg, sg, host->sg_count, i) {
 409                 addr = sg_dma_address(sg);
 410                 len = sg_dma_len(sg);
 411
 412                 /*
 413                  * The SDHCI specification states that ADMA
 414                  * addresses must be 32-bit aligned. If they
 415                  * aren't, then we use a bounce buffer for
 416                  * the (up to three) bytes that screw up the
 417                  * alignment.
 418                  */
 419                 offset = (4 - (addr & 0x3)) & 0x3;
 420                 if (offset) {
 421                         if (data->flags & MMC_DATA_WRITE) {
 422                                 buffer = sdhci_kmap_atomic(sg, &flags);
 423                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 424                                 memcpy(align, buffer, offset);
 425                                 sdhci_kunmap_atomic(buffer, &flags);
 426                         }
 427
 428                         desc[7] = (align_addr >> 24) & 0xff;
 429                         desc[6] = (align_addr >> 16) & 0xff;
 430                         desc[5] = (align_addr >> 8) & 0xff;
 431                         desc[4] = (align_addr >> 0) & 0xff;
 432
 433                         BUG_ON(offset > 65536);
 434
 435                         desc[3] = (offset >> 8) & 0xff;
 436                         desc[2] = (offset >> 0) & 0xff;
 437
 438                         desc[1] = 0x00;
 439                         desc[0] = 0x21; /* tran, valid */
 440
 441                         align += 4;
 442                         align_addr += 4;
 443
 444                         desc += 8;
 445
 446                         addr += offset;
 447                         len -= offset;
 448                 }
 449
 450                 desc[7] = (addr >> 24) & 0xff;
 451                 desc[6] = (addr >> 16) & 0xff;
 452                 desc[5] = (addr >> 8) & 0xff;
 453                 desc[4] = (addr >> 0) & 0xff;
 454
 455                 BUG_ON(len > 65536);
 456
 457                 desc[3] = (len >> 8) & 0xff;
 458                 desc[2] = (len >> 0) & 0xff;
 459
 460                 desc[1] = 0x00;
 461                 desc[0] = 0x21; /* tran, valid */
 462
 463                 desc += 8;
 464
 465                 /*
 466                  * If this triggers then we have a calculation bug
 467                  * somewhere. :/
 468                  */
 469                 WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
 470         }
 471
 472         /*
 473          * Add a terminating entry.
 474          */
 475         desc[7] = 0;
 476         desc[6] = 0;
 477         desc[5] = 0;
 478         desc[4] = 0;
 479
 480         desc[3] = 0;
 481         desc[2] = 0;
 482
 483         desc[1] = 0x00;
 484         desc[0] = 0x03; /* nop, end, valid */
 485
 486         /*
 487          * Resync align buffer as we might have changed it.
 488          */
 489         if (data->flags & MMC_DATA_WRITE) {
 490                 dma_sync_single_for_device(mmc_dev(host->mmc),
 491                         host->align_addr, 128 * 4, direction);
 492         }
 493
 494         host->adma_addr = dma_map_single(mmc_dev(host->mmc),
 495                 host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 496         if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
 497                 goto unmap_entries;
 498         BUG_ON(host->adma_addr & 0x3);
 499
 500         return 0;
 501
 502 unmap_entries:
 503         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 504                 data->sg_len, direction);
 505 unmap_align:
 506         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 507                 128 * 4, direction);
 508 fail:
 509         return -EINVAL;
 510 }
 511
 512 static void sdhci_adma_table_post(struct sdhci_host *host,
 513         struct mmc_data *data)
 514 {
 515         int direction;
 516
 517         struct scatterlist *sg;
 518         int i, size;
 519         u8 *align;
 520         char *buffer;
 521         unsigned long flags;
 522
 523         if (data->flags & MMC_DATA_READ)
 524                 direction = DMA_FROM_DEVICE;
 525         else
 526                 direction = DMA_TO_DEVICE;
 527
 528         dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
 529                 (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 530
 531         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 532                 128 * 4, direction);
 533
 534         if (data->flags & MMC_DATA_READ) {
 535                 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
 536                         data->sg_len, direction);
 537
 538                 align = host->align_buffer;
 539
 540                 for_each_sg(data->sg, sg, host->sg_count, i) {
 541                         if (sg_dma_address(sg) & 0x3) {
 542                                 size = 4 - (sg_dma_address(sg) & 0x3);
 543
 544                                 buffer = sdhci_kmap_atomic(sg, &flags);
 545                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 546                                 memcpy(buffer, align, size);
 547                                 sdhci_kunmap_atomic(buffer, &flags);
 548
 549                                 align += 4;
 550                         }
 551                 }
 552         }
 553
 554         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 555                 data->sg_len, direction);
 556 }
 557
 558 static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
 559 {
 560         u8 count;
 561         unsigned target_timeout, current_timeout;
 562
 563         /*
 564          * If the host controller provides us with an incorrect timeout
 565          * value, just skip the check and use 0xE.  The hardware may take
 566          * longer to time out, but that's much better than having a too-short
 567          * timeout value.
 568          */
 569         if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
 570                 return 0xE;
 571
 572         /* timeout in us */
 573         target_timeout = data->timeout_ns / 1000 +
 574                 data->timeout_clks / host->clock;
 575
 576         /*
 577          * Figure out needed cycles.
 578          * We do this in steps in order to fit inside a 32 bit int.
 579          * The first step is the minimum timeout, which will have a
 580          * minimum resolution of 6 bits:
 581          * (1) 2^13*1000 > 2^22,
 582          * (2) host->timeout_clk < 2^16
 583          *     =>
 584          *     (1) / (2) > 2^6
 585          */
 586         count = 0;
 587         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 588         while (current_timeout < target_timeout) {
 589                 count++;
 590                 current_timeout <<= 1;
 591                 if (count >= 0xF)
 592                         break;
 593         }
 594
 595         if (count >= 0xF) {
 596                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 597                         mmc_hostname(host->mmc));
 598                 count = 0xE;
 599         }
 600
 601         return count;
 602 }
 603
 604 static void sdhci_set_transfer_irqs(struct sdhci_host *host)
 605 {
 606         u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
 607         u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
 608
 609         if (host->flags & SDHCI_REQ_USE_DMA)
 610                 sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
 611         else
 612                 sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
 613 }
 614
 615 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 616 {
 617         u8 count;
 618         u8 ctrl;
 619         int ret;
 620
 621         WARN_ON(host->data);
 622
 623         if (data == NULL)
 624                 return;
 625
 626         /* Sanity checks */
 627         BUG_ON(data->blksz * data->blocks > 524288);
 628         BUG_ON(data->blksz > host->mmc->max_blk_size);
 629         BUG_ON(data->blocks > 65535);
 630
 631         host->data = data;
 632         host->data_early = 0;
 633
 634         count = sdhci_calc_timeout(host, data);
 635         sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
 636
 637         if (host->flags & SDHCI_USE_DMA)
 638                 host->flags |= SDHCI_REQ_USE_DMA;
 639
 640         /*
 641          * FIXME: This doesn't account for merging when mapping the
 642          * scatterlist.
 643          */
 644         if (host->flags & SDHCI_REQ_USE_DMA) {
 645                 int broken, i;
 646                 struct scatterlist *sg;
 647
 648                 broken = 0;
 649                 if (host->flags & SDHCI_USE_ADMA) {
 650                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 651                                 broken = 1;
 652                 } else {
 653                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
 654                                 broken = 1;
 655                 }
 656
 657                 if (unlikely(broken)) {
 658                         for_each_sg(data->sg, sg, data->sg_len, i) {
 659                                 if (sg->length & 0x3) {
 660                                         DBG("Reverting to PIO because of "
 661                                                 "transfer size (%d)\n",
 662                                                 sg->length);
 663                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 664                                         break;
 665                                 }
 666                         }
 667                 }
 668         }
 669
 670         /*
 671          * The assumption here being that alignment is the same after
 672          * translation to device address space.
 673          */
 674         if (host->flags & SDHCI_REQ_USE_DMA) {
 675                 int broken, i;
 676                 struct scatterlist *sg;
 677
 678                 broken = 0;
 679                 if (host->flags & SDHCI_USE_ADMA) {
 680                         /*
 681                          * As we use 3 byte chunks to work around
 682                          * alignment problems, we need to check this
 683                          * quirk.
 684                          */
 685                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 686                                 broken = 1;
 687                 } else {
 688                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
 689                                 broken = 1;
 690                 }
 691
 692                 if (unlikely(broken)) {
 693                         for_each_sg(data->sg, sg, data->sg_len, i) {
 694                                 if (sg->offset & 0x3) {
 695                                         DBG("Reverting to PIO because of "
 696                                                 "bad alignment\n");
 697                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 698                                         break;
 699                                 }
 700                         }
 701                 }
 702         }
 703
 704         if (host->flags & SDHCI_REQ_USE_DMA) {
 705                 if (host->flags & SDHCI_USE_ADMA) {
 706                         ret = sdhci_adma_table_pre(host, data);
 707                         if (ret) {
 708                                 /*
 709                                  * This only happens when someone fed
 710                                  * us an invalid request.
 711                                  */
 712                                 WARN_ON(1);
 713                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 714                         } else {
 715                                 sdhci_writel(host, host->adma_addr,
 716                                         SDHCI_ADMA_ADDRESS);
 717                         }
 718                 } else {
 719                         int sg_cnt;
 720
 721                         sg_cnt = dma_map_sg(mmc_dev(host->mmc),
 722                                         data->sg, data->sg_len,
 723                                         (data->flags & MMC_DATA_READ) ?
 724                                                 DMA_FROM_DEVICE :
 725                                                 DMA_TO_DEVICE);
 726                         if (sg_cnt == 0) {
 727                                 /*
 728                                  * This only happens when someone fed
 729                                  * us an invalid request.
 730                                  */
 731                                 WARN_ON(1);
 732                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 733                         } else {
 734                                 WARN_ON(sg_cnt != 1);
 735                                 sdhci_writel(host, sg_dma_address(data->sg),
 736                                         SDHCI_DMA_ADDRESS);
 737                         }
 738                 }
 739         }
 740
 741         /*
 742          * Always adjust the DMA selection as some controllers
 743          * (e.g. JMicron) can't do PIO properly when the selection
 744          * is ADMA.
 745          */
 746         if (host->version >= SDHCI_SPEC_200) {
 747                 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 748                 ctrl &= ~SDHCI_CTRL_DMA_MASK;
 749                 if ((host->flags & SDHCI_REQ_USE_DMA) &&
 750                         (host->flags & SDHCI_USE_ADMA))
 751                         ctrl |= SDHCI_CTRL_ADMA32;
 752                 else
 753                         ctrl |= SDHCI_CTRL_SDMA;
 754                 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 755         }
 756
 757         if (!(host->flags & SDHCI_REQ_USE_DMA)) {
 758                 sg_miter_start(&host->sg_miter,
 759                         data->sg, data->sg_len, SG_MITER_ATOMIC);
 760                 host->blocks = data->blocks;
 761         }
 762
 763         sdhci_set_transfer_irqs(host);
 764
 765         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 766         sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
 767         sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 768 }
 769
 770 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 771         struct mmc_data *data)
 772 {
 773         u16 mode;
 774
 775         if (data == NULL)
 776                 return;
 777
 778         WARN_ON(!host->data);
 779
 780         mode = SDHCI_TRNS_BLK_CNT_EN;
 781         if (data->blocks > 1)
 782                 mode |= SDHCI_TRNS_MULTI;
 783         if (data->flags & MMC_DATA_READ)
 784                 mode |= SDHCI_TRNS_READ;
 785         if (host->flags & SDHCI_REQ_USE_DMA)
 786                 mode |= SDHCI_TRNS_DMA;
 787
 788         sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
 789 }
 790
 791 static void sdhci_finish_data(struct sdhci_host *host)
 792 {
 793         struct mmc_data *data;
 794
 795         BUG_ON(!host->data);
 796
 797         data = host->data;
 798         host->data = NULL;
 799
 800         if (host->flags & SDHCI_REQ_USE_DMA) {
 801                 if (host->flags & SDHCI_USE_ADMA)
 802                         sdhci_adma_table_post(host, data);
 803                 else {
 804                         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 805                                 data->sg_len, (data->flags & MMC_DATA_READ) ?
 806                                         DMA_FROM_DEVICE : DMA_TO_DEVICE);
 807                 }
 808         }
 809
 810         /*
 811          * The specification states that the block count register must
 812          * be updated, but it does not specify at what point in the
 813          * data flow. That makes the register entirely useless to read
 814          * back so we have to assume that nothing made it to the card
 815          * in the event of an error.
 816          */
 817         if (data->error)
 818                 data->bytes_xfered = 0;
 819         else
 820                 data->bytes_xfered = data->blksz * data->blocks;
 821
 822         if (data->stop) {
 823                 /*
 824                  * The controller needs a reset of internal state machines
 825                  * upon error conditions.
 826                  */
 827                 if (data->error) {
 828                         sdhci_reset(host, SDHCI_RESET_CMD);
 829                         sdhci_reset(host, SDHCI_RESET_DATA);
 830                 }
 831
 832                 sdhci_send_command(host, data->stop);
 833         } else
 834                 tasklet_schedule(&host->finish_tasklet);
 835 }
 836
 837 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 838 {
 839         int flags;
 840         u32 mask;
 841         unsigned long timeout;
 842
 843         WARN_ON(host->cmd);
 844
 845         /* Wait max 10 ms */
 846         timeout = 10;
 847
 848         mask = SDHCI_CMD_INHIBIT;
 849         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 850                 mask |= SDHCI_DATA_INHIBIT;
 851
 852         /* We shouldn't wait for data inihibit for stop commands, even
 853            though they might use busy signaling */
 854         if (host->mrq->data && (cmd == host->mrq->data->stop))
 855                 mask &= ~SDHCI_DATA_INHIBIT;
 856
 857         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 858                 if (timeout == 0) {
 859                         printk(KERN_ERR "%s: Controller never released "
 860                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 861                         sdhci_dumpregs(host);
 862                         cmd->error = -EIO;
 863                         tasklet_schedule(&host->finish_tasklet);
 864                         return;
 865                 }
 866                 timeout--;
 867                 mdelay(1);
 868         }
 869
 870         mod_timer(&host->timer, jiffies + 10 * HZ);
 871
 872         host->cmd = cmd;
 873
 874         sdhci_prepare_data(host, cmd->data);
 875
 876         sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
 877
 878         sdhci_set_transfer_mode(host, cmd->data);
 879
 880         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 881                 printk(KERN_ERR "%s: Unsupported response type!\n",
 882                         mmc_hostname(host->mmc));
 883                 cmd->error = -EINVAL;
 884                 tasklet_schedule(&host->finish_tasklet);
 885                 return;
 886         }
 887
 888         if (!(cmd->flags & MMC_RSP_PRESENT))
 889                 flags = SDHCI_CMD_RESP_NONE;
 890         else if (cmd->flags & MMC_RSP_136)
 891                 flags = SDHCI_CMD_RESP_LONG;
 892         else if (cmd->flags & MMC_RSP_BUSY)
 893                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 894         else
 895                 flags = SDHCI_CMD_RESP_SHORT;
 896
 897         if (cmd->flags & MMC_RSP_CRC)
 898                 flags |= SDHCI_CMD_CRC;
 899         if (cmd->flags & MMC_RSP_OPCODE)
 900                 flags |= SDHCI_CMD_INDEX;
 901         if (cmd->data)
 902                 flags |= SDHCI_CMD_DATA;
 903
 904         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
 905 }
 906
 907 static void sdhci_finish_command(struct sdhci_host *host)
 908 {
 909         int i;
 910
 911         BUG_ON(host->cmd == NULL);
 912
 913         if (host->cmd->flags & MMC_RSP_PRESENT) {
 914                 if (host->cmd->flags & MMC_RSP_136) {
 915                         /* CRC is stripped so we need to do some shifting. */
 916                         for (i = 0;i < 4;i++) {
 917                                 host->cmd->resp[i] = sdhci_readl(host,
 918                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 919                                 if (i != 3)
 920                                         host->cmd->resp[i] |=
 921                                                 sdhci_readb(host,
 922                                                 SDHCI_RESPONSE + (3-i)*4-1);
 923                         }
 924                 } else {
 925                         host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
 926                 }
 927         }
 928
 929         host->cmd->error = 0;
 930
 931         if (host->data && host->data_early)
 932                 sdhci_finish_data(host);
 933
 934         if (!host->cmd->data)
 935                 tasklet_schedule(&host->finish_tasklet);
 936
 937         host->cmd = NULL;
 938 }
 939
 940 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 941 {
 942         int div;
 943         u16 clk;
 944         unsigned long timeout;
 945
 946         if (clock == host->clock)
 947                 return;
 948
 949         sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 950
 951         if (clock == 0)
 952                 goto out;
 953
 954         for (div = 1;div < 256;div *= 2) {
 955                 if ((host->max_clk / div) <= clock)
 956                         break;
 957         }
 958         div >>= 1;
 959
 960         clk = div << SDHCI_DIVIDER_SHIFT;
 961         clk |= SDHCI_CLOCK_INT_EN;
 962         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 963
 964         /* Wait max 10 ms */
 965         timeout = 10;
 966         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 967                 & SDHCI_CLOCK_INT_STABLE)) {
 968                 if (timeout == 0) {
 969                         printk(KERN_ERR "%s: Internal clock never "
 970                                 "stabilised.\n", mmc_hostname(host->mmc));
 971                         sdhci_dumpregs(host);
 972                         return;
 973                 }
 974                 timeout--;
 975                 mdelay(1);
 976         }
 977
 978         clk |= SDHCI_CLOCK_CARD_EN;
 979         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 980
 981 out:
 982         host->clock = clock;
 983 }
 984
 985 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 986 {
 987         u8 pwr;
 988
 989         if (host->power == power)
 990                 return;
 991
 992         if (power == (unsigned short)-1) {
 993                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
 994                 goto out;
 995         }
 996
 997         /*
 998          * Spec says that we should clear the power reg before setting
 999          * a new value. Some controllers don't seem to like this though.
1000          */
1001         if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1002                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1003
1004         pwr = SDHCI_POWER_ON;
1005
1006         switch (1 << power) {
1007         case MMC_VDD_165_195:
1008                 pwr |= SDHCI_POWER_180;
1009                 break;
1010         case MMC_VDD_29_30:
1011         case MMC_VDD_30_31:
1012                 pwr |= SDHCI_POWER_300;
1013                 break;
1014         case MMC_VDD_32_33:
1015         case MMC_VDD_33_34:
1016                 pwr |= SDHCI_POWER_330;
1017                 break;
1018         default:
1019                 BUG();
1020         }
1021
1022         /*
1023          * At least the Marvell CaFe chip gets confused if we set the voltage
1024          * and set turn on power at the same time, so set the voltage first.
1025          */
1026         if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
1027                 sdhci_writeb(host, pwr & ~SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1028
1029         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1030
1031 out:
1032         host->power = power;
1033 }
1034
1035 /*****************************************************************************\
1036  *                                                                           *
1037  * MMC callbacks                                                             *
1038  *                                                                           *
1039 \*****************************************************************************/
1040
1041 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1042 {
1043         struct sdhci_host *host;
1044         unsigned long flags;
1045
1046         host = mmc_priv(mmc);
1047
1048         spin_lock_irqsave(&host->lock, flags);
1049
1050         WARN_ON(host->mrq != NULL);
1051
1052 #ifndef SDHCI_USE_LEDS_CLASS
1053         sdhci_activate_led(host);
1054 #endif
1055
1056         host->mrq = mrq;
1057
1058         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)
1059                 || (host->flags & SDHCI_DEVICE_DEAD)) {
1060                 host->mrq->cmd->error = -ENOMEDIUM;
1061                 tasklet_schedule(&host->finish_tasklet);
1062         } else
1063                 sdhci_send_command(host, mrq->cmd);
1064
1065         mmiowb();
1066         spin_unlock_irqrestore(&host->lock, flags);
1067 }
1068
1069 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1070 {
1071         struct sdhci_host *host;
1072         unsigned long flags;
1073         u8 ctrl;
1074
1075         host = mmc_priv(mmc);
1076
1077         spin_lock_irqsave(&host->lock, flags);
1078
1079         if (host->flags & SDHCI_DEVICE_DEAD)
1080                 goto out;
1081
1082         /*
1083          * Reset the chip on each power off.
1084          * Should clear out any weird states.
1085          */
1086         if (ios->power_mode == MMC_POWER_OFF) {
1087                 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1088                 sdhci_reinit(host);
1089         }
1090
1091         sdhci_set_clock(host, ios->clock);
1092
1093         if (ios->power_mode == MMC_POWER_OFF)
1094                 sdhci_set_power(host, -1);
1095         else
1096                 sdhci_set_power(host, ios->vdd);
1097
1098         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1099
1100         if (ios->bus_width == MMC_BUS_WIDTH_4)
1101                 ctrl |= SDHCI_CTRL_4BITBUS;
1102         else
1103                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1104
1105         if (ios->timing == MMC_TIMING_SD_HS)
1106                 ctrl |= SDHCI_CTRL_HISPD;
1107         else
1108                 ctrl &= ~SDHCI_CTRL_HISPD;
1109
1110         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1111
1112         /*
1113          * Some (ENE) controllers go apeshit on some ios operation,
1114          * signalling timeout and CRC errors even on CMD0. Resetting
1115          * it on each ios seems to solve the problem.
1116          */
1117         if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1118                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1119
1120 out:
1121         mmiowb();
1122         spin_unlock_irqrestore(&host->lock, flags);
1123 }
1124
1125 static int sdhci_get_ro(struct mmc_host *mmc)
1126 {
1127         struct sdhci_host *host;
1128         unsigned long flags;
1129         int present;
1130
1131         host = mmc_priv(mmc);
1132
1133         spin_lock_irqsave(&host->lock, flags);
1134
1135         if (host->flags & SDHCI_DEVICE_DEAD)
1136                 present = 0;
1137         else
1138                 present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1139
1140         spin_unlock_irqrestore(&host->lock, flags);
1141
1142         return !(present & SDHCI_WRITE_PROTECT);
1143 }
1144
1145 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1146 {
1147         struct sdhci_host *host;
1148         unsigned long flags;
1149
1150         host = mmc_priv(mmc);
1151
1152         spin_lock_irqsave(&host->lock, flags);
1153
1154         if (host->flags & SDHCI_DEVICE_DEAD)
1155                 goto out;
1156
1157         if (enable)
1158                 sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
1159         else
1160                 sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
1161 out:
1162         mmiowb();
1163
1164         spin_unlock_irqrestore(&host->lock, flags);
1165 }
1166
1167 static const struct mmc_host_ops sdhci_ops = {
1168         .request        = sdhci_request,
1169         .set_ios        = sdhci_set_ios,
1170         .get_ro         = sdhci_get_ro,
1171         .enable_sdio_irq = sdhci_enable_sdio_irq,
1172 };
1173
1174 /*****************************************************************************\
1175  *                                                                           *
1176  * Tasklets                                                                  *
1177  *                                                                           *
1178 \*****************************************************************************/
1179
1180 static void sdhci_tasklet_card(unsigned long param)
1181 {
1182         struct sdhci_host *host;
1183         unsigned long flags;
1184
1185         host = (struct sdhci_host*)param;
1186
1187         spin_lock_irqsave(&host->lock, flags);
1188
1189         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1190                 if (host->mrq) {
1191                         printk(KERN_ERR "%s: Card removed during transfer!\n",
1192                                 mmc_hostname(host->mmc));
1193                         printk(KERN_ERR "%s: Resetting controller.\n",
1194                                 mmc_hostname(host->mmc));
1195
1196                         sdhci_reset(host, SDHCI_RESET_CMD);
1197                         sdhci_reset(host, SDHCI_RESET_DATA);
1198
1199                         host->mrq->cmd->error = -ENOMEDIUM;
1200                         tasklet_schedule(&host->finish_tasklet);
1201                 }
1202         }
1203
1204         spin_unlock_irqrestore(&host->lock, flags);
1205
1206         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1207 }
1208
1209 static void sdhci_tasklet_finish(unsigned long param)
1210 {
1211         struct sdhci_host *host;
1212         unsigned long flags;
1213         struct mmc_request *mrq;
1214
1215         host = (struct sdhci_host*)param;
1216
1217         spin_lock_irqsave(&host->lock, flags);
1218
1219         del_timer(&host->timer);
1220
1221         mrq = host->mrq;
1222
1223         /*
1224          * The controller needs a reset of internal state machines
1225          * upon error conditions.
1226          */
1227         if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1228                 (mrq->cmd->error ||
1229                  (mrq->data && (mrq->data->error ||
1230                   (mrq->data->stop && mrq->data->stop->error))) ||
1231                    (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1232
1233                 /* Some controllers need this kick or reset won't work here */
1234                 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1235                         unsigned int clock;
1236
1237                         /* This is to force an update */
1238                         clock = host->clock;
1239                         host->clock = 0;
1240                         sdhci_set_clock(host, clock);
1241                 }
1242
1243                 /* Spec says we should do both at the same time, but Ricoh
1244                    controllers do not like that. */
1245                 sdhci_reset(host, SDHCI_RESET_CMD);
1246                 sdhci_reset(host, SDHCI_RESET_DATA);
1247         }
1248
1249         host->mrq = NULL;
1250         host->cmd = NULL;
1251         host->data = NULL;
1252
1253 #ifndef SDHCI_USE_LEDS_CLASS
1254         sdhci_deactivate_led(host);
1255 #endif
1256
1257         mmiowb();
1258         spin_unlock_irqrestore(&host->lock, flags);
1259
1260         mmc_request_done(host->mmc, mrq);
1261 }
1262
1263 static void sdhci_timeout_timer(unsigned long data)
1264 {
1265         struct sdhci_host *host;
1266         unsigned long flags;
1267
1268         host = (struct sdhci_host*)data;
1269
1270         spin_lock_irqsave(&host->lock, flags);
1271
1272         if (host->mrq) {
1273                 printk(KERN_ERR "%s: Timeout waiting for hardware "
1274                         "interrupt.\n", mmc_hostname(host->mmc));
1275                 sdhci_dumpregs(host);
1276
1277                 if (host->data) {
1278                         host->data->error = -ETIMEDOUT;
1279                         sdhci_finish_data(host);
1280                 } else {
1281                         if (host->cmd)
1282                                 host->cmd->error = -ETIMEDOUT;
1283                         else
1284                                 host->mrq->cmd->error = -ETIMEDOUT;
1285
1286                         tasklet_schedule(&host->finish_tasklet);
1287                 }
1288         }
1289
1290         mmiowb();
1291         spin_unlock_irqrestore(&host->lock, flags);
1292 }
1293
1294 /*****************************************************************************\
1295  *                                                                           *
1296  * Interrupt handling                                                        *
1297  *                                                                           *
1298 \*****************************************************************************/
1299
1300 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
1301 {
1302         BUG_ON(intmask == 0);
1303
1304         if (!host->cmd) {
1305                 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
1306                         "though no command operation was in progress.\n",
1307                         mmc_hostname(host->mmc), (unsigned)intmask);
1308                 sdhci_dumpregs(host);
1309                 return;
1310         }
1311
1312         if (intmask & SDHCI_INT_TIMEOUT)
1313                 host->cmd->error = -ETIMEDOUT;
1314         else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1315                         SDHCI_INT_INDEX))
1316                 host->cmd->error = -EILSEQ;
1317
1318         if (host->cmd->error) {
1319                 tasklet_schedule(&host->finish_tasklet);
1320                 return;
1321         }
1322
1323         /*
1324          * The host can send and interrupt when the busy state has
1325          * ended, allowing us to wait without wasting CPU cycles.
1326          * Unfortunately this is overloaded on the "data complete"
1327          * interrupt, so we need to take some care when handling
1328          * it.
1329          *
1330          * Note: The 1.0 specification is a bit ambiguous about this
1331          *       feature so there might be some problems with older
1332          *       controllers.
1333          */
1334         if (host->cmd->flags & MMC_RSP_BUSY) {
1335                 if (host->cmd->data)
1336                         DBG("Cannot wait for busy signal when also "
1337                                 "doing a data transfer");
1338                 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1339                         return;
1340
1341                 /* The controller does not support the end-of-busy IRQ,
1342                  * fall through and take the SDHCI_INT_RESPONSE */
1343         }
1344
1345         if (intmask & SDHCI_INT_RESPONSE)
1346                 sdhci_finish_command(host);
1347 }
1348
1349 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
1350 {
1351         BUG_ON(intmask == 0);
1352
1353         if (!host->data) {
1354                 /*
1355                  * The "data complete" interrupt is also used to
1356                  * indicate that a busy state has ended. See comment
1357                  * above in sdhci_cmd_irq().
1358                  */
1359                 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1360                         if (intmask & SDHCI_INT_DATA_END) {
1361                                 sdhci_finish_command(host);
1362                                 return;
1363                         }
1364                 }
1365
1366                 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
1367                         "though no data operation was in progress.\n",
1368                         mmc_hostname(host->mmc), (unsigned)intmask);
1369                 sdhci_dumpregs(host);
1370
1371                 return;
1372         }
1373
1374         if (intmask & SDHCI_INT_DATA_TIMEOUT)
1375                 host->data->error = -ETIMEDOUT;
1376         else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
1377                 host->data->error = -EILSEQ;
1378         else if (intmask & SDHCI_INT_ADMA_ERROR)
1379                 host->data->error = -EIO;
1380
1381         if (host->data->error)
1382                 sdhci_finish_data(host);
1383         else {
1384                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1385                         sdhci_transfer_pio(host);
1386
1387                 /*
1388                  * We currently don't do anything fancy with DMA
1389                  * boundaries, but as we can't disable the feature
1390                  * we need to at least restart the transfer.
1391                  */
1392                 if (intmask & SDHCI_INT_DMA_END)
1393                         sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
1394                                 SDHCI_DMA_ADDRESS);
1395
1396                 if (intmask & SDHCI_INT_DATA_END) {
1397                         if (host->cmd) {
1398                                 /*
1399                                  * Data managed to finish before the
1400                                  * command completed. Make sure we do
1401                                  * things in the proper order.
1402                                  */
1403                                 host->data_early = 1;
1404                         } else {
1405                                 sdhci_finish_data(host);
1406                         }
1407                 }
1408         }
1409 }
1410
1411 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1412 {
1413         irqreturn_t result;
1414         struct sdhci_host* host = dev_id;
1415         u32 intmask;
1416         int cardint = 0;
1417
1418         spin_lock(&host->lock);
1419
1420         intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1421
1422         if (!intmask || intmask == 0xffffffff) {
1423                 result = IRQ_NONE;
1424                 goto out;
1425         }
1426
1427         DBG("*** %s got interrupt: 0x%08x\n",
1428                 mmc_hostname(host->mmc), intmask);
1429
1430         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1431                 sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
1432                         SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1433                 tasklet_schedule(&host->card_tasklet);
1434         }
1435
1436         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1437
1438         if (intmask & SDHCI_INT_CMD_MASK) {
1439                 sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
1440                         SDHCI_INT_STATUS);
1441                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1442         }
1443
1444         if (intmask & SDHCI_INT_DATA_MASK) {
1445                 sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
1446                         SDHCI_INT_STATUS);
1447                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1448         }
1449
1450         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1451
1452         intmask &= ~SDHCI_INT_ERROR;
1453
1454         if (intmask & SDHCI_INT_BUS_POWER) {
1455                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1456                         mmc_hostname(host->mmc));
1457                 sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1458         }
1459
1460         intmask &= ~SDHCI_INT_BUS_POWER;
1461
1462         if (intmask & SDHCI_INT_CARD_INT)
1463                 cardint = 1;
1464
1465         intmask &= ~SDHCI_INT_CARD_INT;
1466
1467         if (intmask) {
1468                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1469                         mmc_hostname(host->mmc), intmask);
1470                 sdhci_dumpregs(host);
1471
1472                 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1473         }
1474
1475         result = IRQ_HANDLED;
1476
1477         mmiowb();
1478 out:
1479         spin_unlock(&host->lock);
1480
1481         /*
1482          * We have to delay this as it calls back into the driver.
1483          */
1484         if (cardint)
1485                 mmc_signal_sdio_irq(host->mmc);
1486
1487         return result;
1488 }
1489
1490 /*****************************************************************************\
1491  *                                                                           *
1492  * Suspend/resume                                                            *
1493  *                                                                           *
1494 \*****************************************************************************/
1495
1496 #ifdef CONFIG_PM
1497
1498 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1499 {
1500         int ret;
1501
1502         sdhci_disable_card_detection(host);
1503
1504         ret = mmc_suspend_host(host->mmc, state);
1505         if (ret)
1506                 return ret;
1507
1508         free_irq(host->irq, host);
1509
1510         return 0;
1511 }
1512
1513 EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1514
1515 int sdhci_resume_host(struct sdhci_host *host)
1516 {
1517         int ret;
1518
1519         if (host->flags & SDHCI_USE_DMA) {
1520                 if (host->ops->enable_dma)
1521                         host->ops->enable_dma(host);
1522         }
1523
1524         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1525                           mmc_hostname(host->mmc), host);
1526         if (ret)
1527                 return ret;
1528
1529         sdhci_init(host);
1530         mmiowb();
1531
1532         ret = mmc_resume_host(host->mmc);
1533         if (ret)
1534                 return ret;
1535
1536         sdhci_enable_card_detection(host);
1537
1538         return 0;
1539 }
1540
1541 EXPORT_SYMBOL_GPL(sdhci_resume_host);
1542
1543 #endif /* CONFIG_PM */
1544
1545 /*****************************************************************************\
1546  *                                                                           *
1547  * Device allocation/registration                                            *
1548  *                                                                           *
1549 \*****************************************************************************/
1550
1551 struct sdhci_host *sdhci_alloc_host(struct device *dev,
1552         size_t priv_size)
1553 {
1554         struct mmc_host *mmc;
1555         struct sdhci_host *host;
1556
1557         WARN_ON(dev == NULL);
1558
1559         mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1560         if (!mmc)
1561                 return ERR_PTR(-ENOMEM);
1562
1563         host = mmc_priv(mmc);
1564         host->mmc = mmc;
1565
1566         return host;
1567 }
1568
1569 EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1570
1571 int sdhci_add_host(struct sdhci_host *host)
1572 {
1573         struct mmc_host *mmc;
1574         unsigned int caps;
1575         int ret;
1576
1577         WARN_ON(host == NULL);
1578         if (host == NULL)
1579                 return -EINVAL;
1580
1581         mmc = host->mmc;
1582
1583         if (debug_quirks)
1584                 host->quirks = debug_quirks;
1585
1586         sdhci_reset(host, SDHCI_RESET_ALL);
1587
1588         host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1589         host->version = (host->version & SDHCI_SPEC_VER_MASK)
1590                                 >> SDHCI_SPEC_VER_SHIFT;
1591         if (host->version > SDHCI_SPEC_200) {
1592                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1593                         "You may experience problems.\n", mmc_hostname(mmc),
1594                         host->version);
1595         }
1596
1597         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1598
1599         if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1600                 host->flags |= SDHCI_USE_DMA;
1601         else if (!(caps & SDHCI_CAN_DO_DMA))
1602                 DBG("Controller doesn't have DMA capability\n");
1603         else
1604                 host->flags |= SDHCI_USE_DMA;
1605
1606         if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1607                 (host->flags & SDHCI_USE_DMA)) {
1608                 DBG("Disabling DMA as it is marked broken\n");
1609                 host->flags &= ~SDHCI_USE_DMA;
1610         }
1611
1612         if (host->flags & SDHCI_USE_DMA) {
1613                 if ((host->version >= SDHCI_SPEC_200) &&
1614                                 (caps & SDHCI_CAN_DO_ADMA2))
1615                         host->flags |= SDHCI_USE_ADMA;
1616         }
1617
1618         if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
1619                 (host->flags & SDHCI_USE_ADMA)) {
1620                 DBG("Disabling ADMA as it is marked broken\n");
1621                 host->flags &= ~SDHCI_USE_ADMA;
1622         }
1623
1624         if (host->flags & SDHCI_USE_DMA) {
1625                 if (host->ops->enable_dma) {
1626                         if (host->ops->enable_dma(host)) {
1627                                 printk(KERN_WARNING "%s: No suitable DMA "
1628                                         "available. Falling back to PIO.\n",
1629                                         mmc_hostname(mmc));
1630                                 host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1631                         }
1632                 }
1633         }
1634
1635         if (host->flags & SDHCI_USE_ADMA) {
1636                 /*
1637                  * We need to allocate descriptors for all sg entries
1638                  * (128) and potentially one alignment transfer for
1639                  * each of those entries.
1640                  */
1641                 host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
1642                 host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
1643                 if (!host->adma_desc || !host->align_buffer) {
1644                         kfree(host->adma_desc);
1645                         kfree(host->align_buffer);
1646                         printk(KERN_WARNING "%s: Unable to allocate ADMA "
1647                                 "buffers. Falling back to standard DMA.\n",
1648                                 mmc_hostname(mmc));
1649                         host->flags &= ~SDHCI_USE_ADMA;
1650                 }
1651         }
1652
1653         /*
1654          * If we use DMA, then it's up to the caller to set the DMA
1655          * mask, but PIO does not need the hw shim so we set a new
1656          * mask here in that case.
1657          */
1658         if (!(host->flags & SDHCI_USE_DMA)) {
1659                 host->dma_mask = DMA_BIT_MASK(64);
1660                 mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
1661         }
1662
1663         host->max_clk =
1664                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1665         if (host->max_clk == 0) {
1666                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1667                         "frequency.\n", mmc_hostname(mmc));
1668                 return -ENODEV;
1669         }
1670         host->max_clk *= 1000000;
1671
1672         host->timeout_clk =
1673                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1674         if (host->timeout_clk == 0) {
1675                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1676                         "frequency.\n", mmc_hostname(mmc));
1677                 return -ENODEV;
1678         }
1679         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1680                 host->timeout_clk *= 1000;
1681
1682         /*
1683          * Set host parameters.
1684          */
1685         mmc->ops = &sdhci_ops;
1686         mmc->f_min = host->max_clk / 256;
1687         mmc->f_max = host->max_clk;
1688         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1689
1690         if (caps & SDHCI_CAN_DO_HISPD)
1691                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1692
1693         mmc->ocr_avail = 0;
1694         if (caps & SDHCI_CAN_VDD_330)
1695                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1696         if (caps & SDHCI_CAN_VDD_300)
1697                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1698         if (caps & SDHCI_CAN_VDD_180)
1699                 mmc->ocr_avail |= MMC_VDD_165_195;
1700
1701         if (mmc->ocr_avail == 0) {
1702                 printk(KERN_ERR "%s: Hardware doesn't report any "
1703                         "support voltages.\n", mmc_hostname(mmc));
1704                 return -ENODEV;
1705         }
1706
1707         spin_lock_init(&host->lock);
1708
1709         /*
1710          * Maximum number of segments. Depends on if the hardware
1711          * can do scatter/gather or not.
1712          */
1713         if (host->flags & SDHCI_USE_ADMA)
1714                 mmc->max_hw_segs = 128;
1715         else if (host->flags & SDHCI_USE_DMA)
1716                 mmc->max_hw_segs = 1;
1717         else /* PIO */
1718                 mmc->max_hw_segs = 128;
1719         mmc->max_phys_segs = 128;
1720
1721         /*
1722          * Maximum number of sectors in one transfer. Limited by DMA boundary
1723          * size (512KiB).
1724          */
1725         mmc->max_req_size = 524288;
1726
1727         /*
1728          * Maximum segment size. Could be one segment with the maximum number
1729          * of bytes. When doing hardware scatter/gather, each entry cannot
1730          * be larger than 64 KiB though.
1731          */
1732         if (host->flags & SDHCI_USE_ADMA)
1733                 mmc->max_seg_size = 65536;
1734         else
1735                 mmc->max_seg_size = mmc->max_req_size;
1736
1737         /*
1738          * Maximum block size. This varies from controller to controller and
1739          * is specified in the capabilities register.
1740          */
1741         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1742         if (mmc->max_blk_size >= 3) {
1743                 printk(KERN_WARNING "%s: Invalid maximum block size, "
1744                         "assuming 512 bytes\n", mmc_hostname(mmc));
1745                 mmc->max_blk_size = 512;
1746         } else
1747                 mmc->max_blk_size = 512 << mmc->max_blk_size;
1748
1749         /*
1750          * Maximum block count.
1751          */
1752         mmc->max_blk_count = 65535;
1753
1754         /*
1755          * Init tasklets.
1756          */
1757         tasklet_init(&host->card_tasklet,
1758                 sdhci_tasklet_card, (unsigned long)host);
1759         tasklet_init(&host->finish_tasklet,
1760                 sdhci_tasklet_finish, (unsigned long)host);
1761
1762         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1763
1764         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1765                 mmc_hostname(mmc), host);
1766         if (ret)
1767                 goto untasklet;
1768
1769         sdhci_init(host);
1770
1771 #ifdef CONFIG_MMC_DEBUG
1772         sdhci_dumpregs(host);
1773 #endif
1774
1775 #ifdef SDHCI_USE_LEDS_CLASS
1776         snprintf(host->led_name, sizeof(host->led_name),
1777                 "%s::", mmc_hostname(mmc));
1778         host->led.name = host->led_name;
1779         host->led.brightness = LED_OFF;
1780         host->led.default_trigger = mmc_hostname(mmc);
1781         host->led.brightness_set = sdhci_led_control;
1782
1783         ret = led_classdev_register(mmc_dev(mmc), &host->led);
1784         if (ret)
1785                 goto reset;
1786 #endif
1787
1788         mmiowb();
1789
1790         mmc_add_host(mmc);
1791
1792         printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1793                 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1794                 (host->flags & SDHCI_USE_ADMA)?"A":"",
1795                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1796
1797         sdhci_enable_card_detection(host);
1798
1799         return 0;
1800
1801 #ifdef SDHCI_USE_LEDS_CLASS
1802 reset:
1803         sdhci_reset(host, SDHCI_RESET_ALL);
1804         free_irq(host->irq, host);
1805 #endif
1806 untasklet:
1807         tasklet_kill(&host->card_tasklet);
1808         tasklet_kill(&host->finish_tasklet);
1809
1810         return ret;
1811 }
1812
1813 EXPORT_SYMBOL_GPL(sdhci_add_host);
1814
1815 void sdhci_remove_host(struct sdhci_host *host, int dead)
1816 {
1817         unsigned long flags;
1818
1819         if (dead) {
1820                 spin_lock_irqsave(&host->lock, flags);
1821
1822                 host->flags |= SDHCI_DEVICE_DEAD;
1823
1824                 if (host->mrq) {
1825                         printk(KERN_ERR "%s: Controller removed during "
1826                                 " transfer!\n", mmc_hostname(host->mmc));
1827
1828                         host->mrq->cmd->error = -ENOMEDIUM;
1829                         tasklet_schedule(&host->finish_tasklet);
1830                 }
1831
1832                 spin_unlock_irqrestore(&host->lock, flags);
1833         }
1834
1835         sdhci_disable_card_detection(host);
1836
1837         mmc_remove_host(host->mmc);
1838
1839 #ifdef SDHCI_USE_LEDS_CLASS
1840         led_classdev_unregister(&host->led);
1841 #endif
1842
1843         if (!dead)
1844                 sdhci_reset(host, SDHCI_RESET_ALL);
1845
1846         free_irq(host->irq, host);
1847
1848         del_timer_sync(&host->timer);
1849
1850         tasklet_kill(&host->card_tasklet);
1851         tasklet_kill(&host->finish_tasklet);
1852
1853         kfree(host->adma_desc);
1854         kfree(host->align_buffer);
1855
1856         host->adma_desc = NULL;
1857         host->align_buffer = NULL;
1858 }
1859
1860 EXPORT_SYMBOL_GPL(sdhci_remove_host);
1861
1862 void sdhci_free_host(struct sdhci_host *host)
1863 {
1864         mmc_free_host(host->mmc);
1865 }
1866
1867 EXPORT_SYMBOL_GPL(sdhci_free_host);
1868
1869 /*****************************************************************************\
1870  *                                                                           *
1871  * Driver init/exit                                                          *
1872  *                                                                           *
1873 \*****************************************************************************/
1874
1875 static int __init sdhci_drv_init(void)
1876 {
1877         printk(KERN_INFO DRIVER_NAME
1878                 ": Secure Digital Host Controller Interface driver\n");
1879         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1880
1881         return 0;
1882 }
1883
1884 static void __exit sdhci_drv_exit(void)
1885 {
1886 }
1887
1888 module_init(sdhci_drv_init);
1889 module_exit(sdhci_drv_exit);
1890
1891 module_param(debug_quirks, uint, 0444);
1892
1893 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1894 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1895 MODULE_LICENSE("GPL");
1896
1897 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");