2 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
11 * Thanks to the following companies for their support:
13 * - JMicron (hardware and technical support)
16 #include <linux/delay.h>
17 #include <linux/highmem.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/scatterlist.h>
22 #include <linux/leds.h>
24 #include <linux/mmc/host.h>
28 #define DRIVER_NAME "sdhci"
30 #define DBG(f, x...) \
31 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
33 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
34 defined(CONFIG_MMC_SDHCI_MODULE))
35 #define SDHCI_USE_LEDS_CLASS
38 static unsigned int debug_quirks = 0;
40 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
41 static void sdhci_finish_data(struct sdhci_host *);
43 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
44 static void sdhci_finish_command(struct sdhci_host *);
46 static void sdhci_dumpregs(struct sdhci_host *host)
48 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
50 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
51 sdhci_readl(host, SDHCI_DMA_ADDRESS),
52 sdhci_readw(host, SDHCI_HOST_VERSION));
53 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
54 sdhci_readw(host, SDHCI_BLOCK_SIZE),
55 sdhci_readw(host, SDHCI_BLOCK_COUNT));
56 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
57 sdhci_readl(host, SDHCI_ARGUMENT),
58 sdhci_readw(host, SDHCI_TRANSFER_MODE));
59 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
60 sdhci_readl(host, SDHCI_PRESENT_STATE),
61 sdhci_readb(host, SDHCI_HOST_CONTROL));
62 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
63 sdhci_readb(host, SDHCI_POWER_CONTROL),
64 sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
65 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
66 sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
67 sdhci_readw(host, SDHCI_CLOCK_CONTROL));
68 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
69 sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
70 sdhci_readl(host, SDHCI_INT_STATUS));
71 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
72 sdhci_readl(host, SDHCI_INT_ENABLE),
73 sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
74 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
75 sdhci_readw(host, SDHCI_ACMD12_ERR),
76 sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
77 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
78 sdhci_readl(host, SDHCI_CAPABILITIES),
79 sdhci_readl(host, SDHCI_MAX_CURRENT));
81 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
84 /*****************************************************************************\
86 * Low level functions *
88 \*****************************************************************************/
90 static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
94 ier = sdhci_readl(host, SDHCI_INT_ENABLE);
97 sdhci_writel(host, ier, SDHCI_INT_ENABLE);
98 sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
101 static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
103 sdhci_clear_set_irqs(host, 0, irqs);
106 static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
108 sdhci_clear_set_irqs(host, irqs, 0);
111 static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
113 u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;
115 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
119 sdhci_unmask_irqs(host, irqs);
121 sdhci_mask_irqs(host, irqs);
124 static void sdhci_enable_card_detection(struct sdhci_host *host)
126 sdhci_set_card_detection(host, true);
129 static void sdhci_disable_card_detection(struct sdhci_host *host)
131 sdhci_set_card_detection(host, false);
134 static void sdhci_reset(struct sdhci_host *host, u8 mask)
136 unsigned long timeout;
138 if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
139 if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
144 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
146 if (mask & SDHCI_RESET_ALL)
149 /* Wait max 100 ms */
152 /* hw clears the bit when it's done */
153 while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
155 printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
156 mmc_hostname(host->mmc), (int)mask);
157 sdhci_dumpregs(host);
165 static void sdhci_init(struct sdhci_host *host)
167 sdhci_reset(host, SDHCI_RESET_ALL);
169 sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
170 SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
171 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
172 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
173 SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
176 static void sdhci_reinit(struct sdhci_host *host)
179 sdhci_enable_card_detection(host);
182 static void sdhci_activate_led(struct sdhci_host *host)
186 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
187 ctrl |= SDHCI_CTRL_LED;
188 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
191 static void sdhci_deactivate_led(struct sdhci_host *host)
195 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
196 ctrl &= ~SDHCI_CTRL_LED;
197 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
200 #ifdef SDHCI_USE_LEDS_CLASS
201 static void sdhci_led_control(struct led_classdev *led,
202 enum led_brightness brightness)
204 struct sdhci_host *host = container_of(led, struct sdhci_host, led);
207 spin_lock_irqsave(&host->lock, flags);
209 if (brightness == LED_OFF)
210 sdhci_deactivate_led(host);
212 sdhci_activate_led(host);
214 spin_unlock_irqrestore(&host->lock, flags);
218 /*****************************************************************************\
222 \*****************************************************************************/
224 static void sdhci_read_block_pio(struct sdhci_host *host)
227 size_t blksize, len, chunk;
228 u32 uninitialized_var(scratch);
231 DBG("PIO reading\n");
233 blksize = host->data->blksz;
236 local_irq_save(flags);
239 if (!sg_miter_next(&host->sg_miter))
242 len = min(host->sg_miter.length, blksize);
245 host->sg_miter.consumed = len;
247 buf = host->sg_miter.addr;
251 scratch = sdhci_readl(host, SDHCI_BUFFER);
255 *buf = scratch & 0xFF;
264 sg_miter_stop(&host->sg_miter);
266 local_irq_restore(flags);
269 static void sdhci_write_block_pio(struct sdhci_host *host)
272 size_t blksize, len, chunk;
276 DBG("PIO writing\n");
278 blksize = host->data->blksz;
282 local_irq_save(flags);
285 if (!sg_miter_next(&host->sg_miter))
288 len = min(host->sg_miter.length, blksize);
291 host->sg_miter.consumed = len;
293 buf = host->sg_miter.addr;
296 scratch |= (u32)*buf << (chunk * 8);
302 if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
303 sdhci_writel(host, scratch, SDHCI_BUFFER);
310 sg_miter_stop(&host->sg_miter);
312 local_irq_restore(flags);
315 static void sdhci_transfer_pio(struct sdhci_host *host)
321 if (host->blocks == 0)
324 if (host->data->flags & MMC_DATA_READ)
325 mask = SDHCI_DATA_AVAILABLE;
327 mask = SDHCI_SPACE_AVAILABLE;
330 * Some controllers (JMicron JMB38x) mess up the buffer bits
331 * for transfers < 4 bytes. As long as it is just one block,
332 * we can ignore the bits.
334 if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
335 (host->data->blocks == 1))
338 while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
339 if (host->data->flags & MMC_DATA_READ)
340 sdhci_read_block_pio(host);
342 sdhci_write_block_pio(host);
345 if (host->blocks == 0)
349 DBG("PIO transfer complete.\n");
352 static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
354 local_irq_save(*flags);
355 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
358 static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
360 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
361 local_irq_restore(*flags);
364 static int sdhci_adma_table_pre(struct sdhci_host *host,
365 struct mmc_data *data)
372 dma_addr_t align_addr;
375 struct scatterlist *sg;
381 * The spec does not specify endianness of descriptor table.
382 * We currently guess that it is LE.
385 if (data->flags & MMC_DATA_READ)
386 direction = DMA_FROM_DEVICE;
388 direction = DMA_TO_DEVICE;
391 * The ADMA descriptor table is mapped further down as we
392 * need to fill it with data first.
395 host->align_addr = dma_map_single(mmc_dev(host->mmc),
396 host->align_buffer, 128 * 4, direction);
397 if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
399 BUG_ON(host->align_addr & 0x3);
401 host->sg_count = dma_map_sg(mmc_dev(host->mmc),
402 data->sg, data->sg_len, direction);
403 if (host->sg_count == 0)
406 desc = host->adma_desc;
407 align = host->align_buffer;
409 align_addr = host->align_addr;
411 for_each_sg(data->sg, sg, host->sg_count, i) {
412 addr = sg_dma_address(sg);
413 len = sg_dma_len(sg);
416 * The SDHCI specification states that ADMA
417 * addresses must be 32-bit aligned. If they
418 * aren't, then we use a bounce buffer for
419 * the (up to three) bytes that screw up the
422 offset = (4 - (addr & 0x3)) & 0x3;
424 if (data->flags & MMC_DATA_WRITE) {
425 buffer = sdhci_kmap_atomic(sg, &flags);
426 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
427 memcpy(align, buffer, offset);
428 sdhci_kunmap_atomic(buffer, &flags);
431 desc[7] = (align_addr >> 24) & 0xff;
432 desc[6] = (align_addr >> 16) & 0xff;
433 desc[5] = (align_addr >> 8) & 0xff;
434 desc[4] = (align_addr >> 0) & 0xff;
436 BUG_ON(offset > 65536);
438 desc[3] = (offset >> 8) & 0xff;
439 desc[2] = (offset >> 0) & 0xff;
442 desc[0] = 0x21; /* tran, valid */
453 desc[7] = (addr >> 24) & 0xff;
454 desc[6] = (addr >> 16) & 0xff;
455 desc[5] = (addr >> 8) & 0xff;
456 desc[4] = (addr >> 0) & 0xff;
460 desc[3] = (len >> 8) & 0xff;
461 desc[2] = (len >> 0) & 0xff;
464 desc[0] = 0x21; /* tran, valid */
469 * If this triggers then we have a calculation bug
472 WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
476 * Add a terminating entry.
487 desc[0] = 0x03; /* nop, end, valid */
490 * Resync align buffer as we might have changed it.
492 if (data->flags & MMC_DATA_WRITE) {
493 dma_sync_single_for_device(mmc_dev(host->mmc),
494 host->align_addr, 128 * 4, direction);
497 host->adma_addr = dma_map_single(mmc_dev(host->mmc),
498 host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
499 if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
501 BUG_ON(host->adma_addr & 0x3);
506 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
507 data->sg_len, direction);
509 dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
515 static void sdhci_adma_table_post(struct sdhci_host *host,
516 struct mmc_data *data)
520 struct scatterlist *sg;
526 if (data->flags & MMC_DATA_READ)
527 direction = DMA_FROM_DEVICE;
529 direction = DMA_TO_DEVICE;
531 dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
532 (128 * 2 + 1) * 4, DMA_TO_DEVICE);
534 dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
537 if (data->flags & MMC_DATA_READ) {
538 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
539 data->sg_len, direction);
541 align = host->align_buffer;
543 for_each_sg(data->sg, sg, host->sg_count, i) {
544 if (sg_dma_address(sg) & 0x3) {
545 size = 4 - (sg_dma_address(sg) & 0x3);
547 buffer = sdhci_kmap_atomic(sg, &flags);
548 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
549 memcpy(buffer, align, size);
550 sdhci_kunmap_atomic(buffer, &flags);
557 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
558 data->sg_len, direction);
561 static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
564 unsigned target_timeout, current_timeout;
567 * If the host controller provides us with an incorrect timeout
568 * value, just skip the check and use 0xE. The hardware may take
569 * longer to time out, but that's much better than having a too-short
572 if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
576 target_timeout = data->timeout_ns / 1000 +
577 data->timeout_clks / host->clock;
580 * Figure out needed cycles.
581 * We do this in steps in order to fit inside a 32 bit int.
582 * The first step is the minimum timeout, which will have a
583 * minimum resolution of 6 bits:
584 * (1) 2^13*1000 > 2^22,
585 * (2) host->timeout_clk < 2^16
590 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
591 while (current_timeout < target_timeout) {
593 current_timeout <<= 1;
599 printk(KERN_WARNING "%s: Too large timeout requested!\n",
600 mmc_hostname(host->mmc));
607 static void sdhci_set_transfer_irqs(struct sdhci_host *host)
609 u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
610 u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
612 if (host->flags & SDHCI_REQ_USE_DMA)
613 sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
615 sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
618 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
630 BUG_ON(data->blksz * data->blocks > 524288);
631 BUG_ON(data->blksz > host->mmc->max_blk_size);
632 BUG_ON(data->blocks > 65535);
635 host->data_early = 0;
637 count = sdhci_calc_timeout(host, data);
638 sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
640 if (host->flags & SDHCI_USE_DMA)
641 host->flags |= SDHCI_REQ_USE_DMA;
644 * FIXME: This doesn't account for merging when mapping the
647 if (host->flags & SDHCI_REQ_USE_DMA) {
649 struct scatterlist *sg;
652 if (host->flags & SDHCI_USE_ADMA) {
653 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
656 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
660 if (unlikely(broken)) {
661 for_each_sg(data->sg, sg, data->sg_len, i) {
662 if (sg->length & 0x3) {
663 DBG("Reverting to PIO because of "
664 "transfer size (%d)\n",
666 host->flags &= ~SDHCI_REQ_USE_DMA;
674 * The assumption here being that alignment is the same after
675 * translation to device address space.
677 if (host->flags & SDHCI_REQ_USE_DMA) {
679 struct scatterlist *sg;
682 if (host->flags & SDHCI_USE_ADMA) {
684 * As we use 3 byte chunks to work around
685 * alignment problems, we need to check this
688 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
691 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
695 if (unlikely(broken)) {
696 for_each_sg(data->sg, sg, data->sg_len, i) {
697 if (sg->offset & 0x3) {
698 DBG("Reverting to PIO because of "
700 host->flags &= ~SDHCI_REQ_USE_DMA;
707 if (host->flags & SDHCI_REQ_USE_DMA) {
708 if (host->flags & SDHCI_USE_ADMA) {
709 ret = sdhci_adma_table_pre(host, data);
712 * This only happens when someone fed
713 * us an invalid request.
716 host->flags &= ~SDHCI_REQ_USE_DMA;
718 sdhci_writel(host, host->adma_addr,
724 sg_cnt = dma_map_sg(mmc_dev(host->mmc),
725 data->sg, data->sg_len,
726 (data->flags & MMC_DATA_READ) ?
731 * This only happens when someone fed
732 * us an invalid request.
735 host->flags &= ~SDHCI_REQ_USE_DMA;
737 WARN_ON(sg_cnt != 1);
738 sdhci_writel(host, sg_dma_address(data->sg),
745 * Always adjust the DMA selection as some controllers
746 * (e.g. JMicron) can't do PIO properly when the selection
749 if (host->version >= SDHCI_SPEC_200) {
750 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
751 ctrl &= ~SDHCI_CTRL_DMA_MASK;
752 if ((host->flags & SDHCI_REQ_USE_DMA) &&
753 (host->flags & SDHCI_USE_ADMA))
754 ctrl |= SDHCI_CTRL_ADMA32;
756 ctrl |= SDHCI_CTRL_SDMA;
757 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
760 if (!(host->flags & SDHCI_REQ_USE_DMA)) {
761 sg_miter_start(&host->sg_miter,
762 data->sg, data->sg_len, SG_MITER_ATOMIC);
763 host->blocks = data->blocks;
766 sdhci_set_transfer_irqs(host);
768 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
769 sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
770 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
773 static void sdhci_set_transfer_mode(struct sdhci_host *host,
774 struct mmc_data *data)
781 WARN_ON(!host->data);
783 mode = SDHCI_TRNS_BLK_CNT_EN;
784 if (data->blocks > 1)
785 mode |= SDHCI_TRNS_MULTI;
786 if (data->flags & MMC_DATA_READ)
787 mode |= SDHCI_TRNS_READ;
788 if (host->flags & SDHCI_REQ_USE_DMA)
789 mode |= SDHCI_TRNS_DMA;
791 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
794 static void sdhci_finish_data(struct sdhci_host *host)
796 struct mmc_data *data;
803 if (host->flags & SDHCI_REQ_USE_DMA) {
804 if (host->flags & SDHCI_USE_ADMA)
805 sdhci_adma_table_post(host, data);
807 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
808 data->sg_len, (data->flags & MMC_DATA_READ) ?
809 DMA_FROM_DEVICE : DMA_TO_DEVICE);
814 * The specification states that the block count register must
815 * be updated, but it does not specify at what point in the
816 * data flow. That makes the register entirely useless to read
817 * back so we have to assume that nothing made it to the card
818 * in the event of an error.
821 data->bytes_xfered = 0;
823 data->bytes_xfered = data->blksz * data->blocks;
827 * The controller needs a reset of internal state machines
828 * upon error conditions.
831 sdhci_reset(host, SDHCI_RESET_CMD);
832 sdhci_reset(host, SDHCI_RESET_DATA);
835 sdhci_send_command(host, data->stop);
837 tasklet_schedule(&host->finish_tasklet);
840 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
844 unsigned long timeout;
851 mask = SDHCI_CMD_INHIBIT;
852 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
853 mask |= SDHCI_DATA_INHIBIT;
855 /* We shouldn't wait for data inihibit for stop commands, even
856 though they might use busy signaling */
857 if (host->mrq->data && (cmd == host->mrq->data->stop))
858 mask &= ~SDHCI_DATA_INHIBIT;
860 while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
862 printk(KERN_ERR "%s: Controller never released "
863 "inhibit bit(s).\n", mmc_hostname(host->mmc));
864 sdhci_dumpregs(host);
866 tasklet_schedule(&host->finish_tasklet);
873 mod_timer(&host->timer, jiffies + 10 * HZ);
877 sdhci_prepare_data(host, cmd->data);
879 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
881 sdhci_set_transfer_mode(host, cmd->data);
883 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
884 printk(KERN_ERR "%s: Unsupported response type!\n",
885 mmc_hostname(host->mmc));
886 cmd->error = -EINVAL;
887 tasklet_schedule(&host->finish_tasklet);
891 if (!(cmd->flags & MMC_RSP_PRESENT))
892 flags = SDHCI_CMD_RESP_NONE;
893 else if (cmd->flags & MMC_RSP_136)
894 flags = SDHCI_CMD_RESP_LONG;
895 else if (cmd->flags & MMC_RSP_BUSY)
896 flags = SDHCI_CMD_RESP_SHORT_BUSY;
898 flags = SDHCI_CMD_RESP_SHORT;
900 if (cmd->flags & MMC_RSP_CRC)
901 flags |= SDHCI_CMD_CRC;
902 if (cmd->flags & MMC_RSP_OPCODE)
903 flags |= SDHCI_CMD_INDEX;
905 flags |= SDHCI_CMD_DATA;
907 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
910 static void sdhci_finish_command(struct sdhci_host *host)
914 BUG_ON(host->cmd == NULL);
916 if (host->cmd->flags & MMC_RSP_PRESENT) {
917 if (host->cmd->flags & MMC_RSP_136) {
918 /* CRC is stripped so we need to do some shifting. */
919 for (i = 0;i < 4;i++) {
920 host->cmd->resp[i] = sdhci_readl(host,
921 SDHCI_RESPONSE + (3-i)*4) << 8;
923 host->cmd->resp[i] |=
925 SDHCI_RESPONSE + (3-i)*4-1);
928 host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
932 host->cmd->error = 0;
934 if (host->data && host->data_early)
935 sdhci_finish_data(host);
937 if (!host->cmd->data)
938 tasklet_schedule(&host->finish_tasklet);
943 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
947 unsigned long timeout;
949 if (clock == host->clock)
952 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
957 for (div = 1;div < 256;div *= 2) {
958 if ((host->max_clk / div) <= clock)
963 clk = div << SDHCI_DIVIDER_SHIFT;
964 clk |= SDHCI_CLOCK_INT_EN;
965 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
969 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
970 & SDHCI_CLOCK_INT_STABLE)) {
972 printk(KERN_ERR "%s: Internal clock never "
973 "stabilised.\n", mmc_hostname(host->mmc));
974 sdhci_dumpregs(host);
981 clk |= SDHCI_CLOCK_CARD_EN;
982 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
988 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
992 if (host->power == power)
995 if (power == (unsigned short)-1) {
996 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1001 * Spec says that we should clear the power reg before setting
1002 * a new value. Some controllers don't seem to like this though.
1004 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1005 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1007 pwr = SDHCI_POWER_ON;
1009 switch (1 << power) {
1010 case MMC_VDD_165_195:
1011 pwr |= SDHCI_POWER_180;
1015 pwr |= SDHCI_POWER_300;
1019 pwr |= SDHCI_POWER_330;
1026 * At least the Marvell CaFe chip gets confused if we set the voltage
1027 * and set turn on power at the same time, so set the voltage first.
1029 if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
1030 sdhci_writeb(host, pwr & ~SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1032 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1035 host->power = power;
1038 /*****************************************************************************\
1042 \*****************************************************************************/
1044 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1046 struct sdhci_host *host;
1048 unsigned long flags;
1050 host = mmc_priv(mmc);
1052 spin_lock_irqsave(&host->lock, flags);
1054 WARN_ON(host->mrq != NULL);
1056 #ifndef SDHCI_USE_LEDS_CLASS
1057 sdhci_activate_led(host);
1062 /* If polling, assume that the card is always present. */
1063 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1066 present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
1069 if (!present || host->flags & SDHCI_DEVICE_DEAD) {
1070 host->mrq->cmd->error = -ENOMEDIUM;
1071 tasklet_schedule(&host->finish_tasklet);
1073 sdhci_send_command(host, mrq->cmd);
1076 spin_unlock_irqrestore(&host->lock, flags);
1079 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1081 struct sdhci_host *host;
1082 unsigned long flags;
1085 host = mmc_priv(mmc);
1087 spin_lock_irqsave(&host->lock, flags);
1089 if (host->flags & SDHCI_DEVICE_DEAD)
1093 * Reset the chip on each power off.
1094 * Should clear out any weird states.
1096 if (ios->power_mode == MMC_POWER_OFF) {
1097 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1101 sdhci_set_clock(host, ios->clock);
1103 if (ios->power_mode == MMC_POWER_OFF)
1104 sdhci_set_power(host, -1);
1106 sdhci_set_power(host, ios->vdd);
1108 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1110 if (ios->bus_width == MMC_BUS_WIDTH_4)
1111 ctrl |= SDHCI_CTRL_4BITBUS;
1113 ctrl &= ~SDHCI_CTRL_4BITBUS;
1115 if (ios->timing == MMC_TIMING_SD_HS)
1116 ctrl |= SDHCI_CTRL_HISPD;
1118 ctrl &= ~SDHCI_CTRL_HISPD;
1120 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1123 * Some (ENE) controllers go apeshit on some ios operation,
1124 * signalling timeout and CRC errors even on CMD0. Resetting
1125 * it on each ios seems to solve the problem.
1127 if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1128 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1132 spin_unlock_irqrestore(&host->lock, flags);
1135 static int sdhci_get_ro(struct mmc_host *mmc)
1137 struct sdhci_host *host;
1138 unsigned long flags;
1141 host = mmc_priv(mmc);
1143 spin_lock_irqsave(&host->lock, flags);
1145 if (host->flags & SDHCI_DEVICE_DEAD)
1148 present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1150 spin_unlock_irqrestore(&host->lock, flags);
1152 return !(present & SDHCI_WRITE_PROTECT);
1155 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1157 struct sdhci_host *host;
1158 unsigned long flags;
1160 host = mmc_priv(mmc);
1162 spin_lock_irqsave(&host->lock, flags);
1164 if (host->flags & SDHCI_DEVICE_DEAD)
1168 sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
1170 sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
1174 spin_unlock_irqrestore(&host->lock, flags);
1177 static const struct mmc_host_ops sdhci_ops = {
1178 .request = sdhci_request,
1179 .set_ios = sdhci_set_ios,
1180 .get_ro = sdhci_get_ro,
1181 .enable_sdio_irq = sdhci_enable_sdio_irq,
1184 /*****************************************************************************\
1188 \*****************************************************************************/
1190 static void sdhci_tasklet_card(unsigned long param)
1192 struct sdhci_host *host;
1193 unsigned long flags;
1195 host = (struct sdhci_host*)param;
1197 spin_lock_irqsave(&host->lock, flags);
1199 if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1201 printk(KERN_ERR "%s: Card removed during transfer!\n",
1202 mmc_hostname(host->mmc));
1203 printk(KERN_ERR "%s: Resetting controller.\n",
1204 mmc_hostname(host->mmc));
1206 sdhci_reset(host, SDHCI_RESET_CMD);
1207 sdhci_reset(host, SDHCI_RESET_DATA);
1209 host->mrq->cmd->error = -ENOMEDIUM;
1210 tasklet_schedule(&host->finish_tasklet);
1214 spin_unlock_irqrestore(&host->lock, flags);
1216 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1219 static void sdhci_tasklet_finish(unsigned long param)
1221 struct sdhci_host *host;
1222 unsigned long flags;
1223 struct mmc_request *mrq;
1225 host = (struct sdhci_host*)param;
1227 spin_lock_irqsave(&host->lock, flags);
1229 del_timer(&host->timer);
1234 * The controller needs a reset of internal state machines
1235 * upon error conditions.
1237 if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1239 (mrq->data && (mrq->data->error ||
1240 (mrq->data->stop && mrq->data->stop->error))) ||
1241 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1243 /* Some controllers need this kick or reset won't work here */
1244 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1247 /* This is to force an update */
1248 clock = host->clock;
1250 sdhci_set_clock(host, clock);
1253 /* Spec says we should do both at the same time, but Ricoh
1254 controllers do not like that. */
1255 sdhci_reset(host, SDHCI_RESET_CMD);
1256 sdhci_reset(host, SDHCI_RESET_DATA);
1263 #ifndef SDHCI_USE_LEDS_CLASS
1264 sdhci_deactivate_led(host);
1268 spin_unlock_irqrestore(&host->lock, flags);
1270 mmc_request_done(host->mmc, mrq);
1273 static void sdhci_timeout_timer(unsigned long data)
1275 struct sdhci_host *host;
1276 unsigned long flags;
1278 host = (struct sdhci_host*)data;
1280 spin_lock_irqsave(&host->lock, flags);
1283 printk(KERN_ERR "%s: Timeout waiting for hardware "
1284 "interrupt.\n", mmc_hostname(host->mmc));
1285 sdhci_dumpregs(host);
1288 host->data->error = -ETIMEDOUT;
1289 sdhci_finish_data(host);
1292 host->cmd->error = -ETIMEDOUT;
1294 host->mrq->cmd->error = -ETIMEDOUT;
1296 tasklet_schedule(&host->finish_tasklet);
1301 spin_unlock_irqrestore(&host->lock, flags);
1304 /*****************************************************************************\
1306 * Interrupt handling *
1308 \*****************************************************************************/
1310 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
1312 BUG_ON(intmask == 0);
1315 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
1316 "though no command operation was in progress.\n",
1317 mmc_hostname(host->mmc), (unsigned)intmask);
1318 sdhci_dumpregs(host);
1322 if (intmask & SDHCI_INT_TIMEOUT)
1323 host->cmd->error = -ETIMEDOUT;
1324 else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1326 host->cmd->error = -EILSEQ;
1328 if (host->cmd->error) {
1329 tasklet_schedule(&host->finish_tasklet);
1334 * The host can send and interrupt when the busy state has
1335 * ended, allowing us to wait without wasting CPU cycles.
1336 * Unfortunately this is overloaded on the "data complete"
1337 * interrupt, so we need to take some care when handling
1340 * Note: The 1.0 specification is a bit ambiguous about this
1341 * feature so there might be some problems with older
1344 if (host->cmd->flags & MMC_RSP_BUSY) {
1345 if (host->cmd->data)
1346 DBG("Cannot wait for busy signal when also "
1347 "doing a data transfer");
1348 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1351 /* The controller does not support the end-of-busy IRQ,
1352 * fall through and take the SDHCI_INT_RESPONSE */
1355 if (intmask & SDHCI_INT_RESPONSE)
1356 sdhci_finish_command(host);
1359 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
1361 BUG_ON(intmask == 0);
1365 * The "data complete" interrupt is also used to
1366 * indicate that a busy state has ended. See comment
1367 * above in sdhci_cmd_irq().
1369 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1370 if (intmask & SDHCI_INT_DATA_END) {
1371 sdhci_finish_command(host);
1376 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
1377 "though no data operation was in progress.\n",
1378 mmc_hostname(host->mmc), (unsigned)intmask);
1379 sdhci_dumpregs(host);
1384 if (intmask & SDHCI_INT_DATA_TIMEOUT)
1385 host->data->error = -ETIMEDOUT;
1386 else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
1387 host->data->error = -EILSEQ;
1388 else if (intmask & SDHCI_INT_ADMA_ERROR)
1389 host->data->error = -EIO;
1391 if (host->data->error)
1392 sdhci_finish_data(host);
1394 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1395 sdhci_transfer_pio(host);
1398 * We currently don't do anything fancy with DMA
1399 * boundaries, but as we can't disable the feature
1400 * we need to at least restart the transfer.
1402 if (intmask & SDHCI_INT_DMA_END)
1403 sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
1406 if (intmask & SDHCI_INT_DATA_END) {
1409 * Data managed to finish before the
1410 * command completed. Make sure we do
1411 * things in the proper order.
1413 host->data_early = 1;
1415 sdhci_finish_data(host);
1421 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1424 struct sdhci_host* host = dev_id;
1428 spin_lock(&host->lock);
1430 intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1432 if (!intmask || intmask == 0xffffffff) {
1437 DBG("*** %s got interrupt: 0x%08x\n",
1438 mmc_hostname(host->mmc), intmask);
1440 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1441 sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
1442 SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1443 tasklet_schedule(&host->card_tasklet);
1446 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1448 if (intmask & SDHCI_INT_CMD_MASK) {
1449 sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
1451 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1454 if (intmask & SDHCI_INT_DATA_MASK) {
1455 sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
1457 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1460 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1462 intmask &= ~SDHCI_INT_ERROR;
1464 if (intmask & SDHCI_INT_BUS_POWER) {
1465 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1466 mmc_hostname(host->mmc));
1467 sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1470 intmask &= ~SDHCI_INT_BUS_POWER;
1472 if (intmask & SDHCI_INT_CARD_INT)
1475 intmask &= ~SDHCI_INT_CARD_INT;
1478 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1479 mmc_hostname(host->mmc), intmask);
1480 sdhci_dumpregs(host);
1482 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1485 result = IRQ_HANDLED;
1489 spin_unlock(&host->lock);
1492 * We have to delay this as it calls back into the driver.
1495 mmc_signal_sdio_irq(host->mmc);
1500 /*****************************************************************************\
1504 \*****************************************************************************/
1508 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1512 sdhci_disable_card_detection(host);
1514 ret = mmc_suspend_host(host->mmc, state);
1518 free_irq(host->irq, host);
1523 EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1525 int sdhci_resume_host(struct sdhci_host *host)
1529 if (host->flags & SDHCI_USE_DMA) {
1530 if (host->ops->enable_dma)
1531 host->ops->enable_dma(host);
1534 ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1535 mmc_hostname(host->mmc), host);
1542 ret = mmc_resume_host(host->mmc);
1546 sdhci_enable_card_detection(host);
1551 EXPORT_SYMBOL_GPL(sdhci_resume_host);
1553 #endif /* CONFIG_PM */
1555 /*****************************************************************************\
1557 * Device allocation/registration *
1559 \*****************************************************************************/
1561 struct sdhci_host *sdhci_alloc_host(struct device *dev,
1564 struct mmc_host *mmc;
1565 struct sdhci_host *host;
1567 WARN_ON(dev == NULL);
1569 mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1571 return ERR_PTR(-ENOMEM);
1573 host = mmc_priv(mmc);
1579 EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1581 int sdhci_add_host(struct sdhci_host *host)
1583 struct mmc_host *mmc;
1587 WARN_ON(host == NULL);
1594 host->quirks = debug_quirks;
1596 sdhci_reset(host, SDHCI_RESET_ALL);
1598 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1599 host->version = (host->version & SDHCI_SPEC_VER_MASK)
1600 >> SDHCI_SPEC_VER_SHIFT;
1601 if (host->version > SDHCI_SPEC_200) {
1602 printk(KERN_ERR "%s: Unknown controller version (%d). "
1603 "You may experience problems.\n", mmc_hostname(mmc),
1607 caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1609 if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1610 host->flags |= SDHCI_USE_DMA;
1611 else if (!(caps & SDHCI_CAN_DO_DMA))
1612 DBG("Controller doesn't have DMA capability\n");
1614 host->flags |= SDHCI_USE_DMA;
1616 if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1617 (host->flags & SDHCI_USE_DMA)) {
1618 DBG("Disabling DMA as it is marked broken\n");
1619 host->flags &= ~SDHCI_USE_DMA;
1622 if (host->flags & SDHCI_USE_DMA) {
1623 if ((host->version >= SDHCI_SPEC_200) &&
1624 (caps & SDHCI_CAN_DO_ADMA2))
1625 host->flags |= SDHCI_USE_ADMA;
1628 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
1629 (host->flags & SDHCI_USE_ADMA)) {
1630 DBG("Disabling ADMA as it is marked broken\n");
1631 host->flags &= ~SDHCI_USE_ADMA;
1634 if (host->flags & SDHCI_USE_DMA) {
1635 if (host->ops->enable_dma) {
1636 if (host->ops->enable_dma(host)) {
1637 printk(KERN_WARNING "%s: No suitable DMA "
1638 "available. Falling back to PIO.\n",
1640 host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1645 if (host->flags & SDHCI_USE_ADMA) {
1647 * We need to allocate descriptors for all sg entries
1648 * (128) and potentially one alignment transfer for
1649 * each of those entries.
1651 host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
1652 host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
1653 if (!host->adma_desc || !host->align_buffer) {
1654 kfree(host->adma_desc);
1655 kfree(host->align_buffer);
1656 printk(KERN_WARNING "%s: Unable to allocate ADMA "
1657 "buffers. Falling back to standard DMA.\n",
1659 host->flags &= ~SDHCI_USE_ADMA;
1664 * If we use DMA, then it's up to the caller to set the DMA
1665 * mask, but PIO does not need the hw shim so we set a new
1666 * mask here in that case.
1668 if (!(host->flags & SDHCI_USE_DMA)) {
1669 host->dma_mask = DMA_BIT_MASK(64);
1670 mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
1674 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1675 if (host->max_clk == 0) {
1676 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1677 "frequency.\n", mmc_hostname(mmc));
1680 host->max_clk *= 1000000;
1683 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1684 if (host->timeout_clk == 0) {
1685 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1686 "frequency.\n", mmc_hostname(mmc));
1689 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1690 host->timeout_clk *= 1000;
1693 * Set host parameters.
1695 mmc->ops = &sdhci_ops;
1696 mmc->f_min = host->max_clk / 256;
1697 mmc->f_max = host->max_clk;
1698 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1700 if (caps & SDHCI_CAN_DO_HISPD)
1701 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1703 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1704 mmc->caps |= MMC_CAP_NEEDS_POLL;
1707 if (caps & SDHCI_CAN_VDD_330)
1708 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1709 if (caps & SDHCI_CAN_VDD_300)
1710 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1711 if (caps & SDHCI_CAN_VDD_180)
1712 mmc->ocr_avail |= MMC_VDD_165_195;
1714 if (mmc->ocr_avail == 0) {
1715 printk(KERN_ERR "%s: Hardware doesn't report any "
1716 "support voltages.\n", mmc_hostname(mmc));
1720 spin_lock_init(&host->lock);
1723 * Maximum number of segments. Depends on if the hardware
1724 * can do scatter/gather or not.
1726 if (host->flags & SDHCI_USE_ADMA)
1727 mmc->max_hw_segs = 128;
1728 else if (host->flags & SDHCI_USE_DMA)
1729 mmc->max_hw_segs = 1;
1731 mmc->max_hw_segs = 128;
1732 mmc->max_phys_segs = 128;
1735 * Maximum number of sectors in one transfer. Limited by DMA boundary
1738 mmc->max_req_size = 524288;
1741 * Maximum segment size. Could be one segment with the maximum number
1742 * of bytes. When doing hardware scatter/gather, each entry cannot
1743 * be larger than 64 KiB though.
1745 if (host->flags & SDHCI_USE_ADMA)
1746 mmc->max_seg_size = 65536;
1748 mmc->max_seg_size = mmc->max_req_size;
1751 * Maximum block size. This varies from controller to controller and
1752 * is specified in the capabilities register.
1754 mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1755 if (mmc->max_blk_size >= 3) {
1756 printk(KERN_WARNING "%s: Invalid maximum block size, "
1757 "assuming 512 bytes\n", mmc_hostname(mmc));
1758 mmc->max_blk_size = 512;
1760 mmc->max_blk_size = 512 << mmc->max_blk_size;
1763 * Maximum block count.
1765 mmc->max_blk_count = 65535;
1770 tasklet_init(&host->card_tasklet,
1771 sdhci_tasklet_card, (unsigned long)host);
1772 tasklet_init(&host->finish_tasklet,
1773 sdhci_tasklet_finish, (unsigned long)host);
1775 setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1777 ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1778 mmc_hostname(mmc), host);
1784 #ifdef CONFIG_MMC_DEBUG
1785 sdhci_dumpregs(host);
1788 #ifdef SDHCI_USE_LEDS_CLASS
1789 snprintf(host->led_name, sizeof(host->led_name),
1790 "%s::", mmc_hostname(mmc));
1791 host->led.name = host->led_name;
1792 host->led.brightness = LED_OFF;
1793 host->led.default_trigger = mmc_hostname(mmc);
1794 host->led.brightness_set = sdhci_led_control;
1796 ret = led_classdev_register(mmc_dev(mmc), &host->led);
1805 printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1806 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1807 (host->flags & SDHCI_USE_ADMA)?"A":"",
1808 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1810 sdhci_enable_card_detection(host);
1814 #ifdef SDHCI_USE_LEDS_CLASS
1816 sdhci_reset(host, SDHCI_RESET_ALL);
1817 free_irq(host->irq, host);
1820 tasklet_kill(&host->card_tasklet);
1821 tasklet_kill(&host->finish_tasklet);
1826 EXPORT_SYMBOL_GPL(sdhci_add_host);
1828 void sdhci_remove_host(struct sdhci_host *host, int dead)
1830 unsigned long flags;
1833 spin_lock_irqsave(&host->lock, flags);
1835 host->flags |= SDHCI_DEVICE_DEAD;
1838 printk(KERN_ERR "%s: Controller removed during "
1839 " transfer!\n", mmc_hostname(host->mmc));
1841 host->mrq->cmd->error = -ENOMEDIUM;
1842 tasklet_schedule(&host->finish_tasklet);
1845 spin_unlock_irqrestore(&host->lock, flags);
1848 sdhci_disable_card_detection(host);
1850 mmc_remove_host(host->mmc);
1852 #ifdef SDHCI_USE_LEDS_CLASS
1853 led_classdev_unregister(&host->led);
1857 sdhci_reset(host, SDHCI_RESET_ALL);
1859 free_irq(host->irq, host);
1861 del_timer_sync(&host->timer);
1863 tasklet_kill(&host->card_tasklet);
1864 tasklet_kill(&host->finish_tasklet);
1866 kfree(host->adma_desc);
1867 kfree(host->align_buffer);
1869 host->adma_desc = NULL;
1870 host->align_buffer = NULL;
1873 EXPORT_SYMBOL_GPL(sdhci_remove_host);
1875 void sdhci_free_host(struct sdhci_host *host)
1877 mmc_free_host(host->mmc);
1880 EXPORT_SYMBOL_GPL(sdhci_free_host);
1882 /*****************************************************************************\
1884 * Driver init/exit *
1886 \*****************************************************************************/
1888 static int __init sdhci_drv_init(void)
1890 printk(KERN_INFO DRIVER_NAME
1891 ": Secure Digital Host Controller Interface driver\n");
1892 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1897 static void __exit sdhci_drv_exit(void)
1901 module_init(sdhci_drv_init);
1902 module_exit(sdhci_drv_exit);
1904 module_param(debug_quirks, uint, 0444);
1906 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1907 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1908 MODULE_LICENSE("GPL");
1910 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");