drivers/mmc/host/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  *
  11  * Thanks to the following companies for their support:
  12  *
  13  *     - JMicron (hardware and technical support)
  14  */
  15
  16 #include <linux/delay.h>
  17 #include <linux/highmem.h>
  18 #include <linux/io.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/scatterlist.h>
  21
  22 #include <linux/leds.h>
  23
  24 #include <linux/mmc/host.h>
  25
  26 #include "sdhci.h"
  27
  28 #define DRIVER_NAME "sdhci"
  29
  30 #define DBG(f, x...) \
  31         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  32
  33 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  34         defined(CONFIG_MMC_SDHCI_MODULE))
  35 #define SDHCI_USE_LEDS_CLASS
  36 #endif
  37
  38 static unsigned int debug_quirks = 0;
  39
  40 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  41 static void sdhci_finish_data(struct sdhci_host *);
  42
  43 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  44 static void sdhci_finish_command(struct sdhci_host *);
  45
  46 static void sdhci_dumpregs(struct sdhci_host *host)
  47 {
  48         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  49
  50         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  51                 sdhci_readl(host, SDHCI_DMA_ADDRESS),
  52                 sdhci_readw(host, SDHCI_HOST_VERSION));
  53         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  54                 sdhci_readw(host, SDHCI_BLOCK_SIZE),
  55                 sdhci_readw(host, SDHCI_BLOCK_COUNT));
  56         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  57                 sdhci_readl(host, SDHCI_ARGUMENT),
  58                 sdhci_readw(host, SDHCI_TRANSFER_MODE));
  59         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
  60                 sdhci_readl(host, SDHCI_PRESENT_STATE),
  61                 sdhci_readb(host, SDHCI_HOST_CONTROL));
  62         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
  63                 sdhci_readb(host, SDHCI_POWER_CONTROL),
  64                 sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
  65         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
  66                 sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
  67                 sdhci_readw(host, SDHCI_CLOCK_CONTROL));
  68         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
  69                 sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
  70                 sdhci_readl(host, SDHCI_INT_STATUS));
  71         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
  72                 sdhci_readl(host, SDHCI_INT_ENABLE),
  73                 sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
  74         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
  75                 sdhci_readw(host, SDHCI_ACMD12_ERR),
  76                 sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
  77         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
  78                 sdhci_readl(host, SDHCI_CAPABILITIES),
  79                 sdhci_readl(host, SDHCI_MAX_CURRENT));
  80
  81         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
  82 }
  83
  84 /*****************************************************************************\
  85  *                                                                           *
  86  * Low level functions                                                       *
  87  *                                                                           *
  88 \*****************************************************************************/
  89
  90 static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
  91 {
  92         u32 ier;
  93
  94         ier = sdhci_readl(host, SDHCI_INT_ENABLE);
  95         ier &= ~clear;
  96         ier |= set;
  97         sdhci_writel(host, ier, SDHCI_INT_ENABLE);
  98         sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
  99 }
 100
 101 static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
 102 {
 103         sdhci_clear_set_irqs(host, 0, irqs);
 104 }
 105
 106 static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
 107 {
 108         sdhci_clear_set_irqs(host, irqs, 0);
 109 }
 110
 111 static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
 112 {
 113         u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;
 114
 115         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
 116                 return;
 117
 118         if (enable)
 119                 sdhci_unmask_irqs(host, irqs);
 120         else
 121                 sdhci_mask_irqs(host, irqs);
 122 }
 123
 124 static void sdhci_enable_card_detection(struct sdhci_host *host)
 125 {
 126         sdhci_set_card_detection(host, true);
 127 }
 128
 129 static void sdhci_disable_card_detection(struct sdhci_host *host)
 130 {
 131         sdhci_set_card_detection(host, false);
 132 }
 133
 134 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 135 {
 136         unsigned long timeout;
 137
 138         if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 139                 if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
 140                         SDHCI_CARD_PRESENT))
 141                         return;
 142         }
 143
 144         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
 145
 146         if (mask & SDHCI_RESET_ALL)
 147                 host->clock = 0;
 148
 149         /* Wait max 100 ms */
 150         timeout = 100;
 151
 152         /* hw clears the bit when it's done */
 153         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
 154                 if (timeout == 0) {
 155                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 156                                 mmc_hostname(host->mmc), (int)mask);
 157                         sdhci_dumpregs(host);
 158                         return;
 159                 }
 160                 timeout--;
 161                 mdelay(1);
 162         }
 163 }
 164
 165 static void sdhci_init(struct sdhci_host *host)
 166 {
 167         sdhci_reset(host, SDHCI_RESET_ALL);
 168
 169         sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
 170                 SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 171                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 172                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 173                 SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
 174 }
 175
 176 static void sdhci_reinit(struct sdhci_host *host)
 177 {
 178         sdhci_init(host);
 179         sdhci_enable_card_detection(host);
 180 }
 181
 182 static void sdhci_activate_led(struct sdhci_host *host)
 183 {
 184         u8 ctrl;
 185
 186         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 187         ctrl |= SDHCI_CTRL_LED;
 188         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 189 }
 190
 191 static void sdhci_deactivate_led(struct sdhci_host *host)
 192 {
 193         u8 ctrl;
 194
 195         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 196         ctrl &= ~SDHCI_CTRL_LED;
 197         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 198 }
 199
 200 #ifdef SDHCI_USE_LEDS_CLASS
 201 static void sdhci_led_control(struct led_classdev *led,
 202         enum led_brightness brightness)
 203 {
 204         struct sdhci_host *host = container_of(led, struct sdhci_host, led);
 205         unsigned long flags;
 206
 207         spin_lock_irqsave(&host->lock, flags);
 208
 209         if (brightness == LED_OFF)
 210                 sdhci_deactivate_led(host);
 211         else
 212                 sdhci_activate_led(host);
 213
 214         spin_unlock_irqrestore(&host->lock, flags);
 215 }
 216 #endif
 217
 218 /*****************************************************************************\
 219  *                                                                           *
 220  * Core functions                                                            *
 221  *                                                                           *
 222 \*****************************************************************************/
 223
 224 static void sdhci_read_block_pio(struct sdhci_host *host)
 225 {
 226         unsigned long flags;
 227         size_t blksize, len, chunk;
 228         u32 uninitialized_var(scratch);
 229         u8 *buf;
 230
 231         DBG("PIO reading\n");
 232
 233         blksize = host->data->blksz;
 234         chunk = 0;
 235
 236         local_irq_save(flags);
 237
 238         while (blksize) {
 239                 if (!sg_miter_next(&host->sg_miter))
 240                         BUG();
 241
 242                 len = min(host->sg_miter.length, blksize);
 243
 244                 blksize -= len;
 245                 host->sg_miter.consumed = len;
 246
 247                 buf = host->sg_miter.addr;
 248
 249                 while (len) {
 250                         if (chunk == 0) {
 251                                 scratch = sdhci_readl(host, SDHCI_BUFFER);
 252                                 chunk = 4;
 253                         }
 254
 255                         *buf = scratch & 0xFF;
 256
 257                         buf++;
 258                         scratch >>= 8;
 259                         chunk--;
 260                         len--;
 261                 }
 262         }
 263
 264         sg_miter_stop(&host->sg_miter);
 265
 266         local_irq_restore(flags);
 267 }
 268
 269 static void sdhci_write_block_pio(struct sdhci_host *host)
 270 {
 271         unsigned long flags;
 272         size_t blksize, len, chunk;
 273         u32 scratch;
 274         u8 *buf;
 275
 276         DBG("PIO writing\n");
 277
 278         blksize = host->data->blksz;
 279         chunk = 0;
 280         scratch = 0;
 281
 282         local_irq_save(flags);
 283
 284         while (blksize) {
 285                 if (!sg_miter_next(&host->sg_miter))
 286                         BUG();
 287
 288                 len = min(host->sg_miter.length, blksize);
 289
 290                 blksize -= len;
 291                 host->sg_miter.consumed = len;
 292
 293                 buf = host->sg_miter.addr;
 294
 295                 while (len) {
 296                         scratch |= (u32)*buf << (chunk * 8);
 297
 298                         buf++;
 299                         chunk++;
 300                         len--;
 301
 302                         if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
 303                                 sdhci_writel(host, scratch, SDHCI_BUFFER);
 304                                 chunk = 0;
 305                                 scratch = 0;
 306                         }
 307                 }
 308         }
 309
 310         sg_miter_stop(&host->sg_miter);
 311
 312         local_irq_restore(flags);
 313 }
 314
 315 static void sdhci_transfer_pio(struct sdhci_host *host)
 316 {
 317         u32 mask;
 318
 319         BUG_ON(!host->data);
 320
 321         if (host->blocks == 0)
 322                 return;
 323
 324         if (host->data->flags & MMC_DATA_READ)
 325                 mask = SDHCI_DATA_AVAILABLE;
 326         else
 327                 mask = SDHCI_SPACE_AVAILABLE;
 328
 329         /*
 330          * Some controllers (JMicron JMB38x) mess up the buffer bits
 331          * for transfers < 4 bytes. As long as it is just one block,
 332          * we can ignore the bits.
 333          */
 334         if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
 335                 (host->data->blocks == 1))
 336                 mask = ~0;
 337
 338         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 339                 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY)
 340                         udelay(100);
 341
 342                 if (host->data->flags & MMC_DATA_READ)
 343                         sdhci_read_block_pio(host);
 344                 else
 345                         sdhci_write_block_pio(host);
 346
 347                 host->blocks--;
 348                 if (host->blocks == 0)
 349                         break;
 350         }
 351
 352         DBG("PIO transfer complete.\n");
 353 }
 354
 355 static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
 356 {
 357         local_irq_save(*flags);
 358         return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 359 }
 360
 361 static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
 362 {
 363         kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 364         local_irq_restore(*flags);
 365 }
 366
 367 static int sdhci_adma_table_pre(struct sdhci_host *host,
 368         struct mmc_data *data)
 369 {
 370         int direction;
 371
 372         u8 *desc;
 373         u8 *align;
 374         dma_addr_t addr;
 375         dma_addr_t align_addr;
 376         int len, offset;
 377
 378         struct scatterlist *sg;
 379         int i;
 380         char *buffer;
 381         unsigned long flags;
 382
 383         /*
 384          * The spec does not specify endianness of descriptor table.
 385          * We currently guess that it is LE.
 386          */
 387
 388         if (data->flags & MMC_DATA_READ)
 389                 direction = DMA_FROM_DEVICE;
 390         else
 391                 direction = DMA_TO_DEVICE;
 392
 393         /*
 394          * The ADMA descriptor table is mapped further down as we
 395          * need to fill it with data first.
 396          */
 397
 398         host->align_addr = dma_map_single(mmc_dev(host->mmc),
 399                 host->align_buffer, 128 * 4, direction);
 400         if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
 401                 goto fail;
 402         BUG_ON(host->align_addr & 0x3);
 403
 404         host->sg_count = dma_map_sg(mmc_dev(host->mmc),
 405                 data->sg, data->sg_len, direction);
 406         if (host->sg_count == 0)
 407                 goto unmap_align;
 408
 409         desc = host->adma_desc;
 410         align = host->align_buffer;
 411
 412         align_addr = host->align_addr;
 413
 414         for_each_sg(data->sg, sg, host->sg_count, i) {
 415                 addr = sg_dma_address(sg);
 416                 len = sg_dma_len(sg);
 417
 418                 /*
 419                  * The SDHCI specification states that ADMA
 420                  * addresses must be 32-bit aligned. If they
 421                  * aren't, then we use a bounce buffer for
 422                  * the (up to three) bytes that screw up the
 423                  * alignment.
 424                  */
 425                 offset = (4 - (addr & 0x3)) & 0x3;
 426                 if (offset) {
 427                         if (data->flags & MMC_DATA_WRITE) {
 428                                 buffer = sdhci_kmap_atomic(sg, &flags);
 429                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 430                                 memcpy(align, buffer, offset);
 431                                 sdhci_kunmap_atomic(buffer, &flags);
 432                         }
 433
 434                         desc[7] = (align_addr >> 24) & 0xff;
 435                         desc[6] = (align_addr >> 16) & 0xff;
 436                         desc[5] = (align_addr >> 8) & 0xff;
 437                         desc[4] = (align_addr >> 0) & 0xff;
 438
 439                         BUG_ON(offset > 65536);
 440
 441                         desc[3] = (offset >> 8) & 0xff;
 442                         desc[2] = (offset >> 0) & 0xff;
 443
 444                         desc[1] = 0x00;
 445                         desc[0] = 0x21; /* tran, valid */
 446
 447                         align += 4;
 448                         align_addr += 4;
 449
 450                         desc += 8;
 451
 452                         addr += offset;
 453                         len -= offset;
 454                 }
 455
 456                 desc[7] = (addr >> 24) & 0xff;
 457                 desc[6] = (addr >> 16) & 0xff;
 458                 desc[5] = (addr >> 8) & 0xff;
 459                 desc[4] = (addr >> 0) & 0xff;
 460
 461                 BUG_ON(len > 65536);
 462
 463                 desc[3] = (len >> 8) & 0xff;
 464                 desc[2] = (len >> 0) & 0xff;
 465
 466                 desc[1] = 0x00;
 467                 desc[0] = 0x21; /* tran, valid */
 468
 469                 desc += 8;
 470
 471                 /*
 472                  * If this triggers then we have a calculation bug
 473                  * somewhere. :/
 474                  */
 475                 WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
 476         }
 477
 478         /*
 479          * Add a terminating entry.
 480          */
 481         desc[7] = 0;
 482         desc[6] = 0;
 483         desc[5] = 0;
 484         desc[4] = 0;
 485
 486         desc[3] = 0;
 487         desc[2] = 0;
 488
 489         desc[1] = 0x00;
 490         desc[0] = 0x03; /* nop, end, valid */
 491
 492         /*
 493          * Resync align buffer as we might have changed it.
 494          */
 495         if (data->flags & MMC_DATA_WRITE) {
 496                 dma_sync_single_for_device(mmc_dev(host->mmc),
 497                         host->align_addr, 128 * 4, direction);
 498         }
 499
 500         host->adma_addr = dma_map_single(mmc_dev(host->mmc),
 501                 host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 502         if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
 503                 goto unmap_entries;
 504         BUG_ON(host->adma_addr & 0x3);
 505
 506         return 0;
 507
 508 unmap_entries:
 509         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 510                 data->sg_len, direction);
 511 unmap_align:
 512         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 513                 128 * 4, direction);
 514 fail:
 515         return -EINVAL;
 516 }
 517
 518 static void sdhci_adma_table_post(struct sdhci_host *host,
 519         struct mmc_data *data)
 520 {
 521         int direction;
 522
 523         struct scatterlist *sg;
 524         int i, size;
 525         u8 *align;
 526         char *buffer;
 527         unsigned long flags;
 528
 529         if (data->flags & MMC_DATA_READ)
 530                 direction = DMA_FROM_DEVICE;
 531         else
 532                 direction = DMA_TO_DEVICE;
 533
 534         dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
 535                 (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 536
 537         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 538                 128 * 4, direction);
 539
 540         if (data->flags & MMC_DATA_READ) {
 541                 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
 542                         data->sg_len, direction);
 543
 544                 align = host->align_buffer;
 545
 546                 for_each_sg(data->sg, sg, host->sg_count, i) {
 547                         if (sg_dma_address(sg) & 0x3) {
 548                                 size = 4 - (sg_dma_address(sg) & 0x3);
 549
 550                                 buffer = sdhci_kmap_atomic(sg, &flags);
 551                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 552                                 memcpy(buffer, align, size);
 553                                 sdhci_kunmap_atomic(buffer, &flags);
 554
 555                                 align += 4;
 556                         }
 557                 }
 558         }
 559
 560         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 561                 data->sg_len, direction);
 562 }
 563
 564 static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
 565 {
 566         u8 count;
 567         unsigned target_timeout, current_timeout;
 568
 569         /*
 570          * If the host controller provides us with an incorrect timeout
 571          * value, just skip the check and use 0xE.  The hardware may take
 572          * longer to time out, but that's much better than having a too-short
 573          * timeout value.
 574          */
 575         if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
 576                 return 0xE;
 577
 578         /* timeout in us */
 579         target_timeout = data->timeout_ns / 1000 +
 580                 data->timeout_clks / host->clock;
 581
 582         /*
 583          * Figure out needed cycles.
 584          * We do this in steps in order to fit inside a 32 bit int.
 585          * The first step is the minimum timeout, which will have a
 586          * minimum resolution of 6 bits:
 587          * (1) 2^13*1000 > 2^22,
 588          * (2) host->timeout_clk < 2^16
 589          *     =>
 590          *     (1) / (2) > 2^6
 591          */
 592         count = 0;
 593         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 594         while (current_timeout < target_timeout) {
 595                 count++;
 596                 current_timeout <<= 1;
 597                 if (count >= 0xF)
 598                         break;
 599         }
 600
 601         if (count >= 0xF) {
 602                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 603                         mmc_hostname(host->mmc));
 604                 count = 0xE;
 605         }
 606
 607         return count;
 608 }
 609
 610 static void sdhci_set_transfer_irqs(struct sdhci_host *host)
 611 {
 612         u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
 613         u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
 614
 615         if (host->flags & SDHCI_REQ_USE_DMA)
 616                 sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
 617         else
 618                 sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
 619 }
 620
 621 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 622 {
 623         u8 count;
 624         u8 ctrl;
 625         int ret;
 626
 627         WARN_ON(host->data);
 628
 629         if (data == NULL)
 630                 return;
 631
 632         /* Sanity checks */
 633         BUG_ON(data->blksz * data->blocks > 524288);
 634         BUG_ON(data->blksz > host->mmc->max_blk_size);
 635         BUG_ON(data->blocks > 65535);
 636
 637         host->data = data;
 638         host->data_early = 0;
 639
 640         count = sdhci_calc_timeout(host, data);
 641         sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
 642
 643         if (host->flags & SDHCI_USE_DMA)
 644                 host->flags |= SDHCI_REQ_USE_DMA;
 645
 646         /*
 647          * FIXME: This doesn't account for merging when mapping the
 648          * scatterlist.
 649          */
 650         if (host->flags & SDHCI_REQ_USE_DMA) {
 651                 int broken, i;
 652                 struct scatterlist *sg;
 653
 654                 broken = 0;
 655                 if (host->flags & SDHCI_USE_ADMA) {
 656                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 657                                 broken = 1;
 658                 } else {
 659                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
 660                                 broken = 1;
 661                 }
 662
 663                 if (unlikely(broken)) {
 664                         for_each_sg(data->sg, sg, data->sg_len, i) {
 665                                 if (sg->length & 0x3) {
 666                                         DBG("Reverting to PIO because of "
 667                                                 "transfer size (%d)\n",
 668                                                 sg->length);
 669                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 670                                         break;
 671                                 }
 672                         }
 673                 }
 674         }
 675
 676         /*
 677          * The assumption here being that alignment is the same after
 678          * translation to device address space.
 679          */
 680         if (host->flags & SDHCI_REQ_USE_DMA) {
 681                 int broken, i;
 682                 struct scatterlist *sg;
 683
 684                 broken = 0;
 685                 if (host->flags & SDHCI_USE_ADMA) {
 686                         /*
 687                          * As we use 3 byte chunks to work around
 688                          * alignment problems, we need to check this
 689                          * quirk.
 690                          */
 691                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 692                                 broken = 1;
 693                 } else {
 694                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
 695                                 broken = 1;
 696                 }
 697
 698                 if (unlikely(broken)) {
 699                         for_each_sg(data->sg, sg, data->sg_len, i) {
 700                                 if (sg->offset & 0x3) {
 701                                         DBG("Reverting to PIO because of "
 702                                                 "bad alignment\n");
 703                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 704                                         break;
 705                                 }
 706                         }
 707                 }
 708         }
 709
 710         if (host->flags & SDHCI_REQ_USE_DMA) {
 711                 if (host->flags & SDHCI_USE_ADMA) {
 712                         ret = sdhci_adma_table_pre(host, data);
 713                         if (ret) {
 714                                 /*
 715                                  * This only happens when someone fed
 716                                  * us an invalid request.
 717                                  */
 718                                 WARN_ON(1);
 719                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 720                         } else {
 721                                 sdhci_writel(host, host->adma_addr,
 722                                         SDHCI_ADMA_ADDRESS);
 723                         }
 724                 } else {
 725                         int sg_cnt;
 726
 727                         sg_cnt = dma_map_sg(mmc_dev(host->mmc),
 728                                         data->sg, data->sg_len,
 729                                         (data->flags & MMC_DATA_READ) ?
 730                                                 DMA_FROM_DEVICE :
 731                                                 DMA_TO_DEVICE);
 732                         if (sg_cnt == 0) {
 733                                 /*
 734                                  * This only happens when someone fed
 735                                  * us an invalid request.
 736                                  */
 737                                 WARN_ON(1);
 738                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 739                         } else {
 740                                 WARN_ON(sg_cnt != 1);
 741                                 sdhci_writel(host, sg_dma_address(data->sg),
 742                                         SDHCI_DMA_ADDRESS);
 743                         }
 744                 }
 745         }
 746
 747         /*
 748          * Always adjust the DMA selection as some controllers
 749          * (e.g. JMicron) can't do PIO properly when the selection
 750          * is ADMA.
 751          */
 752         if (host->version >= SDHCI_SPEC_200) {
 753                 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 754                 ctrl &= ~SDHCI_CTRL_DMA_MASK;
 755                 if ((host->flags & SDHCI_REQ_USE_DMA) &&
 756                         (host->flags & SDHCI_USE_ADMA))
 757                         ctrl |= SDHCI_CTRL_ADMA32;
 758                 else
 759                         ctrl |= SDHCI_CTRL_SDMA;
 760                 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 761         }
 762
 763         if (!(host->flags & SDHCI_REQ_USE_DMA)) {
 764                 sg_miter_start(&host->sg_miter,
 765                         data->sg, data->sg_len, SG_MITER_ATOMIC);
 766                 host->blocks = data->blocks;
 767         }
 768
 769         sdhci_set_transfer_irqs(host);
 770
 771         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 772         sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
 773         sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 774 }
 775
 776 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 777         struct mmc_data *data)
 778 {
 779         u16 mode;
 780
 781         if (data == NULL)
 782                 return;
 783
 784         WARN_ON(!host->data);
 785
 786         mode = SDHCI_TRNS_BLK_CNT_EN;
 787         if (data->blocks > 1)
 788                 mode |= SDHCI_TRNS_MULTI;
 789         if (data->flags & MMC_DATA_READ)
 790                 mode |= SDHCI_TRNS_READ;
 791         if (host->flags & SDHCI_REQ_USE_DMA)
 792                 mode |= SDHCI_TRNS_DMA;
 793
 794         sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
 795 }
 796
 797 static void sdhci_finish_data(struct sdhci_host *host)
 798 {
 799         struct mmc_data *data;
 800
 801         BUG_ON(!host->data);
 802
 803         data = host->data;
 804         host->data = NULL;
 805
 806         if (host->flags & SDHCI_REQ_USE_DMA) {
 807                 if (host->flags & SDHCI_USE_ADMA)
 808                         sdhci_adma_table_post(host, data);
 809                 else {
 810                         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 811                                 data->sg_len, (data->flags & MMC_DATA_READ) ?
 812                                         DMA_FROM_DEVICE : DMA_TO_DEVICE);
 813                 }
 814         }
 815
 816         /*
 817          * The specification states that the block count register must
 818          * be updated, but it does not specify at what point in the
 819          * data flow. That makes the register entirely useless to read
 820          * back so we have to assume that nothing made it to the card
 821          * in the event of an error.
 822          */
 823         if (data->error)
 824                 data->bytes_xfered = 0;
 825         else
 826                 data->bytes_xfered = data->blksz * data->blocks;
 827
 828         if (data->stop) {
 829                 /*
 830                  * The controller needs a reset of internal state machines
 831                  * upon error conditions.
 832                  */
 833                 if (data->error) {
 834                         sdhci_reset(host, SDHCI_RESET_CMD);
 835                         sdhci_reset(host, SDHCI_RESET_DATA);
 836                 }
 837
 838                 sdhci_send_command(host, data->stop);
 839         } else
 840                 tasklet_schedule(&host->finish_tasklet);
 841 }
 842
 843 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 844 {
 845         int flags;
 846         u32 mask;
 847         unsigned long timeout;
 848
 849         WARN_ON(host->cmd);
 850
 851         /* Wait max 10 ms */
 852         timeout = 10;
 853
 854         mask = SDHCI_CMD_INHIBIT;
 855         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 856                 mask |= SDHCI_DATA_INHIBIT;
 857
 858         /* We shouldn't wait for data inihibit for stop commands, even
 859            though they might use busy signaling */
 860         if (host->mrq->data && (cmd == host->mrq->data->stop))
 861                 mask &= ~SDHCI_DATA_INHIBIT;
 862
 863         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 864                 if (timeout == 0) {
 865                         printk(KERN_ERR "%s: Controller never released "
 866                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 867                         sdhci_dumpregs(host);
 868                         cmd->error = -EIO;
 869                         tasklet_schedule(&host->finish_tasklet);
 870                         return;
 871                 }
 872                 timeout--;
 873                 mdelay(1);
 874         }
 875
 876         mod_timer(&host->timer, jiffies + 10 * HZ);
 877
 878         host->cmd = cmd;
 879
 880         sdhci_prepare_data(host, cmd->data);
 881
 882         sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
 883
 884         sdhci_set_transfer_mode(host, cmd->data);
 885
 886         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 887                 printk(KERN_ERR "%s: Unsupported response type!\n",
 888                         mmc_hostname(host->mmc));
 889                 cmd->error = -EINVAL;
 890                 tasklet_schedule(&host->finish_tasklet);
 891                 return;
 892         }
 893
 894         if (!(cmd->flags & MMC_RSP_PRESENT))
 895                 flags = SDHCI_CMD_RESP_NONE;
 896         else if (cmd->flags & MMC_RSP_136)
 897                 flags = SDHCI_CMD_RESP_LONG;
 898         else if (cmd->flags & MMC_RSP_BUSY)
 899                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 900         else
 901                 flags = SDHCI_CMD_RESP_SHORT;
 902
 903         if (cmd->flags & MMC_RSP_CRC)
 904                 flags |= SDHCI_CMD_CRC;
 905         if (cmd->flags & MMC_RSP_OPCODE)
 906                 flags |= SDHCI_CMD_INDEX;
 907         if (cmd->data)
 908                 flags |= SDHCI_CMD_DATA;
 909
 910         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
 911 }
 912
 913 static void sdhci_finish_command(struct sdhci_host *host)
 914 {
 915         int i;
 916
 917         BUG_ON(host->cmd == NULL);
 918
 919         if (host->cmd->flags & MMC_RSP_PRESENT) {
 920                 if (host->cmd->flags & MMC_RSP_136) {
 921                         /* CRC is stripped so we need to do some shifting. */
 922                         for (i = 0;i < 4;i++) {
 923                                 host->cmd->resp[i] = sdhci_readl(host,
 924                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 925                                 if (i != 3)
 926                                         host->cmd->resp[i] |=
 927                                                 sdhci_readb(host,
 928                                                 SDHCI_RESPONSE + (3-i)*4-1);
 929                         }
 930                 } else {
 931                         host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
 932                 }
 933         }
 934
 935         host->cmd->error = 0;
 936
 937         if (host->data && host->data_early)
 938                 sdhci_finish_data(host);
 939
 940         if (!host->cmd->data)
 941                 tasklet_schedule(&host->finish_tasklet);
 942
 943         host->cmd = NULL;
 944 }
 945
 946 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 947 {
 948         int div;
 949         u16 clk;
 950         unsigned long timeout;
 951
 952         if (clock == host->clock)
 953                 return;
 954
 955         if (host->ops->set_clock) {
 956                 host->ops->set_clock(host, clock);
 957                 if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
 958                         return;
 959         }
 960
 961         sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 962
 963         if (clock == 0)
 964                 goto out;
 965
 966         for (div = 1;div < 256;div *= 2) {
 967                 if ((host->max_clk / div) <= clock)
 968                         break;
 969         }
 970         div >>= 1;
 971
 972         clk = div << SDHCI_DIVIDER_SHIFT;
 973         clk |= SDHCI_CLOCK_INT_EN;
 974         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 975
 976         /* Wait max 10 ms */
 977         timeout = 10;
 978         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 979                 & SDHCI_CLOCK_INT_STABLE)) {
 980                 if (timeout == 0) {
 981                         printk(KERN_ERR "%s: Internal clock never "
 982                                 "stabilised.\n", mmc_hostname(host->mmc));
 983                         sdhci_dumpregs(host);
 984                         return;
 985                 }
 986                 timeout--;
 987                 mdelay(1);
 988         }
 989
 990         clk |= SDHCI_CLOCK_CARD_EN;
 991         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 992
 993 out:
 994         host->clock = clock;
 995 }
 996
 997 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 998 {
 999         u8 pwr;
1000
1001         if (host->power == power)
1002                 return;
1003
1004         if (power == (unsigned short)-1) {
1005                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1006                 goto out;
1007         }
1008
1009         /*
1010          * Spec says that we should clear the power reg before setting
1011          * a new value. Some controllers don't seem to like this though.
1012          */
1013         if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1014                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1015
1016         pwr = SDHCI_POWER_ON;
1017
1018         switch (1 << power) {
1019         case MMC_VDD_165_195:
1020                 pwr |= SDHCI_POWER_180;
1021                 break;
1022         case MMC_VDD_29_30:
1023         case MMC_VDD_30_31:
1024                 pwr |= SDHCI_POWER_300;
1025                 break;
1026         case MMC_VDD_32_33:
1027         case MMC_VDD_33_34:
1028                 pwr |= SDHCI_POWER_330;
1029                 break;
1030         default:
1031                 BUG();
1032         }
1033
1034         /*
1035          * At least the Marvell CaFe chip gets confused if we set the voltage
1036          * and set turn on power at the same time, so set the voltage first.
1037          */
1038         if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
1039                 sdhci_writeb(host, pwr & ~SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1040
1041         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1042
1043 out:
1044         host->power = power;
1045 }
1046
1047 /*****************************************************************************\
1048  *                                                                           *
1049  * MMC callbacks                                                             *
1050  *                                                                           *
1051 \*****************************************************************************/
1052
1053 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1054 {
1055         struct sdhci_host *host;
1056         bool present;
1057         unsigned long flags;
1058
1059         host = mmc_priv(mmc);
1060
1061         spin_lock_irqsave(&host->lock, flags);
1062
1063         WARN_ON(host->mrq != NULL);
1064
1065 #ifndef SDHCI_USE_LEDS_CLASS
1066         sdhci_activate_led(host);
1067 #endif
1068
1069         host->mrq = mrq;
1070
1071         /* If polling, assume that the card is always present. */
1072         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1073                 present = true;
1074         else
1075                 present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
1076                                 SDHCI_CARD_PRESENT;
1077
1078         if (!present || host->flags & SDHCI_DEVICE_DEAD) {
1079                 host->mrq->cmd->error = -ENOMEDIUM;
1080                 tasklet_schedule(&host->finish_tasklet);
1081         } else
1082                 sdhci_send_command(host, mrq->cmd);
1083
1084         mmiowb();
1085         spin_unlock_irqrestore(&host->lock, flags);
1086 }
1087
1088 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1089 {
1090         struct sdhci_host *host;
1091         unsigned long flags;
1092         u8 ctrl;
1093
1094         host = mmc_priv(mmc);
1095
1096         spin_lock_irqsave(&host->lock, flags);
1097
1098         if (host->flags & SDHCI_DEVICE_DEAD)
1099                 goto out;
1100
1101         /*
1102          * Reset the chip on each power off.
1103          * Should clear out any weird states.
1104          */
1105         if (ios->power_mode == MMC_POWER_OFF) {
1106                 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1107                 sdhci_reinit(host);
1108         }
1109
1110         sdhci_set_clock(host, ios->clock);
1111
1112         if (ios->power_mode == MMC_POWER_OFF)
1113                 sdhci_set_power(host, -1);
1114         else
1115                 sdhci_set_power(host, ios->vdd);
1116
1117         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1118
1119         if (ios->bus_width == MMC_BUS_WIDTH_4)
1120                 ctrl |= SDHCI_CTRL_4BITBUS;
1121         else
1122                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1123
1124         if (ios->timing == MMC_TIMING_SD_HS)
1125                 ctrl |= SDHCI_CTRL_HISPD;
1126         else
1127                 ctrl &= ~SDHCI_CTRL_HISPD;
1128
1129         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1130
1131         /*
1132          * Some (ENE) controllers go apeshit on some ios operation,
1133          * signalling timeout and CRC errors even on CMD0. Resetting
1134          * it on each ios seems to solve the problem.
1135          */
1136         if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1137                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1138
1139 out:
1140         mmiowb();
1141         spin_unlock_irqrestore(&host->lock, flags);
1142 }
1143
1144 static int sdhci_get_ro(struct mmc_host *mmc)
1145 {
1146         struct sdhci_host *host;
1147         unsigned long flags;
1148         int present;
1149
1150         host = mmc_priv(mmc);
1151
1152         spin_lock_irqsave(&host->lock, flags);
1153
1154         if (host->flags & SDHCI_DEVICE_DEAD)
1155                 present = 0;
1156         else
1157                 present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1158
1159         spin_unlock_irqrestore(&host->lock, flags);
1160
1161         if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)
1162                 return !!(present & SDHCI_WRITE_PROTECT);
1163         return !(present & SDHCI_WRITE_PROTECT);
1164 }
1165
1166 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1167 {
1168         struct sdhci_host *host;
1169         unsigned long flags;
1170
1171         host = mmc_priv(mmc);
1172
1173         spin_lock_irqsave(&host->lock, flags);
1174
1175         if (host->flags & SDHCI_DEVICE_DEAD)
1176                 goto out;
1177
1178         if (enable)
1179                 sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
1180         else
1181                 sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
1182 out:
1183         mmiowb();
1184
1185         spin_unlock_irqrestore(&host->lock, flags);
1186 }
1187
1188 static const struct mmc_host_ops sdhci_ops = {
1189         .request        = sdhci_request,
1190         .set_ios        = sdhci_set_ios,
1191         .get_ro         = sdhci_get_ro,
1192         .enable_sdio_irq = sdhci_enable_sdio_irq,
1193 };
1194
1195 /*****************************************************************************\
1196  *                                                                           *
1197  * Tasklets                                                                  *
1198  *                                                                           *
1199 \*****************************************************************************/
1200
1201 static void sdhci_tasklet_card(unsigned long param)
1202 {
1203         struct sdhci_host *host;
1204         unsigned long flags;
1205
1206         host = (struct sdhci_host*)param;
1207
1208         spin_lock_irqsave(&host->lock, flags);
1209
1210         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1211                 if (host->mrq) {
1212                         printk(KERN_ERR "%s: Card removed during transfer!\n",
1213                                 mmc_hostname(host->mmc));
1214                         printk(KERN_ERR "%s: Resetting controller.\n",
1215                                 mmc_hostname(host->mmc));
1216
1217                         sdhci_reset(host, SDHCI_RESET_CMD);
1218                         sdhci_reset(host, SDHCI_RESET_DATA);
1219
1220                         host->mrq->cmd->error = -ENOMEDIUM;
1221                         tasklet_schedule(&host->finish_tasklet);
1222                 }
1223         }
1224
1225         spin_unlock_irqrestore(&host->lock, flags);
1226
1227         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1228 }
1229
1230 static void sdhci_tasklet_finish(unsigned long param)
1231 {
1232         struct sdhci_host *host;
1233         unsigned long flags;
1234         struct mmc_request *mrq;
1235
1236         host = (struct sdhci_host*)param;
1237
1238         spin_lock_irqsave(&host->lock, flags);
1239
1240         del_timer(&host->timer);
1241
1242         mrq = host->mrq;
1243
1244         /*
1245          * The controller needs a reset of internal state machines
1246          * upon error conditions.
1247          */
1248         if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1249                 (mrq->cmd->error ||
1250                  (mrq->data && (mrq->data->error ||
1251                   (mrq->data->stop && mrq->data->stop->error))) ||
1252                    (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1253
1254                 /* Some controllers need this kick or reset won't work here */
1255                 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1256                         unsigned int clock;
1257
1258                         /* This is to force an update */
1259                         clock = host->clock;
1260                         host->clock = 0;
1261                         sdhci_set_clock(host, clock);
1262                 }
1263
1264                 /* Spec says we should do both at the same time, but Ricoh
1265                    controllers do not like that. */
1266                 sdhci_reset(host, SDHCI_RESET_CMD);
1267                 sdhci_reset(host, SDHCI_RESET_DATA);
1268         }
1269
1270         host->mrq = NULL;
1271         host->cmd = NULL;
1272         host->data = NULL;
1273
1274 #ifndef SDHCI_USE_LEDS_CLASS
1275         sdhci_deactivate_led(host);
1276 #endif
1277
1278         mmiowb();
1279         spin_unlock_irqrestore(&host->lock, flags);
1280
1281         mmc_request_done(host->mmc, mrq);
1282 }
1283
1284 static void sdhci_timeout_timer(unsigned long data)
1285 {
1286         struct sdhci_host *host;
1287         unsigned long flags;
1288
1289         host = (struct sdhci_host*)data;
1290
1291         spin_lock_irqsave(&host->lock, flags);
1292
1293         if (host->mrq) {
1294                 printk(KERN_ERR "%s: Timeout waiting for hardware "
1295                         "interrupt.\n", mmc_hostname(host->mmc));
1296                 sdhci_dumpregs(host);
1297
1298                 if (host->data) {
1299                         host->data->error = -ETIMEDOUT;
1300                         sdhci_finish_data(host);
1301                 } else {
1302                         if (host->cmd)
1303                                 host->cmd->error = -ETIMEDOUT;
1304                         else
1305                                 host->mrq->cmd->error = -ETIMEDOUT;
1306
1307                         tasklet_schedule(&host->finish_tasklet);
1308                 }
1309         }
1310
1311         mmiowb();
1312         spin_unlock_irqrestore(&host->lock, flags);
1313 }
1314
1315 /*****************************************************************************\
1316  *                                                                           *
1317  * Interrupt handling                                                        *
1318  *                                                                           *
1319 \*****************************************************************************/
1320
1321 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
1322 {
1323         BUG_ON(intmask == 0);
1324
1325         if (!host->cmd) {
1326                 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
1327                         "though no command operation was in progress.\n",
1328                         mmc_hostname(host->mmc), (unsigned)intmask);
1329                 sdhci_dumpregs(host);
1330                 return;
1331         }
1332
1333         if (intmask & SDHCI_INT_TIMEOUT)
1334                 host->cmd->error = -ETIMEDOUT;
1335         else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1336                         SDHCI_INT_INDEX))
1337                 host->cmd->error = -EILSEQ;
1338
1339         if (host->cmd->error) {
1340                 tasklet_schedule(&host->finish_tasklet);
1341                 return;
1342         }
1343
1344         /*
1345          * The host can send and interrupt when the busy state has
1346          * ended, allowing us to wait without wasting CPU cycles.
1347          * Unfortunately this is overloaded on the "data complete"
1348          * interrupt, so we need to take some care when handling
1349          * it.
1350          *
1351          * Note: The 1.0 specification is a bit ambiguous about this
1352          *       feature so there might be some problems with older
1353          *       controllers.
1354          */
1355         if (host->cmd->flags & MMC_RSP_BUSY) {
1356                 if (host->cmd->data)
1357                         DBG("Cannot wait for busy signal when also "
1358                                 "doing a data transfer");
1359                 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1360                         return;
1361
1362                 /* The controller does not support the end-of-busy IRQ,
1363                  * fall through and take the SDHCI_INT_RESPONSE */
1364         }
1365
1366         if (intmask & SDHCI_INT_RESPONSE)
1367                 sdhci_finish_command(host);
1368 }
1369
1370 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
1371 {
1372         BUG_ON(intmask == 0);
1373
1374         if (!host->data) {
1375                 /*
1376                  * The "data complete" interrupt is also used to
1377                  * indicate that a busy state has ended. See comment
1378                  * above in sdhci_cmd_irq().
1379                  */
1380                 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1381                         if (intmask & SDHCI_INT_DATA_END) {
1382                                 sdhci_finish_command(host);
1383                                 return;
1384                         }
1385                 }
1386
1387                 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
1388                         "though no data operation was in progress.\n",
1389                         mmc_hostname(host->mmc), (unsigned)intmask);
1390                 sdhci_dumpregs(host);
1391
1392                 return;
1393         }
1394
1395         if (intmask & SDHCI_INT_DATA_TIMEOUT)
1396                 host->data->error = -ETIMEDOUT;
1397         else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
1398                 host->data->error = -EILSEQ;
1399         else if (intmask & SDHCI_INT_ADMA_ERROR)
1400                 host->data->error = -EIO;
1401
1402         if (host->data->error)
1403                 sdhci_finish_data(host);
1404         else {
1405                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1406                         sdhci_transfer_pio(host);
1407
1408                 /*
1409                  * We currently don't do anything fancy with DMA
1410                  * boundaries, but as we can't disable the feature
1411                  * we need to at least restart the transfer.
1412                  */
1413                 if (intmask & SDHCI_INT_DMA_END)
1414                         sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
1415                                 SDHCI_DMA_ADDRESS);
1416
1417                 if (intmask & SDHCI_INT_DATA_END) {
1418                         if (host->cmd) {
1419                                 /*
1420                                  * Data managed to finish before the
1421                                  * command completed. Make sure we do
1422                                  * things in the proper order.
1423                                  */
1424                                 host->data_early = 1;
1425                         } else {
1426                                 sdhci_finish_data(host);
1427                         }
1428                 }
1429         }
1430 }
1431
1432 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1433 {
1434         irqreturn_t result;
1435         struct sdhci_host* host = dev_id;
1436         u32 intmask;
1437         int cardint = 0;
1438
1439         spin_lock(&host->lock);
1440
1441         intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1442
1443         if (!intmask || intmask == 0xffffffff) {
1444                 result = IRQ_NONE;
1445                 goto out;
1446         }
1447
1448         DBG("*** %s got interrupt: 0x%08x\n",
1449                 mmc_hostname(host->mmc), intmask);
1450
1451         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1452                 sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
1453                         SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1454                 tasklet_schedule(&host->card_tasklet);
1455         }
1456
1457         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1458
1459         if (intmask & SDHCI_INT_CMD_MASK) {
1460                 sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
1461                         SDHCI_INT_STATUS);
1462                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1463         }
1464
1465         if (intmask & SDHCI_INT_DATA_MASK) {
1466                 sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
1467                         SDHCI_INT_STATUS);
1468                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1469         }
1470
1471         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1472
1473         intmask &= ~SDHCI_INT_ERROR;
1474
1475         if (intmask & SDHCI_INT_BUS_POWER) {
1476                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1477                         mmc_hostname(host->mmc));
1478                 sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1479         }
1480
1481         intmask &= ~SDHCI_INT_BUS_POWER;
1482
1483         if (intmask & SDHCI_INT_CARD_INT)
1484                 cardint = 1;
1485
1486         intmask &= ~SDHCI_INT_CARD_INT;
1487
1488         if (intmask) {
1489                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1490                         mmc_hostname(host->mmc), intmask);
1491                 sdhci_dumpregs(host);
1492
1493                 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1494         }
1495
1496         result = IRQ_HANDLED;
1497
1498         mmiowb();
1499 out:
1500         spin_unlock(&host->lock);
1501
1502         /*
1503          * We have to delay this as it calls back into the driver.
1504          */
1505         if (cardint)
1506                 mmc_signal_sdio_irq(host->mmc);
1507
1508         return result;
1509 }
1510
1511 /*****************************************************************************\
1512  *                                                                           *
1513  * Suspend/resume                                                            *
1514  *                                                                           *
1515 \*****************************************************************************/
1516
1517 #ifdef CONFIG_PM
1518
1519 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1520 {
1521         int ret;
1522
1523         sdhci_disable_card_detection(host);
1524
1525         ret = mmc_suspend_host(host->mmc, state);
1526         if (ret)
1527                 return ret;
1528
1529         free_irq(host->irq, host);
1530
1531         return 0;
1532 }
1533
1534 EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1535
1536 int sdhci_resume_host(struct sdhci_host *host)
1537 {
1538         int ret;
1539
1540         if (host->flags & SDHCI_USE_DMA) {
1541                 if (host->ops->enable_dma)
1542                         host->ops->enable_dma(host);
1543         }
1544
1545         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1546                           mmc_hostname(host->mmc), host);
1547         if (ret)
1548                 return ret;
1549
1550         sdhci_init(host);
1551         mmiowb();
1552
1553         ret = mmc_resume_host(host->mmc);
1554         if (ret)
1555                 return ret;
1556
1557         sdhci_enable_card_detection(host);
1558
1559         return 0;
1560 }
1561
1562 EXPORT_SYMBOL_GPL(sdhci_resume_host);
1563
1564 #endif /* CONFIG_PM */
1565
1566 /*****************************************************************************\
1567  *                                                                           *
1568  * Device allocation/registration                                            *
1569  *                                                                           *
1570 \*****************************************************************************/
1571
1572 struct sdhci_host *sdhci_alloc_host(struct device *dev,
1573         size_t priv_size)
1574 {
1575         struct mmc_host *mmc;
1576         struct sdhci_host *host;
1577
1578         WARN_ON(dev == NULL);
1579
1580         mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1581         if (!mmc)
1582                 return ERR_PTR(-ENOMEM);
1583
1584         host = mmc_priv(mmc);
1585         host->mmc = mmc;
1586
1587         return host;
1588 }
1589
1590 EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1591
1592 int sdhci_add_host(struct sdhci_host *host)
1593 {
1594         struct mmc_host *mmc;
1595         unsigned int caps;
1596         int ret;
1597
1598         WARN_ON(host == NULL);
1599         if (host == NULL)
1600                 return -EINVAL;
1601
1602         mmc = host->mmc;
1603
1604         if (debug_quirks)
1605                 host->quirks = debug_quirks;
1606
1607         sdhci_reset(host, SDHCI_RESET_ALL);
1608
1609         host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1610         host->version = (host->version & SDHCI_SPEC_VER_MASK)
1611                                 >> SDHCI_SPEC_VER_SHIFT;
1612         if (host->version > SDHCI_SPEC_200) {
1613                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1614                         "You may experience problems.\n", mmc_hostname(mmc),
1615                         host->version);
1616         }
1617
1618         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1619
1620         if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1621                 host->flags |= SDHCI_USE_DMA;
1622         else if (!(caps & SDHCI_CAN_DO_DMA))
1623                 DBG("Controller doesn't have DMA capability\n");
1624         else
1625                 host->flags |= SDHCI_USE_DMA;
1626
1627         if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1628                 (host->flags & SDHCI_USE_DMA)) {
1629                 DBG("Disabling DMA as it is marked broken\n");
1630                 host->flags &= ~SDHCI_USE_DMA;
1631         }
1632
1633         if (host->flags & SDHCI_USE_DMA) {
1634                 if ((host->version >= SDHCI_SPEC_200) &&
1635                                 (caps & SDHCI_CAN_DO_ADMA2))
1636                         host->flags |= SDHCI_USE_ADMA;
1637         }
1638
1639         if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
1640                 (host->flags & SDHCI_USE_ADMA)) {
1641                 DBG("Disabling ADMA as it is marked broken\n");
1642                 host->flags &= ~SDHCI_USE_ADMA;
1643         }
1644
1645         if (host->flags & SDHCI_USE_DMA) {
1646                 if (host->ops->enable_dma) {
1647                         if (host->ops->enable_dma(host)) {
1648                                 printk(KERN_WARNING "%s: No suitable DMA "
1649                                         "available. Falling back to PIO.\n",
1650                                         mmc_hostname(mmc));
1651                                 host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1652                         }
1653                 }
1654         }
1655
1656         if (host->flags & SDHCI_USE_ADMA) {
1657                 /*
1658                  * We need to allocate descriptors for all sg entries
1659                  * (128) and potentially one alignment transfer for
1660                  * each of those entries.
1661                  */
1662                 host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
1663                 host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
1664                 if (!host->adma_desc || !host->align_buffer) {
1665                         kfree(host->adma_desc);
1666                         kfree(host->align_buffer);
1667                         printk(KERN_WARNING "%s: Unable to allocate ADMA "
1668                                 "buffers. Falling back to standard DMA.\n",
1669                                 mmc_hostname(mmc));
1670                         host->flags &= ~SDHCI_USE_ADMA;
1671                 }
1672         }
1673
1674         /*
1675          * If we use DMA, then it's up to the caller to set the DMA
1676          * mask, but PIO does not need the hw shim so we set a new
1677          * mask here in that case.
1678          */
1679         if (!(host->flags & SDHCI_USE_DMA)) {
1680                 host->dma_mask = DMA_BIT_MASK(64);
1681                 mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
1682         }
1683
1684         host->max_clk =
1685                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1686         host->max_clk *= 1000000;
1687         if (host->max_clk == 0) {
1688                 if (!host->ops->get_max_clock) {
1689                         printk(KERN_ERR
1690                                "%s: Hardware doesn't specify base clock "
1691                                "frequency.\n", mmc_hostname(mmc));
1692                         return -ENODEV;
1693                 }
1694                 host->max_clk = host->ops->get_max_clock(host);
1695         }
1696
1697         host->timeout_clk =
1698                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1699         if (host->timeout_clk == 0) {
1700                 if (!host->ops->get_timeout_clock) {
1701                         printk(KERN_ERR
1702                                "%s: Hardware doesn't specify timeout clock "
1703                                "frequency.\n", mmc_hostname(mmc));
1704                         return -ENODEV;
1705                 }
1706                 host->timeout_clk = host->ops->get_timeout_clock(host);
1707         }
1708         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1709                 host->timeout_clk *= 1000;
1710
1711         /*
1712          * Set host parameters.
1713          */
1714         mmc->ops = &sdhci_ops;
1715         mmc->f_min = host->max_clk / 256;
1716         mmc->f_max = host->max_clk;
1717         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1718
1719         if (caps & SDHCI_CAN_DO_HISPD)
1720                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1721
1722         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1723                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1724
1725         mmc->ocr_avail = 0;
1726         if (caps & SDHCI_CAN_VDD_330)
1727                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1728         if (caps & SDHCI_CAN_VDD_300)
1729                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1730         if (caps & SDHCI_CAN_VDD_180)
1731                 mmc->ocr_avail |= MMC_VDD_165_195;
1732
1733         if (mmc->ocr_avail == 0) {
1734                 printk(KERN_ERR "%s: Hardware doesn't report any "
1735                         "support voltages.\n", mmc_hostname(mmc));
1736                 return -ENODEV;
1737         }
1738
1739         spin_lock_init(&host->lock);
1740
1741         /*
1742          * Maximum number of segments. Depends on if the hardware
1743          * can do scatter/gather or not.
1744          */
1745         if (host->flags & SDHCI_USE_ADMA)
1746                 mmc->max_hw_segs = 128;
1747         else if (host->flags & SDHCI_USE_DMA)
1748                 mmc->max_hw_segs = 1;
1749         else /* PIO */
1750                 mmc->max_hw_segs = 128;
1751         mmc->max_phys_segs = 128;
1752
1753         /*
1754          * Maximum number of sectors in one transfer. Limited by DMA boundary
1755          * size (512KiB).
1756          */
1757         mmc->max_req_size = 524288;
1758
1759         /*
1760          * Maximum segment size. Could be one segment with the maximum number
1761          * of bytes. When doing hardware scatter/gather, each entry cannot
1762          * be larger than 64 KiB though.
1763          */
1764         if (host->flags & SDHCI_USE_ADMA)
1765                 mmc->max_seg_size = 65536;
1766         else
1767                 mmc->max_seg_size = mmc->max_req_size;
1768
1769         /*
1770          * Maximum block size. This varies from controller to controller and
1771          * is specified in the capabilities register.
1772          */
1773         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1774         if (mmc->max_blk_size >= 3) {
1775                 printk(KERN_WARNING "%s: Invalid maximum block size, "
1776                         "assuming 512 bytes\n", mmc_hostname(mmc));
1777                 mmc->max_blk_size = 512;
1778         } else
1779                 mmc->max_blk_size = 512 << mmc->max_blk_size;
1780
1781         /*
1782          * Maximum block count.
1783          */
1784         mmc->max_blk_count = 65535;
1785
1786         /*
1787          * Init tasklets.
1788          */
1789         tasklet_init(&host->card_tasklet,
1790                 sdhci_tasklet_card, (unsigned long)host);
1791         tasklet_init(&host->finish_tasklet,
1792                 sdhci_tasklet_finish, (unsigned long)host);
1793
1794         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1795
1796         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1797                 mmc_hostname(mmc), host);
1798         if (ret)
1799                 goto untasklet;
1800
1801         sdhci_init(host);
1802
1803 #ifdef CONFIG_MMC_DEBUG
1804         sdhci_dumpregs(host);
1805 #endif
1806
1807 #ifdef SDHCI_USE_LEDS_CLASS
1808         snprintf(host->led_name, sizeof(host->led_name),
1809                 "%s::", mmc_hostname(mmc));
1810         host->led.name = host->led_name;
1811         host->led.brightness = LED_OFF;
1812         host->led.default_trigger = mmc_hostname(mmc);
1813         host->led.brightness_set = sdhci_led_control;
1814
1815         ret = led_classdev_register(mmc_dev(mmc), &host->led);
1816         if (ret)
1817                 goto reset;
1818 #endif
1819
1820         mmiowb();
1821
1822         mmc_add_host(mmc);
1823
1824         printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1825                 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1826                 (host->flags & SDHCI_USE_ADMA)?"A":"",
1827                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1828
1829         sdhci_enable_card_detection(host);
1830
1831         return 0;
1832
1833 #ifdef SDHCI_USE_LEDS_CLASS
1834 reset:
1835         sdhci_reset(host, SDHCI_RESET_ALL);
1836         free_irq(host->irq, host);
1837 #endif
1838 untasklet:
1839         tasklet_kill(&host->card_tasklet);
1840         tasklet_kill(&host->finish_tasklet);
1841
1842         return ret;
1843 }
1844
1845 EXPORT_SYMBOL_GPL(sdhci_add_host);
1846
1847 void sdhci_remove_host(struct sdhci_host *host, int dead)
1848 {
1849         unsigned long flags;
1850
1851         if (dead) {
1852                 spin_lock_irqsave(&host->lock, flags);
1853
1854                 host->flags |= SDHCI_DEVICE_DEAD;
1855
1856                 if (host->mrq) {
1857                         printk(KERN_ERR "%s: Controller removed during "
1858                                 " transfer!\n", mmc_hostname(host->mmc));
1859
1860                         host->mrq->cmd->error = -ENOMEDIUM;
1861                         tasklet_schedule(&host->finish_tasklet);
1862                 }
1863
1864                 spin_unlock_irqrestore(&host->lock, flags);
1865         }
1866
1867         sdhci_disable_card_detection(host);
1868
1869         mmc_remove_host(host->mmc);
1870
1871 #ifdef SDHCI_USE_LEDS_CLASS
1872         led_classdev_unregister(&host->led);
1873 #endif
1874
1875         if (!dead)
1876                 sdhci_reset(host, SDHCI_RESET_ALL);
1877
1878         free_irq(host->irq, host);
1879
1880         del_timer_sync(&host->timer);
1881
1882         tasklet_kill(&host->card_tasklet);
1883         tasklet_kill(&host->finish_tasklet);
1884
1885         kfree(host->adma_desc);
1886         kfree(host->align_buffer);
1887
1888         host->adma_desc = NULL;
1889         host->align_buffer = NULL;
1890 }
1891
1892 EXPORT_SYMBOL_GPL(sdhci_remove_host);
1893
1894 void sdhci_free_host(struct sdhci_host *host)
1895 {
1896         mmc_free_host(host->mmc);
1897 }
1898
1899 EXPORT_SYMBOL_GPL(sdhci_free_host);
1900
1901 /*****************************************************************************\
1902  *                                                                           *
1903  * Driver init/exit                                                          *
1904  *                                                                           *
1905 \*****************************************************************************/
1906
1907 static int __init sdhci_drv_init(void)
1908 {
1909         printk(KERN_INFO DRIVER_NAME
1910                 ": Secure Digital Host Controller Interface driver\n");
1911         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1912
1913         return 0;
1914 }
1915
1916 static void __exit sdhci_drv_exit(void)
1917 {
1918 }
1919
1920 module_init(sdhci_drv_init);
1921 module_exit(sdhci_drv_exit);
1922
1923 module_param(debug_quirks, uint, 0444);
1924
1925 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1926 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1927 MODULE_LICENSE("GPL");
1928
1929 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");