2 * linux/drivers/mmc/at91_mci.c - ATMEL AT91RM9200 MCI Driver
4 * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
6 * Copyright (C) 2006 Malcolm Noyes
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 This is the AT91RM9200 MCI driver that has been tested with both MMC cards
15 and SD-cards. Boards that support write protect are now supported.
16 The CCAT91SBC001 board does not support SD cards.
18 The three entry points are at91_mci_request, at91_mci_set_ios
22 This configures the device to put it into the correct mode and clock speed
26 MCI request processes the commands sent in the mmc_request structure. This
27 can consist of a processing command and a stop command in the case of
28 multiple block transfers.
30 There are three main types of request, commands, reads and writes.
32 Commands are straight forward. The command is submitted to the controller and
33 the request function returns. When the controller generates an interrupt to indicate
34 the command is finished, the response to the command are read and the mmc_request_done
35 function called to end the request.
37 Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
38 controller to manage the transfers.
40 A read is done from the controller directly to the scatterlist passed in from the request.
41 Due to a bug in the controller, when a read is completed, all the words are byte
42 swapped in the scatterlist buffers.
44 The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
46 A write is slightly different in that the bytes to write are read from the scatterlist
47 into a dma memory buffer (this is in case the source buffer should be read only). The
48 entire write buffer is then done from this single dma memory buffer.
50 The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
53 Gets the status of the write protect pin, if available.
56 #include <linux/module.h>
57 #include <linux/moduleparam.h>
58 #include <linux/init.h>
59 #include <linux/ioport.h>
60 #include <linux/platform_device.h>
61 #include <linux/interrupt.h>
62 #include <linux/blkdev.h>
63 #include <linux/delay.h>
64 #include <linux/err.h>
65 #include <linux/dma-mapping.h>
66 #include <linux/clk.h>
68 #include <linux/mmc/host.h>
69 #include <linux/mmc/protocol.h>
73 #include <asm/mach/mmc.h>
74 #include <asm/arch/board.h>
75 #include <asm/arch/gpio.h>
76 #include <asm/arch/at91_mci.h>
77 #include <asm/arch/at91_pdc.h>
79 #define DRIVER_NAME "at91_mci"
83 #define FL_SENT_COMMAND (1 << 0)
84 #define FL_SENT_STOP (1 << 1)
88 #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
89 #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
93 * Low level type for this driver
98 struct mmc_command *cmd;
99 struct mmc_request *request;
101 void __iomem *baseaddr;
104 struct at91_mmc_data *board;
110 * Flag indicating when the command has been sent. This is used to
111 * work out whether or not to send the stop
114 /* flag for current bus settings */
117 /* DMA buffer used for transmitting */
118 unsigned int* buffer;
119 dma_addr_t physical_address;
120 unsigned int total_length;
122 /* Latest in the scatterlist that has been enabled for transfer, but not freed */
125 /* Latest in the scatterlist that has been enabled for transfer */
130 * Copy from sg to a dma block - used for transfers
132 static inline void at91mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
134 unsigned int len, i, size;
135 unsigned *dmabuf = host->buffer;
137 size = host->total_length;
141 * Just loop through all entries. Size might not
142 * be the entire list though so make sure that
143 * we do not transfer too much.
145 for (i = 0; i < len; i++) {
146 struct scatterlist *sg;
149 unsigned int *sgbuffer;
153 sgbuffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset;
154 amount = min(size, sg->length);
158 for (index = 0; index < amount; index++)
159 *dmabuf++ = swab32(sgbuffer[index]);
161 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
168 * Check that we didn't get a request to transfer
169 * more data than can fit into the SG list.
177 static void at91mci_pre_dma_read(struct at91mci_host *host)
180 struct scatterlist *sg;
181 struct mmc_command *cmd;
182 struct mmc_data *data;
184 pr_debug("pre dma read\n");
188 pr_debug("no command\n");
194 pr_debug("no data\n");
198 for (i = 0; i < 2; i++) {
199 /* nothing left to transfer */
200 if (host->transfer_index >= data->sg_len) {
201 pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
205 /* Check to see if this needs filling */
207 if (at91_mci_read(host, AT91_PDC_RCR) != 0) {
208 pr_debug("Transfer active in current\n");
213 if (at91_mci_read(host, AT91_PDC_RNCR) != 0) {
214 pr_debug("Transfer active in next\n");
219 /* Setup the next transfer */
220 pr_debug("Using transfer index %d\n", host->transfer_index);
222 sg = &data->sg[host->transfer_index++];
223 pr_debug("sg = %p\n", sg);
225 sg->dma_address = dma_map_page(NULL, sg->page, sg->offset, sg->length, DMA_FROM_DEVICE);
227 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
230 at91_mci_write(host, AT91_PDC_RPR, sg->dma_address);
231 at91_mci_write(host, AT91_PDC_RCR, sg->length / 4);
234 at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address);
235 at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4);
239 pr_debug("pre dma read done\n");
243 * Handle after a dma read
245 static void at91mci_post_dma_read(struct at91mci_host *host)
247 struct mmc_command *cmd;
248 struct mmc_data *data;
250 pr_debug("post dma read\n");
254 pr_debug("no command\n");
260 pr_debug("no data\n");
264 while (host->in_use_index < host->transfer_index) {
265 unsigned int *buffer;
269 struct scatterlist *sg;
271 pr_debug("finishing index %d\n", host->in_use_index);
273 sg = &data->sg[host->in_use_index++];
275 pr_debug("Unmapping page %08X\n", sg->dma_address);
277 dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
279 /* Swap the contents of the buffer */
280 buffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset;
281 pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
283 data->bytes_xfered += sg->length;
285 len = sg->length / 4;
287 for (index = 0; index < len; index++) {
288 buffer[index] = swab32(buffer[index]);
290 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
291 flush_dcache_page(sg->page);
294 /* Is there another transfer to trigger? */
295 if (host->transfer_index < data->sg_len)
296 at91mci_pre_dma_read(host);
298 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
299 at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
302 pr_debug("post dma read done\n");
306 * Handle transmitted data
308 static void at91_mci_handle_transmitted(struct at91mci_host *host)
310 struct mmc_command *cmd;
311 struct mmc_data *data;
313 pr_debug("Handling the transmit\n");
315 /* Disable the transfer */
316 at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
318 /* Now wait for cmd ready */
319 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
320 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
328 data->bytes_xfered = host->total_length;
332 * Enable the controller
334 static void at91_mci_enable(struct at91mci_host *host)
336 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
337 at91_mci_write(host, AT91_MCI_IDR, 0xFFFFFFFF);
338 at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
339 at91_mci_write(host, AT91_MCI_MR, 0x834A);
340 at91_mci_write(host, AT91_MCI_SDCR, 0x0);
344 * Disable the controller
346 static void at91_mci_disable(struct at91mci_host *host)
348 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
353 * return the interrupts to enable
355 static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
357 unsigned int cmdr, mr;
358 unsigned int block_length;
359 struct mmc_data *data = cmd->data;
362 unsigned int ier = 0;
366 /* Not sure if this is needed */
368 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
369 pr_debug("Clearing timeout\n");
370 at91_mci_write(host, AT91_MCI_ARGR, 0);
371 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
372 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
374 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
380 if (mmc_resp_type(cmd) == MMC_RSP_NONE)
381 cmdr |= AT91_MCI_RSPTYP_NONE;
383 /* if a response is expected then allow maximum response latancy */
384 cmdr |= AT91_MCI_MAXLAT;
385 /* set 136 bit response for R2, 48 bit response otherwise */
386 if (mmc_resp_type(cmd) == MMC_RSP_R2)
387 cmdr |= AT91_MCI_RSPTYP_136;
389 cmdr |= AT91_MCI_RSPTYP_48;
393 block_length = data->blksz;
394 blocks = data->blocks;
396 /* always set data start - also set direction flag for read */
397 if (data->flags & MMC_DATA_READ)
398 cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
399 else if (data->flags & MMC_DATA_WRITE)
400 cmdr |= AT91_MCI_TRCMD_START;
402 if (data->flags & MMC_DATA_STREAM)
403 cmdr |= AT91_MCI_TRTYP_STREAM;
404 if (data->flags & MMC_DATA_MULTI)
405 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
412 if (cmd->opcode == MMC_STOP_TRANSMISSION)
413 cmdr |= AT91_MCI_TRCMD_STOP;
415 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
416 cmdr |= AT91_MCI_OPDCMD;
419 * Set the arguments and send the command
421 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n",
422 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
425 at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS);
426 at91_mci_write(host, AT91_PDC_RPR, 0);
427 at91_mci_write(host, AT91_PDC_RCR, 0);
428 at91_mci_write(host, AT91_PDC_RNPR, 0);
429 at91_mci_write(host, AT91_PDC_RNCR, 0);
430 at91_mci_write(host, AT91_PDC_TPR, 0);
431 at91_mci_write(host, AT91_PDC_TCR, 0);
432 at91_mci_write(host, AT91_PDC_TNPR, 0);
433 at91_mci_write(host, AT91_PDC_TNCR, 0);
435 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
436 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
437 return AT91_MCI_CMDRDY;
440 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
441 at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
444 * Disable the PDC controller
446 at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
448 if (cmdr & AT91_MCI_TRCMD_START) {
449 data->bytes_xfered = 0;
450 host->transfer_index = 0;
451 host->in_use_index = 0;
452 if (cmdr & AT91_MCI_TRDIR) {
457 host->total_length = 0;
459 at91mci_pre_dma_read(host);
460 ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
466 host->total_length = block_length * blocks;
467 host->buffer = dma_alloc_coherent(NULL,
469 &host->physical_address, GFP_KERNEL);
471 at91mci_sg_to_dma(host, data);
473 pr_debug("Transmitting %d bytes\n", host->total_length);
475 at91_mci_write(host, AT91_PDC_TPR, host->physical_address);
476 at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4);
477 ier = AT91_MCI_TXBUFE;
482 * Send the command and then enable the PDC - not the other way round as
483 * the data sheet says
486 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
487 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
489 if (cmdr & AT91_MCI_TRCMD_START) {
490 if (cmdr & AT91_MCI_TRDIR)
491 at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN);
493 at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN);
499 * Wait for a command to complete
501 static void at91mci_process_command(struct at91mci_host *host, struct mmc_command *cmd)
505 ier = at91_mci_send_command(host, cmd);
507 pr_debug("setting ier to %08X\n", ier);
509 /* Stop on errors or the required value */
510 at91_mci_write(host, AT91_MCI_IER, 0xffff0000 | ier);
514 * Process the next step in the request
516 static void at91mci_process_next(struct at91mci_host *host)
518 if (!(host->flags & FL_SENT_COMMAND)) {
519 host->flags |= FL_SENT_COMMAND;
520 at91mci_process_command(host, host->request->cmd);
522 else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
523 host->flags |= FL_SENT_STOP;
524 at91mci_process_command(host, host->request->stop);
527 mmc_request_done(host->mmc, host->request);
531 * Handle a command that has been completed
533 static void at91mci_completed_command(struct at91mci_host *host)
535 struct mmc_command *cmd = host->cmd;
538 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
540 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
541 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
542 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
543 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
546 dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
550 status = at91_mci_read(host, AT91_MCI_SR);
552 pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
553 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
555 if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE |
556 AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE |
557 AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) {
558 if ((status & AT91_MCI_RCRCE) &&
559 ((cmd->opcode == MMC_SEND_OP_COND) || (cmd->opcode == SD_APP_OP_COND))) {
560 cmd->error = MMC_ERR_NONE;
563 if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE))
564 cmd->error = MMC_ERR_TIMEOUT;
565 else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE))
566 cmd->error = MMC_ERR_BADCRC;
567 else if (status & (AT91_MCI_OVRE | AT91_MCI_UNRE))
568 cmd->error = MMC_ERR_FIFO;
570 cmd->error = MMC_ERR_FAILED;
572 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
573 cmd->error, cmd->opcode, cmd->retries);
577 cmd->error = MMC_ERR_NONE;
579 at91mci_process_next(host);
583 * Handle an MMC request
585 static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
587 struct at91mci_host *host = mmc_priv(mmc);
591 at91mci_process_next(host);
597 static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
600 struct at91mci_host *host = mmc_priv(mmc);
601 unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
603 host->bus_mode = ios->bus_mode;
605 if (ios->clock == 0) {
606 /* Disable the MCI controller */
607 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
611 /* Enable the MCI controller */
612 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
614 if ((at91_master_clock % (ios->clock * 2)) == 0)
615 clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
617 clkdiv = (at91_master_clock / ios->clock) / 2;
619 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
620 at91_master_clock / (2 * (clkdiv + 1)));
622 if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
623 pr_debug("MMC: Setting controller bus width to 4\n");
624 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
627 pr_debug("MMC: Setting controller bus width to 1\n");
628 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
631 /* Set the clock divider */
632 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
634 /* maybe switch power to the card */
635 if (host->board->vcc_pin) {
636 switch (ios->power_mode) {
638 at91_set_gpio_output(host->board->vcc_pin, 0);
642 at91_set_gpio_output(host->board->vcc_pin, 1);
649 * Handle an interrupt
651 static irqreturn_t at91_mci_irq(int irq, void *devid)
653 struct at91mci_host *host = devid;
656 unsigned int int_status;
658 int_status = at91_mci_read(host, AT91_MCI_SR);
659 pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(host, AT91_MCI_IMR),
660 int_status & at91_mci_read(host, AT91_MCI_IMR));
662 if ((int_status & at91_mci_read(host, AT91_MCI_IMR)) & 0xffff0000)
665 int_status &= at91_mci_read(host, AT91_MCI_IMR);
667 if (int_status & AT91_MCI_UNRE)
668 pr_debug("MMC: Underrun error\n");
669 if (int_status & AT91_MCI_OVRE)
670 pr_debug("MMC: Overrun error\n");
671 if (int_status & AT91_MCI_DTOE)
672 pr_debug("MMC: Data timeout\n");
673 if (int_status & AT91_MCI_DCRCE)
674 pr_debug("MMC: CRC error in data\n");
675 if (int_status & AT91_MCI_RTOE)
676 pr_debug("MMC: Response timeout\n");
677 if (int_status & AT91_MCI_RENDE)
678 pr_debug("MMC: Response end bit error\n");
679 if (int_status & AT91_MCI_RCRCE)
680 pr_debug("MMC: Response CRC error\n");
681 if (int_status & AT91_MCI_RDIRE)
682 pr_debug("MMC: Response direction error\n");
683 if (int_status & AT91_MCI_RINDE)
684 pr_debug("MMC: Response index error\n");
686 /* Only continue processing if no errors */
688 if (int_status & AT91_MCI_TXBUFE) {
689 pr_debug("TX buffer empty\n");
690 at91_mci_handle_transmitted(host);
693 if (int_status & AT91_MCI_RXBUFF) {
694 pr_debug("RX buffer full\n");
695 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
698 if (int_status & AT91_MCI_ENDTX) {
699 pr_debug("Transmit has ended\n");
702 if (int_status & AT91_MCI_ENDRX) {
703 pr_debug("Receive has ended\n");
704 at91mci_post_dma_read(host);
707 if (int_status & AT91_MCI_NOTBUSY) {
708 pr_debug("Card is ready\n");
709 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
712 if (int_status & AT91_MCI_DTIP) {
713 pr_debug("Data transfer in progress\n");
716 if (int_status & AT91_MCI_BLKE) {
717 pr_debug("Block transfer has ended\n");
720 if (int_status & AT91_MCI_TXRDY) {
721 pr_debug("Ready to transmit\n");
724 if (int_status & AT91_MCI_RXRDY) {
725 pr_debug("Ready to receive\n");
728 if (int_status & AT91_MCI_CMDRDY) {
729 pr_debug("Command ready\n");
733 at91_mci_write(host, AT91_MCI_IDR, int_status);
736 pr_debug("Completed command\n");
737 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
738 at91mci_completed_command(host);
744 static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
746 struct at91mci_host *host = _host;
747 int present = !at91_get_gpio_value(irq);
750 * we expect this irq on both insert and remove,
751 * and use a short delay to debounce.
753 if (present != host->present) {
754 host->present = present;
755 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
756 present ? "insert" : "remove");
758 pr_debug("****** Resetting SD-card bus width ******\n");
759 at91_mci_write(host, AT91_MCI_SDCR, 0);
761 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
766 int at91_mci_get_ro(struct mmc_host *mmc)
769 struct at91mci_host *host = mmc_priv(mmc);
771 if (host->board->wp_pin) {
772 read_only = at91_get_gpio_value(host->board->wp_pin);
773 printk(KERN_WARNING "%s: card is %s\n", mmc_hostname(mmc),
774 (read_only ? "read-only" : "read-write") );
777 printk(KERN_WARNING "%s: host does not support reading read-only "
778 "switch. Assuming write-enable.\n", mmc_hostname(mmc));
783 static const struct mmc_host_ops at91_mci_ops = {
784 .request = at91_mci_request,
785 .set_ios = at91_mci_set_ios,
786 .get_ro = at91_mci_get_ro,
790 * Probe for the device
792 static int at91_mci_probe(struct platform_device *pdev)
794 struct mmc_host *mmc;
795 struct at91mci_host *host;
796 struct resource *res;
799 pr_debug("Probe MCI devices\n");
801 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
805 if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
808 mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
810 pr_debug("Failed to allocate mmc host\n");
811 release_mem_region(res->start, res->end - res->start + 1);
815 mmc->ops = &at91_mci_ops;
817 mmc->f_max = 25000000;
818 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
819 mmc->caps = MMC_CAP_BYTEBLOCK;
821 host = mmc_priv(mmc);
825 host->board = pdev->dev.platform_data;
826 if (host->board->wire4) {
828 mmc->caps |= MMC_CAP_4_BIT_DATA;
830 printk("MMC: 4 wire bus mode not supported by this driver - using 1 wire\n");
837 host->mci_clk = clk_get(&pdev->dev, "mci_clk");
838 if (IS_ERR(host->mci_clk)) {
839 printk(KERN_ERR "AT91 MMC: no clock defined.\n");
841 release_mem_region(res->start, res->end - res->start + 1);
848 host->baseaddr = ioremap(res->start, res->end - res->start + 1);
849 if (!host->baseaddr) {
850 clk_put(host->mci_clk);
852 release_mem_region(res->start, res->end - res->start + 1);
859 clk_enable(host->mci_clk); /* Enable the peripheral clock */
860 at91_mci_disable(host);
861 at91_mci_enable(host);
864 * Allocate the MCI interrupt
866 host->irq = platform_get_irq(pdev, 0);
867 ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
869 printk(KERN_ERR "Failed to request MCI interrupt\n");
870 clk_disable(host->mci_clk);
871 clk_put(host->mci_clk);
873 iounmap(host->baseaddr);
874 release_mem_region(res->start, res->end - res->start + 1);
878 platform_set_drvdata(pdev, mmc);
881 * Add host to MMC layer
883 if (host->board->det_pin)
884 host->present = !at91_get_gpio_value(host->board->det_pin);
891 * monitor card insertion/removal if we can
893 if (host->board->det_pin) {
894 ret = request_irq(host->board->det_pin, at91_mmc_det_irq,
895 0, DRIVER_NAME, host);
897 printk(KERN_ERR "couldn't allocate MMC detect irq\n");
900 pr_debug(KERN_INFO "Added MCI driver\n");
908 static int at91_mci_remove(struct platform_device *pdev)
910 struct mmc_host *mmc = platform_get_drvdata(pdev);
911 struct at91mci_host *host;
912 struct resource *res;
917 host = mmc_priv(mmc);
919 if (host->present != -1) {
920 free_irq(host->board->det_pin, host);
921 cancel_delayed_work(&host->mmc->detect);
924 at91_mci_disable(host);
925 mmc_remove_host(mmc);
926 free_irq(host->irq, host);
928 clk_disable(host->mci_clk); /* Disable the peripheral clock */
929 clk_put(host->mci_clk);
931 iounmap(host->baseaddr);
932 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
933 release_mem_region(res->start, res->end - res->start + 1);
936 platform_set_drvdata(pdev, NULL);
937 pr_debug("MCI Removed\n");
943 static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
945 struct mmc_host *mmc = platform_get_drvdata(pdev);
949 ret = mmc_suspend_host(mmc, state);
954 static int at91_mci_resume(struct platform_device *pdev)
956 struct mmc_host *mmc = platform_get_drvdata(pdev);
960 ret = mmc_resume_host(mmc);
965 #define at91_mci_suspend NULL
966 #define at91_mci_resume NULL
969 static struct platform_driver at91_mci_driver = {
970 .probe = at91_mci_probe,
971 .remove = at91_mci_remove,
972 .suspend = at91_mci_suspend,
973 .resume = at91_mci_resume,
976 .owner = THIS_MODULE,
980 static int __init at91_mci_init(void)
982 return platform_driver_register(&at91_mci_driver);
985 static void __exit at91_mci_exit(void)
987 platform_driver_unregister(&at91_mci_driver);
990 module_init(at91_mci_init);
991 module_exit(at91_mci_exit);
993 MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
994 MODULE_AUTHOR("Nick Randell");
995 MODULE_LICENSE("GPL");