4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 * Based on ov7670 and soc_camera_platform driver,
9 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
10 * Copyright (C) 2008 Magnus Damm
11 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/i2c.h>
21 #include <linux/slab.h>
22 #include <linux/delay.h>
23 #include <linux/videodev2.h>
24 #include <media/v4l2-chip-ident.h>
25 #include <media/v4l2-common.h>
26 #include <media/soc_camera.h>
27 #include <media/ov772x.h>
32 #define GAIN 0x00 /* AGC - Gain control gain setting */
33 #define BLUE 0x01 /* AWB - Blue channel gain setting */
34 #define RED 0x02 /* AWB - Red channel gain setting */
35 #define GREEN 0x03 /* AWB - Green channel gain setting */
36 #define COM1 0x04 /* Common control 1 */
37 #define BAVG 0x05 /* U/B Average Level */
38 #define GAVG 0x06 /* Y/Gb Average Level */
39 #define RAVG 0x07 /* V/R Average Level */
40 #define AECH 0x08 /* Exposure Value - AEC MSBs */
41 #define COM2 0x09 /* Common control 2 */
42 #define PID 0x0A /* Product ID Number MSB */
43 #define VER 0x0B /* Product ID Number LSB */
44 #define COM3 0x0C /* Common control 3 */
45 #define COM4 0x0D /* Common control 4 */
46 #define COM5 0x0E /* Common control 5 */
47 #define COM6 0x0F /* Common control 6 */
48 #define AEC 0x10 /* Exposure Value */
49 #define CLKRC 0x11 /* Internal clock */
50 #define COM7 0x12 /* Common control 7 */
51 #define COM8 0x13 /* Common control 8 */
52 #define COM9 0x14 /* Common control 9 */
53 #define COM10 0x15 /* Common control 10 */
54 #define HSTART 0x17 /* Horizontal sensor size */
55 #define HSIZE 0x18 /* Horizontal frame (HREF column) end high 8-bit */
56 #define VSTART 0x19 /* Vertical frame (row) start high 8-bit */
57 #define VSIZE 0x1A /* Vertical sensor size */
58 #define PSHFT 0x1B /* Data format - pixel delay select */
59 #define MIDH 0x1C /* Manufacturer ID byte - high */
60 #define MIDL 0x1D /* Manufacturer ID byte - low */
61 #define LAEC 0x1F /* Fine AEC value */
62 #define COM11 0x20 /* Common control 11 */
63 #define BDBASE 0x22 /* Banding filter Minimum AEC value */
64 #define DBSTEP 0x23 /* Banding filter Maximum Setp */
65 #define AEW 0x24 /* AGC/AEC - Stable operating region (upper limit) */
66 #define AEB 0x25 /* AGC/AEC - Stable operating region (lower limit) */
67 #define VPT 0x26 /* AGC/AEC Fast mode operating region */
68 #define HOUTSIZE 0x29 /* Horizontal data output size MSBs */
69 #define EXHCH 0x2A /* Dummy pixel insert MSB */
70 #define EXHCL 0x2B /* Dummy pixel insert LSB */
71 #define VOUTSIZE 0x2C /* Vertical data output size MSBs */
72 #define ADVFL 0x2D /* LSB of insert dummy lines in Vertical direction */
73 #define ADVFH 0x2E /* MSG of insert dummy lines in Vertical direction */
74 #define YAVE 0x2F /* Y/G Channel Average value */
75 #define LUMHTH 0x30 /* Histogram AEC/AGC Luminance high level threshold */
76 #define LUMLTH 0x31 /* Histogram AEC/AGC Luminance low level threshold */
77 #define HREF 0x32 /* Image start and size control */
78 #define DM_LNL 0x33 /* Dummy line low 8 bits */
79 #define DM_LNH 0x34 /* Dummy line high 8 bits */
80 #define ADOFF_B 0x35 /* AD offset compensation value for B channel */
81 #define ADOFF_R 0x36 /* AD offset compensation value for R channel */
82 #define ADOFF_GB 0x37 /* AD offset compensation value for Gb channel */
83 #define ADOFF_GR 0x38 /* AD offset compensation value for Gr channel */
84 #define OFF_B 0x39 /* Analog process B channel offset value */
85 #define OFF_R 0x3A /* Analog process R channel offset value */
86 #define OFF_GB 0x3B /* Analog process Gb channel offset value */
87 #define OFF_GR 0x3C /* Analog process Gr channel offset value */
88 #define COM12 0x3D /* Common control 12 */
89 #define COM13 0x3E /* Common control 13 */
90 #define COM14 0x3F /* Common control 14 */
91 #define COM15 0x40 /* Common control 15*/
92 #define COM16 0x41 /* Common control 16 */
93 #define TGT_B 0x42 /* BLC blue channel target value */
94 #define TGT_R 0x43 /* BLC red channel target value */
95 #define TGT_GB 0x44 /* BLC Gb channel target value */
96 #define TGT_GR 0x45 /* BLC Gr channel target value */
97 #define LCC0 0x46 /* Lens correction control 0 */
98 #define LCC1 0x47 /* Lens correction option 1 - X coordinate */
99 #define LCC2 0x48 /* Lens correction option 2 - Y coordinate */
100 #define LCC3 0x49 /* Lens correction option 3 */
101 #define LCC4 0x4A /* Lens correction option 4 - radius of the circular */
102 #define LCC5 0x4B /* Lens correction option 5 */
103 #define LCC6 0x4C /* Lens correction option 6 */
104 #define FIXGAIN 0x4D /* Analog fix gain amplifer */
105 #define AREF0 0x4E /* Sensor reference control */
106 #define AREF1 0x4F /* Sensor reference current control */
107 #define AREF2 0x50 /* Analog reference control */
108 #define AREF3 0x51 /* ADC reference control */
109 #define AREF4 0x52 /* ADC reference control */
110 #define AREF5 0x53 /* ADC reference control */
111 #define AREF6 0x54 /* Analog reference control */
112 #define AREF7 0x55 /* Analog reference control */
113 #define UFIX 0x60 /* U channel fixed value output */
114 #define VFIX 0x61 /* V channel fixed value output */
115 #define AWBB_BLK 0x62 /* AWB option for advanced AWB */
116 #define AWB_CTRL0 0x63 /* AWB control byte 0 */
117 #define DSP_CTRL1 0x64 /* DSP control byte 1 */
118 #define DSP_CTRL2 0x65 /* DSP control byte 2 */
119 #define DSP_CTRL3 0x66 /* DSP control byte 3 */
120 #define DSP_CTRL4 0x67 /* DSP control byte 4 */
121 #define AWB_BIAS 0x68 /* AWB BLC level clip */
122 #define AWB_CTRL1 0x69 /* AWB control 1 */
123 #define AWB_CTRL2 0x6A /* AWB control 2 */
124 #define AWB_CTRL3 0x6B /* AWB control 3 */
125 #define AWB_CTRL4 0x6C /* AWB control 4 */
126 #define AWB_CTRL5 0x6D /* AWB control 5 */
127 #define AWB_CTRL6 0x6E /* AWB control 6 */
128 #define AWB_CTRL7 0x6F /* AWB control 7 */
129 #define AWB_CTRL8 0x70 /* AWB control 8 */
130 #define AWB_CTRL9 0x71 /* AWB control 9 */
131 #define AWB_CTRL10 0x72 /* AWB control 10 */
132 #define AWB_CTRL11 0x73 /* AWB control 11 */
133 #define AWB_CTRL12 0x74 /* AWB control 12 */
134 #define AWB_CTRL13 0x75 /* AWB control 13 */
135 #define AWB_CTRL14 0x76 /* AWB control 14 */
136 #define AWB_CTRL15 0x77 /* AWB control 15 */
137 #define AWB_CTRL16 0x78 /* AWB control 16 */
138 #define AWB_CTRL17 0x79 /* AWB control 17 */
139 #define AWB_CTRL18 0x7A /* AWB control 18 */
140 #define AWB_CTRL19 0x7B /* AWB control 19 */
141 #define AWB_CTRL20 0x7C /* AWB control 20 */
142 #define AWB_CTRL21 0x7D /* AWB control 21 */
143 #define GAM1 0x7E /* Gamma Curve 1st segment input end point */
144 #define GAM2 0x7F /* Gamma Curve 2nd segment input end point */
145 #define GAM3 0x80 /* Gamma Curve 3rd segment input end point */
146 #define GAM4 0x81 /* Gamma Curve 4th segment input end point */
147 #define GAM5 0x82 /* Gamma Curve 5th segment input end point */
148 #define GAM6 0x83 /* Gamma Curve 6th segment input end point */
149 #define GAM7 0x84 /* Gamma Curve 7th segment input end point */
150 #define GAM8 0x85 /* Gamma Curve 8th segment input end point */
151 #define GAM9 0x86 /* Gamma Curve 9th segment input end point */
152 #define GAM10 0x87 /* Gamma Curve 10th segment input end point */
153 #define GAM11 0x88 /* Gamma Curve 11th segment input end point */
154 #define GAM12 0x89 /* Gamma Curve 12th segment input end point */
155 #define GAM13 0x8A /* Gamma Curve 13th segment input end point */
156 #define GAM14 0x8B /* Gamma Curve 14th segment input end point */
157 #define GAM15 0x8C /* Gamma Curve 15th segment input end point */
158 #define SLOP 0x8D /* Gamma curve highest segment slope */
159 #define DNSTH 0x8E /* De-noise threshold */
160 #define EDGE0 0x8F /* Edge enhancement control 0 */
161 #define EDGE1 0x90 /* Edge enhancement control 1 */
162 #define DNSOFF 0x91 /* Auto De-noise threshold control */
163 #define EDGE2 0x92 /* Edge enhancement strength low point control */
164 #define EDGE3 0x93 /* Edge enhancement strength high point control */
165 #define MTX1 0x94 /* Matrix coefficient 1 */
166 #define MTX2 0x95 /* Matrix coefficient 2 */
167 #define MTX3 0x96 /* Matrix coefficient 3 */
168 #define MTX4 0x97 /* Matrix coefficient 4 */
169 #define MTX5 0x98 /* Matrix coefficient 5 */
170 #define MTX6 0x99 /* Matrix coefficient 6 */
171 #define MTX_CTRL 0x9A /* Matrix control */
172 #define BRIGHT 0x9B /* Brightness control */
173 #define CNTRST 0x9C /* Contrast contrast */
174 #define CNTRST_CTRL 0x9D /* Contrast contrast center */
175 #define UVAD_J0 0x9E /* Auto UV adjust contrast 0 */
176 #define UVAD_J1 0x9F /* Auto UV adjust contrast 1 */
177 #define SCAL0 0xA0 /* Scaling control 0 */
178 #define SCAL1 0xA1 /* Scaling control 1 */
179 #define SCAL2 0xA2 /* Scaling control 2 */
180 #define FIFODLYM 0xA3 /* FIFO manual mode delay control */
181 #define FIFODLYA 0xA4 /* FIFO auto mode delay control */
182 #define SDE 0xA6 /* Special digital effect control */
183 #define USAT 0xA7 /* U component saturation control */
184 #define VSAT 0xA8 /* V component saturation control */
185 #define HUE0 0xA9 /* Hue control 0 */
186 #define HUE1 0xAA /* Hue control 1 */
187 #define SIGN 0xAB /* Sign bit for Hue and contrast */
188 #define DSPAUTO 0xAC /* DSP auto function ON/OFF control */
195 #define SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
196 /* Output drive capability */
197 #define OCAP_1x 0x00 /* 1x */
198 #define OCAP_2x 0x01 /* 2x */
199 #define OCAP_3x 0x02 /* 3x */
200 #define OCAP_4x 0x03 /* 4x */
203 #define SWAP_MASK 0x38
205 #define VFIMG_ON_OFF 0x80 /* Vertical flip image ON/OFF selection */
206 #define HMIMG_ON_OFF 0x40 /* Horizontal mirror image ON/OFF selection */
207 #define SWAP_RGB 0x20 /* Swap B/R output sequence in RGB mode */
208 #define SWAP_YUV 0x10 /* Swap Y/UV output sequence in YUV mode */
209 #define SWAP_ML 0x08 /* Swap output MSB/LSB */
210 /* Tri-state option for output clock */
211 #define NOTRI_CLOCK 0x04 /* 0: Tri-state at this period */
212 /* 1: No tri-state at this period */
213 /* Tri-state option for output data */
214 #define NOTRI_DATA 0x02 /* 0: Tri-state at this period */
215 /* 1: No tri-state at this period */
216 #define SCOLOR_TEST 0x01 /* Sensor color bar test pattern */
219 /* PLL frequency control */
220 #define PLL_BYPASS 0x00 /* 00: Bypass PLL */
221 #define PLL_4x 0x40 /* 01: PLL 4x */
222 #define PLL_6x 0x80 /* 10: PLL 6x */
223 #define PLL_8x 0xc0 /* 11: PLL 8x */
224 /* AEC evaluate window */
225 #define AEC_FULL 0x00 /* 00: Full window */
226 #define AEC_1p2 0x10 /* 01: 1/2 window */
227 #define AEC_1p4 0x20 /* 10: 1/4 window */
228 #define AEC_2p3 0x30 /* 11: Low 2/3 window */
231 #define AFR_ON_OFF 0x80 /* Auto frame rate control ON/OFF selection */
232 #define AFR_SPPED 0x40 /* Auto frame rate control speed slection */
233 /* Auto frame rate max rate control */
234 #define AFR_NO_RATE 0x00 /* No reduction of frame rate */
235 #define AFR_1p2 0x10 /* Max reduction to 1/2 frame rate */
236 #define AFR_1p4 0x20 /* Max reduction to 1/4 frame rate */
237 #define AFR_1p8 0x30 /* Max reduction to 1/8 frame rate */
238 /* Auto frame rate active point control */
239 #define AF_2x 0x00 /* Add frame when AGC reaches 2x gain */
240 #define AF_4x 0x04 /* Add frame when AGC reaches 4x gain */
241 #define AF_8x 0x08 /* Add frame when AGC reaches 8x gain */
242 #define AF_16x 0x0c /* Add frame when AGC reaches 16x gain */
243 /* AEC max step control */
244 #define AEC_NO_LIMIT 0x01 /* 0 : AEC incease step has limit */
245 /* 1 : No limit to AEC increase step */
248 /* SCCB Register Reset */
249 #define SCCB_RESET 0x80 /* 0 : No change */
250 /* 1 : Resets all registers to default */
251 /* Resolution selection */
252 #define SLCT_MASK 0x40 /* Mask of VGA or QVGA */
253 #define SLCT_VGA 0x00 /* 0 : VGA */
254 #define SLCT_QVGA 0x40 /* 1 : QVGA */
255 #define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */
256 /* RGB output format control */
257 #define FMT_GBR422 0x00 /* 00 : GBR 4:2:2 */
258 #define FMT_RGB565 0x04 /* 01 : RGB 565 */
259 #define FMT_RGB555 0x08 /* 10 : RGB 555 */
260 #define FMT_RGB444 0x0c /* 11 : RGB 444 */
261 /* Output format control */
262 #define OFMT_YUV 0x00 /* 00 : YUV */
263 #define OFMT_P_BRAW 0x01 /* 01 : Processed Bayer RAW */
264 #define OFMT_RGB 0x02 /* 10 : RGB */
265 #define OFMT_BRAW 0x03 /* 11 : Bayer RAW */
268 #define FAST_ALGO 0x80 /* Enable fast AGC/AEC algorithm */
269 /* AEC Setp size limit */
270 #define UNLMT_STEP 0x40 /* 0 : Step size is limited */
271 /* 1 : Unlimited step size */
272 #define BNDF_ON_OFF 0x20 /* Banding filter ON/OFF */
273 #define AEC_BND 0x10 /* Enable AEC below banding value */
274 #define AEC_ON_OFF 0x08 /* Fine AEC ON/OFF control */
275 #define AGC_ON 0x04 /* AGC Enable */
276 #define AWB_ON 0x02 /* AWB Enable */
277 #define AEC_ON 0x01 /* AEC Enable */
280 #define BASE_AECAGC 0x80 /* Histogram or average based AEC/AGC */
281 /* Automatic gain ceiling - maximum AGC value */
282 #define GAIN_2x 0x00 /* 000 : 2x */
283 #define GAIN_4x 0x10 /* 001 : 4x */
284 #define GAIN_8x 0x20 /* 010 : 8x */
285 #define GAIN_16x 0x30 /* 011 : 16x */
286 #define GAIN_32x 0x40 /* 100 : 32x */
287 #define GAIN_64x 0x50 /* 101 : 64x */
288 #define GAIN_128x 0x60 /* 110 : 128x */
289 #define DROP_VSYNC 0x04 /* Drop VSYNC output of corrupt frame */
290 #define DROP_HREF 0x02 /* Drop HREF output of corrupt frame */
293 #define SGLF_ON_OFF 0x02 /* Single frame ON/OFF selection */
294 #define SGLF_TRIG 0x01 /* Single frame transfer trigger */
297 #define VSIZE_LSB 0x04 /* Vertical data output size LSB */
300 #define FIFO_ON 0x80 /* FIFO enable/disable selection */
301 #define UV_ON_OFF 0x40 /* UV adjust function ON/OFF selection */
302 #define YUV444_2_422 0x20 /* YUV444 to 422 UV channel option selection */
303 #define CLR_MTRX_ON_OFF 0x10 /* Color matrix ON/OFF selection */
304 #define INTPLT_ON_OFF 0x08 /* Interpolation ON/OFF selection */
305 #define GMM_ON_OFF 0x04 /* Gamma function ON/OFF selection */
306 #define AUTO_BLK_ON_OFF 0x02 /* Black defect auto correction ON/OFF */
307 #define AUTO_WHT_ON_OFF 0x01 /* White define auto correction ON/OFF */
310 #define UV_MASK 0x80 /* UV output sequence option */
311 #define UV_ON 0x80 /* ON */
312 #define UV_OFF 0x00 /* OFF */
313 #define CBAR_MASK 0x20 /* DSP Color bar mask */
314 #define CBAR_ON 0x20 /* ON */
315 #define CBAR_OFF 0x00 /* OFF */
319 #define HST_QVGA 0x3F
323 #define HSZ_QVGA 0x50
327 #define VST_QVGA 0x03
331 #define VSZ_QVGA 0x78
334 #define HOSZ_VGA 0xA0
335 #define HOSZ_QVGA 0x50
338 #define VOSZ_VGA 0xF0
339 #define VOSZ_QVGA 0x78
342 * bit configure (32 bit)
343 * this is used in struct ov772x_color_format :: option
345 #define OP_UV 0x00000001
346 #define OP_SWAP_RGB 0x00000002
351 #define OV7720 0x7720
352 #define VERSION(pid, ver) ((pid<<8)|(ver&0xFF))
358 unsigned char reg_num;
362 struct ov772x_color_format {
365 const struct regval_list *regs;
369 struct ov772x_win_size {
373 unsigned char com7_bit;
374 const struct regval_list *regs;
378 struct ov772x_camera_info *info;
379 struct i2c_client *client;
380 struct soc_camera_device icd;
381 const struct ov772x_color_format *fmt;
382 const struct ov772x_win_size *win;
386 #define ENDMARKER { 0xff, 0xff }
389 * register setting for color format
391 static const struct regval_list ov772x_RGB555_regs[] = {
393 { COM7, FMT_RGB555 | OFMT_RGB },
397 static const struct regval_list ov772x_RGB565_regs[] = {
399 { COM7, FMT_RGB565 | OFMT_RGB },
403 static const struct regval_list ov772x_YYUV_regs[] = {
409 static const struct regval_list ov772x_UVYY_regs[] = {
417 * register setting for window size
419 static const struct regval_list ov772x_qvga_regs[] = {
420 { HSTART, HST_QVGA },
422 { VSTART, VST_QVGA },
424 { HOUTSIZE, HOSZ_QVGA },
425 { VOUTSIZE, VOSZ_QVGA },
429 static const struct regval_list ov772x_vga_regs[] = {
434 { HOUTSIZE, HOSZ_VGA },
435 { VOUTSIZE, VOSZ_VGA },
440 * supported format list
443 #define SETFOURCC(type) .name = (#type), .fourcc = (V4L2_PIX_FMT_ ## type)
444 static const struct soc_camera_data_format ov772x_fmt_lists[] = {
448 .colorspace = V4L2_COLORSPACE_JPEG,
453 .colorspace = V4L2_COLORSPACE_JPEG,
458 .colorspace = V4L2_COLORSPACE_JPEG,
463 .colorspace = V4L2_COLORSPACE_SRGB,
468 .colorspace = V4L2_COLORSPACE_SRGB,
473 .colorspace = V4L2_COLORSPACE_SRGB,
478 .colorspace = V4L2_COLORSPACE_SRGB,
486 static const struct ov772x_color_format ov772x_cfmts[] = {
489 .regs = ov772x_YYUV_regs,
493 .regs = ov772x_YYUV_regs,
498 .regs = ov772x_UVYY_regs,
502 .regs = ov772x_RGB555_regs,
503 .option = OP_SWAP_RGB,
507 .regs = ov772x_RGB555_regs,
511 .regs = ov772x_RGB565_regs,
512 .option = OP_SWAP_RGB,
516 .regs = ov772x_RGB565_regs,
524 #define VGA_WIDTH 640
525 #define VGA_HEIGHT 480
526 #define QVGA_WIDTH 320
527 #define QVGA_HEIGHT 240
528 #define MAX_WIDTH VGA_WIDTH
529 #define MAX_HEIGHT VGA_HEIGHT
531 static const struct ov772x_win_size ov772x_win_vga = {
534 .height = VGA_HEIGHT,
535 .com7_bit = SLCT_VGA,
536 .regs = ov772x_vga_regs,
539 static const struct ov772x_win_size ov772x_win_qvga = {
542 .height = QVGA_HEIGHT,
543 .com7_bit = SLCT_QVGA,
544 .regs = ov772x_qvga_regs,
552 static int ov772x_write_array(struct i2c_client *client,
553 const struct regval_list *vals)
555 while (vals->reg_num != 0xff) {
556 int ret = i2c_smbus_write_byte_data(client,
566 static int ov772x_mask_set(struct i2c_client *client,
571 s32 val = i2c_smbus_read_byte_data(client, command);
575 return i2c_smbus_write_byte_data(client, command, val);
578 static int ov772x_reset(struct i2c_client *client)
580 int ret = i2c_smbus_write_byte_data(client, COM7, SCCB_RESET);
586 * soc_camera_ops function
589 static int ov772x_init(struct soc_camera_device *icd)
591 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
594 if (priv->info->link.power) {
595 ret = priv->info->link.power(&priv->client->dev, 1);
600 if (priv->info->link.reset)
601 ret = priv->info->link.reset(&priv->client->dev);
606 static int ov772x_release(struct soc_camera_device *icd)
608 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
611 if (priv->info->link.power)
612 ret = priv->info->link.power(&priv->client->dev, 0);
617 static int ov772x_start_capture(struct soc_camera_device *icd)
619 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
624 priv->win = &ov772x_win_vga;
626 priv->fmt = &ov772x_cfmts[T_YUYV];
631 ov772x_reset(priv->client);
636 ret = ov772x_write_array(priv->client, priv->fmt->regs);
643 ret = ov772x_write_array(priv->client, priv->win->regs);
648 * set COM7 bit ( QVGA or VGA )
650 ret = ov772x_mask_set(priv->client,
651 COM7, SLCT_MASK, priv->win->com7_bit);
658 if (priv->fmt->option & OP_UV) {
659 ret = ov772x_mask_set(priv->client,
660 DSP_CTRL3, UV_MASK, UV_ON);
668 if (priv->fmt->option & OP_SWAP_RGB) {
669 ret = ov772x_mask_set(priv->client,
670 COM3, SWAP_MASK, SWAP_RGB);
676 "format %s, win %s\n", priv->fmt->name, priv->win->name);
685 static int ov772x_stop_capture(struct soc_camera_device *icd)
687 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
688 ov772x_reset(priv->client);
692 static int ov772x_set_bus_param(struct soc_camera_device *icd,
698 static unsigned long ov772x_query_bus_param(struct soc_camera_device *icd)
700 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
702 return SOCAM_PCLK_SAMPLE_RISING |
703 SOCAM_HSYNC_ACTIVE_HIGH |
704 SOCAM_VSYNC_ACTIVE_HIGH |
706 priv->info->buswidth;
709 static int ov772x_get_chip_id(struct soc_camera_device *icd,
710 struct v4l2_chip_ident *id)
712 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
714 id->ident = priv->model;
720 #ifdef CONFIG_VIDEO_ADV_DEBUG
721 static int ov772x_get_register(struct soc_camera_device *icd,
722 struct v4l2_register *reg)
724 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
730 ret = i2c_smbus_read_byte_data(priv->client, reg->reg);
734 reg->val = (__u64)ret;
739 static int ov772x_set_register(struct soc_camera_device *icd,
740 struct v4l2_register *reg)
742 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
744 if (reg->reg > 0xff ||
748 return i2c_smbus_write_byte_data(priv->client, reg->reg, reg->val);
752 static int ov772x_set_fmt(struct soc_camera_device *icd,
754 struct v4l2_rect *rect)
756 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
764 for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++) {
765 if (pixfmt == ov772x_cfmts[i].fourcc) {
766 priv->fmt = ov772x_cfmts + i;
775 static int ov772x_try_fmt(struct soc_camera_device *icd,
776 struct v4l2_format *f)
778 struct v4l2_pix_format *pix = &f->fmt.pix;
779 struct ov772x_priv *priv;
781 priv = container_of(icd, struct ov772x_priv, icd);
784 if (pix->width <= ov772x_win_qvga.width ||
785 pix->height <= ov772x_win_qvga.height) {
786 priv->win = &ov772x_win_qvga;
787 pix->width = ov772x_win_qvga.width;
788 pix->height = ov772x_win_qvga.height;
792 else if (pix->width <= ov772x_win_vga.width ||
793 pix->height <= ov772x_win_vga.height) {
794 priv->win = &ov772x_win_vga;
795 pix->width = ov772x_win_vga.width;
796 pix->height = ov772x_win_vga.height;
799 pix->field = V4L2_FIELD_NONE;
804 static int ov772x_video_probe(struct soc_camera_device *icd)
806 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
811 * We must have a parent by now. And it cannot be a wrong one.
812 * So this entire test is completely redundant.
814 if (!icd->dev.parent ||
815 to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
819 * ov772x only use 8 or 10 bit bus width
821 if (SOCAM_DATAWIDTH_10 != priv->info->buswidth &&
822 SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
823 dev_err(&icd->dev, "bus width error\n");
827 icd->formats = ov772x_fmt_lists;
828 icd->num_formats = ARRAY_SIZE(ov772x_fmt_lists);
831 * check and show product ID and manufacturer ID
833 pid = i2c_smbus_read_byte_data(priv->client, PID);
834 ver = i2c_smbus_read_byte_data(priv->client, VER);
836 switch (VERSION(pid, ver)) {
839 priv->model = V4L2_IDENT_OV7720;
843 "Product ID error %x:%x\n", pid, ver);
848 "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
852 i2c_smbus_read_byte_data(priv->client, MIDH),
853 i2c_smbus_read_byte_data(priv->client, MIDL));
856 return soc_camera_video_start(icd);
859 static void ov772x_video_remove(struct soc_camera_device *icd)
861 soc_camera_video_stop(icd);
864 static struct soc_camera_ops ov772x_ops = {
865 .owner = THIS_MODULE,
866 .probe = ov772x_video_probe,
867 .remove = ov772x_video_remove,
869 .release = ov772x_release,
870 .start_capture = ov772x_start_capture,
871 .stop_capture = ov772x_stop_capture,
872 .set_fmt = ov772x_set_fmt,
873 .try_fmt = ov772x_try_fmt,
874 .set_bus_param = ov772x_set_bus_param,
875 .query_bus_param = ov772x_query_bus_param,
876 .get_chip_id = ov772x_get_chip_id,
877 #ifdef CONFIG_VIDEO_ADV_DEBUG
878 .get_register = ov772x_get_register,
879 .set_register = ov772x_set_register,
884 * i2c_driver function
887 static int ov772x_probe(struct i2c_client *client,
888 const struct i2c_device_id *did)
890 struct ov772x_priv *priv;
891 struct ov772x_camera_info *info;
892 struct soc_camera_device *icd;
893 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
896 info = client->dev.platform_data;
900 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
901 dev_err(&adapter->dev,
902 "I2C-Adapter doesn't support "
903 "I2C_FUNC_SMBUS_BYTE_DATA\n");
907 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
912 priv->client = client;
913 i2c_set_clientdata(client, priv);
916 icd->ops = &ov772x_ops;
917 icd->control = &client->dev;
918 icd->width_max = MAX_WIDTH;
919 icd->height_max = MAX_HEIGHT;
920 icd->iface = priv->info->link.bus_id;
922 ret = soc_camera_device_register(icd);
930 static int ov772x_remove(struct i2c_client *client)
932 struct ov772x_priv *priv = i2c_get_clientdata(client);
934 soc_camera_device_unregister(&priv->icd);
939 static const struct i2c_device_id ov772x_id[] = {
943 MODULE_DEVICE_TABLE(i2c, ov772x_id);
945 static struct i2c_driver ov772x_i2c_driver = {
949 .probe = ov772x_probe,
950 .remove = ov772x_remove,
951 .id_table = ov772x_id,
958 static int __init ov772x_module_init(void)
960 return i2c_add_driver(&ov772x_i2c_driver);
963 static void __exit ov772x_module_exit(void)
965 i2c_del_driver(&ov772x_i2c_driver);
968 module_init(ov772x_module_init);
969 module_exit(ov772x_module_exit);
971 MODULE_DESCRIPTION("SoC Camera driver for ov772x");
972 MODULE_AUTHOR("Kuninori Morimoto");
973 MODULE_LICENSE("GPL v2");