drivers/media/dvb/frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com)
   5  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   6  *    and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com)
   7  *
   8  *    This program is free software; you can redistribute it and/or modify
   9  *    it under the terms of the GNU General Public License as published by
  10  *    the Free Software Foundation; either version 2 of the License, or
  11  *    (at your option) any later version.
  12  *
  13  *    This program is distributed in the hope that it will be useful,
  14  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *    GNU General Public License for more details.
  17  *
  18  *    You should have received a copy of the GNU General Public License
  19  *    along with this program; if not, write to the Free Software
  20  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22 */
  23
  24 /*
  25  *                      NOTES ABOUT THIS DRIVER
  26  *
  27  * This Linux driver supports:
  28  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
  29  *   AverTVHD MCE A180 (NXT2004)
  30  *   ATI HDTV Wonder (NXT2004)
  31  *
  32  * This driver needs external firmware. Please use the command
  33  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
  34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
  35  * download/extract the appropriate firmware, and then copy it to
  36  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  37  * (depending on configuration of firmware hotplug).
  38  */
  39 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
  40 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
  41 #define CRC_CCIT_MASK 0x1021
  42
  43 #include <linux/kernel.h>
  44 #include <linux/init.h>
  45 #include <linux/module.h>
  46 #include <linux/moduleparam.h>
  47
  48 #include "dvb_frontend.h"
  49 #include "dvb-pll.h"
  50 #include "nxt200x.h"
  51
  52 struct nxt200x_state {
  53
  54         struct i2c_adapter* i2c;
  55         struct dvb_frontend_ops ops;
  56         const struct nxt200x_config* config;
  57         struct dvb_frontend frontend;
  58
  59         /* demodulator private data */
  60         nxt_chip_type demod_chip;
  61         u8 initialised:1;
  62 };
  63
  64 static int debug;
  65 #define dprintk(args...) \
  66         do { \
  67                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
  68         } while (0)
  69
  70 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  71 {
  72         int err;
  73         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  74
  75         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  76                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  77                         __FUNCTION__, addr, err);
  78                 return -EREMOTEIO;
  79         }
  80         return 0;
  81 }
  82
  83 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
  84 {
  85         int err;
  86         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  87
  88         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  89                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
  90                         __FUNCTION__, addr, err);
  91                 return -EREMOTEIO;
  92         }
  93         return 0;
  94 }
  95
  96 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
  97 {
  98         u8 buf2 [len+1];
  99         int err;
 100         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
 101
 102         buf2[0] = reg;
 103         memcpy(&buf2[1], buf, len);
 104
 105         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 106                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
 107                         __FUNCTION__, state->config->demod_address, err);
 108                 return -EREMOTEIO;
 109         }
 110         return 0;
 111 }
 112
 113 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
 114 {
 115         u8 reg2 [] = { reg };
 116
 117         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 118                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 119
 120         int err;
 121
 122         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 123                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
 124                         __FUNCTION__, state->config->demod_address, err);
 125                 return -EREMOTEIO;
 126         }
 127         return 0;
 128 }
 129
 130 static u16 nxt200x_crc(u16 crc, u8 c)
 131 {
 132         u8 i;
 133         u16 input = (u16) c & 0xFF;
 134
 135         input<<=8;
 136         for(i=0; i<8; i++) {
 137                 if((crc^input) & 0x8000)
 138                         crc=(crc<<1)^CRC_CCIT_MASK;
 139                 else
 140                         crc<<=1;
 141                 input<<=1;
 142         }
 143         return crc;
 144 }
 145
 146 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 147 {
 148         u8 attr, len2, buf;
 149         dprintk("%s\n", __FUNCTION__);
 150
 151         /* set mutli register register */
 152         nxt200x_writebytes(state, 0x35, &reg, 1);
 153
 154         /* send the actual data */
 155         nxt200x_writebytes(state, 0x36, data, len);
 156
 157         switch (state->demod_chip) {
 158                 case NXT2002:
 159                         len2 = len;
 160                         buf = 0x02;
 161                         break;
 162                 case NXT2004:
 163                         /* probably not right, but gives correct values */
 164                         attr = 0x02;
 165                         if (reg & 0x80) {
 166                                 attr = attr << 1;
 167                                 if (reg & 0x04)
 168                                         attr = attr >> 1;
 169                         }
 170                         /* set write bit */
 171                         len2 = ((attr << 4) | 0x10) | len;
 172                         buf = 0x80;
 173                         break;
 174                 default:
 175                         return -EINVAL;
 176                         break;
 177         }
 178
 179         /* set multi register length */
 180         nxt200x_writebytes(state, 0x34, &len2, 1);
 181
 182         /* toggle the multireg write bit */
 183         nxt200x_writebytes(state, 0x21, &buf, 1);
 184
 185         nxt200x_readbytes(state, 0x21, &buf, 1);
 186
 187         switch (state->demod_chip) {
 188                 case NXT2002:
 189                         if ((buf & 0x02) == 0)
 190                                 return 0;
 191                         break;
 192                 case NXT2004:
 193                         if (buf == 0)
 194                                 return 0;
 195                         break;
 196                 default:
 197                         return -EINVAL;
 198                         break;
 199         }
 200
 201         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
 202
 203         return 0;
 204 }
 205
 206 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 207 {
 208         int i;
 209         u8 buf, len2, attr;
 210         dprintk("%s\n", __FUNCTION__);
 211
 212         /* set mutli register register */
 213         nxt200x_writebytes(state, 0x35, &reg, 1);
 214
 215         switch (state->demod_chip) {
 216                 case NXT2002:
 217                         /* set multi register length */
 218                         len2 = len & 0x80;
 219                         nxt200x_writebytes(state, 0x34, &len2, 1);
 220
 221                         /* read the actual data */
 222                         nxt200x_readbytes(state, reg, data, len);
 223                         return 0;
 224                         break;
 225                 case NXT2004:
 226                         /* probably not right, but gives correct values */
 227                         attr = 0x02;
 228                         if (reg & 0x80) {
 229                                 attr = attr << 1;
 230                                 if (reg & 0x04)
 231                                         attr = attr >> 1;
 232                         }
 233
 234                         /* set multi register length */
 235                         len2 = (attr << 4) | len;
 236                         nxt200x_writebytes(state, 0x34, &len2, 1);
 237
 238                         /* toggle the multireg bit*/
 239                         buf = 0x80;
 240                         nxt200x_writebytes(state, 0x21, &buf, 1);
 241
 242                         /* read status */
 243                         nxt200x_readbytes(state, 0x21, &buf, 1);
 244
 245                         if (buf == 0)
 246                         {
 247                                 /* read the actual data */
 248                                 for(i = 0; i < len; i++) {
 249                     nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 250                                 }
 251                                 return 0;
 252                         }
 253                         break;
 254                 default:
 255                         return -EINVAL;
 256                         break;
 257         }
 258
 259         printk(KERN_WARNING "nxt200x: Error reading multireg register 0x%02X\n",reg);
 260
 261         return 0;
 262 }
 263
 264 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 265 {
 266         u8 buf, stopval, counter = 0;
 267         dprintk("%s\n", __FUNCTION__);
 268
 269         /* set correct stop value */
 270         switch (state->demod_chip) {
 271                 case NXT2002:
 272                         stopval = 0x40;
 273                         break;
 274                 case NXT2004:
 275                         stopval = 0x10;
 276                         break;
 277                 default:
 278                         stopval = 0;
 279                         break;
 280         }
 281
 282         buf = 0x80;
 283         nxt200x_writebytes(state, 0x22, &buf, 1);
 284
 285         while (counter < 20) {
 286                 nxt200x_readbytes(state, 0x31, &buf, 1);
 287                 if (buf & stopval)
 288                         return;
 289                 msleep(10);
 290                 counter++;
 291         }
 292
 293         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 294         return;
 295 }
 296
 297 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 298 {
 299         u8 buf;
 300         dprintk("%s\n", __FUNCTION__);
 301
 302         buf = 0x00;
 303         nxt200x_writebytes(state, 0x22, &buf, 1);
 304 }
 305
 306 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 307 {
 308         u8 buf[9];
 309         u8 counter = 0;
 310         dprintk("%s\n", __FUNCTION__);
 311
 312         buf[0] = 0x00;
 313         nxt200x_writebytes(state, 0x2b, buf, 1);
 314         buf[0] = 0x70;
 315         nxt200x_writebytes(state, 0x34, buf, 1);
 316         buf[0] = 0x04;
 317         nxt200x_writebytes(state, 0x35, buf, 1);
 318         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 319         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 320         nxt200x_writebytes(state, 0x36, buf, 9);
 321         buf[0] = 0x80;
 322         nxt200x_writebytes(state, 0x21, buf, 1);
 323
 324         while (counter < 20) {
 325                 nxt200x_readbytes(state, 0x21, buf, 1);
 326                 if (buf[0] == 0)
 327                         return;
 328                 msleep(10);
 329                 counter++;
 330         }
 331
 332         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
 333
 334         return;
 335 }
 336
 337 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 338 {
 339         u8 buf, count = 0;
 340
 341         dprintk("%s\n", __FUNCTION__);
 342
 343         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[0], data[1], data[2], data[3]);
 344
 345         /* if pll is a Philips TUV1236D then write directly to tuner */
 346         if (strcmp(state->config->pll_desc->name, "Philips TUV1236D") == 0) {
 347                 if (i2c_writebytes(state, state->config->pll_address, data, 4))
 348                         printk(KERN_WARNING "nxt200x: error writing to tuner\n");
 349                 /* wait until we have a lock */
 350                 while (count < 20) {
 351                         i2c_readbytes(state, state->config->pll_address, &buf, 1);
 352                         if (buf & 0x40)
 353                                 return 0;
 354                         msleep(100);
 355                         count++;
 356                 }
 357                 printk("nxt200x: timeout waiting for tuner lock\n");
 358                 return 0;
 359         } else {
 360                 /* set the i2c transfer speed to the tuner */
 361                 buf = 0x03;
 362                 nxt200x_writebytes(state, 0x20, &buf, 1);
 363
 364                 /* setup to transfer 4 bytes via i2c */
 365                 buf = 0x04;
 366                 nxt200x_writebytes(state, 0x34, &buf, 1);
 367
 368                 /* write actual tuner bytes */
 369                 nxt200x_writebytes(state, 0x36, data, 4);
 370
 371                 /* set tuner i2c address */
 372                 buf = state->config->pll_address;
 373                 nxt200x_writebytes(state, 0x35, &buf, 1);
 374
 375                 /* write UC Opmode to begin transfer */
 376                 buf = 0x80;
 377                 nxt200x_writebytes(state, 0x21, &buf, 1);
 378
 379                 while (count < 20) {
 380                         nxt200x_readbytes(state, 0x21, &buf, 1);
 381                         if ((buf & 0x80)== 0x00)
 382                                 return 0;
 383                         msleep(100);
 384                         count++;
 385                 }
 386                 printk("nxt200x: timeout error writing tuner\n");
 387                 return 0;
 388         }
 389 }
 390
 391 static void nxt200x_agc_reset(struct nxt200x_state* state)
 392 {
 393         u8 buf;
 394         dprintk("%s\n", __FUNCTION__);
 395
 396         switch (state->demod_chip) {
 397                 case NXT2002:
 398                         buf = 0x08;
 399                         nxt200x_writebytes(state, 0x08, &buf, 1);
 400                         buf = 0x00;
 401                         nxt200x_writebytes(state, 0x08, &buf, 1);
 402                         break;
 403                 case NXT2004:
 404                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 405                         buf = 0x08;
 406                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 407                         buf = 0x00;
 408                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 409                         break;
 410                 default:
 411                         break;
 412         }
 413         return;
 414 }
 415
 416 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 417 {
 418
 419         struct nxt200x_state* state = fe->demodulator_priv;
 420         u8 buf[3], written = 0, chunkpos = 0;
 421         u16 rambase, position, crc = 0;
 422
 423         dprintk("%s\n", __FUNCTION__);
 424         dprintk("Firmware is %zu bytes\n", fw->size);
 425
 426         /* Get the RAM base for this nxt2002 */
 427         nxt200x_readbytes(state, 0x10, buf, 1);
 428
 429         if (buf[0] & 0x10)
 430                 rambase = 0x1000;
 431         else
 432                 rambase = 0x0000;
 433
 434         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 435
 436         /* Hold the micro in reset while loading firmware */
 437         buf[0] = 0x80;
 438         nxt200x_writebytes(state, 0x2B, buf, 1);
 439
 440         for (position = 0; position < fw->size; position++) {
 441                 if (written == 0) {
 442                         crc = 0;
 443                         chunkpos = 0x28;
 444                         buf[0] = ((rambase + position) >> 8);
 445                         buf[1] = (rambase + position) & 0xFF;
 446                         buf[2] = 0x81;
 447                         /* write starting address */
 448                         nxt200x_writebytes(state, 0x29, buf, 3);
 449                 }
 450                 written++;
 451                 chunkpos++;
 452
 453                 if ((written % 4) == 0)
 454                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 455
 456                 crc = nxt200x_crc(crc, fw->data[position]);
 457
 458                 if ((written == 255) || (position+1 == fw->size)) {
 459                         /* write remaining bytes of firmware */
 460                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 461                                 &fw->data[position-(written %4) + 1],
 462                                 written %4);
 463                         buf[0] = crc << 8;
 464                         buf[1] = crc & 0xFF;
 465
 466                         /* write crc */
 467                         nxt200x_writebytes(state, 0x2C, buf, 2);
 468
 469                         /* do a read to stop things */
 470                         nxt200x_readbytes(state, 0x2A, buf, 1);
 471
 472                         /* set transfer mode to complete */
 473                         buf[0] = 0x80;
 474                         nxt200x_writebytes(state, 0x2B, buf, 1);
 475
 476                         written = 0;
 477                 }
 478         }
 479
 480         return 0;
 481 };
 482
 483 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 484 {
 485
 486         struct nxt200x_state* state = fe->demodulator_priv;
 487         u8 buf[3];
 488         u16 rambase, position, crc=0;
 489
 490         dprintk("%s\n", __FUNCTION__);
 491         dprintk("Firmware is %zu bytes\n", fw->size);
 492
 493         /* set rambase */
 494         rambase = 0x1000;
 495
 496         /* hold the micro in reset while loading firmware */
 497         buf[0] = 0x80;
 498         nxt200x_writebytes(state, 0x2B, buf,1);
 499
 500         /* calculate firmware CRC */
 501         for (position = 0; position < fw->size; position++) {
 502                 crc = nxt200x_crc(crc, fw->data[position]);
 503         }
 504
 505         buf[0] = rambase >> 8;
 506         buf[1] = rambase & 0xFF;
 507         buf[2] = 0x81;
 508         /* write starting address */
 509         nxt200x_writebytes(state,0x29,buf,3);
 510
 511         for (position = 0; position < fw->size;) {
 512                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 513                         fw->size-position > 255 ? 255 : fw->size-position);
 514                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 515         }
 516         buf[0] = crc >> 8;
 517         buf[1] = crc & 0xFF;
 518
 519         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 520
 521         /* write crc */
 522         nxt200x_writebytes(state, 0x2C, buf,2);
 523
 524         /* do a read to stop things */
 525         nxt200x_readbytes(state, 0x2C, buf, 1);
 526
 527         /* set transfer mode to complete */
 528         buf[0] = 0x80;
 529         nxt200x_writebytes(state, 0x2B, buf,1);
 530
 531         return 0;
 532 };
 533
 534 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
 535                                              struct dvb_frontend_parameters *p)
 536 {
 537         struct nxt200x_state* state = fe->demodulator_priv;
 538         u8 buf[4];
 539
 540         /* stop the micro first */
 541         nxt200x_microcontroller_stop(state);
 542
 543         if (state->demod_chip == NXT2004) {
 544                 /* make sure demod is set to digital */
 545                 buf[0] = 0x04;
 546                 nxt200x_writebytes(state, 0x14, buf, 1);
 547                 buf[0] = 0x00;
 548                 nxt200x_writebytes(state, 0x17, buf, 1);
 549         }
 550
 551         /* get tuning information */
 552         dvb_pll_configure(state->config->pll_desc, buf, p->frequency, 0);
 553
 554         /* set additional params */
 555         switch (p->u.vsb.modulation) {
 556                 case QAM_64:
 557                 case QAM_256:
 558                         /* Set punctured clock for QAM */
 559                         /* This is just a guess since I am unable to test it */
 560                         if (state->config->set_ts_params)
 561                                 state->config->set_ts_params(fe, 1);
 562
 563                         /* set to use cable input */
 564                         buf[3] |= 0x08;
 565                         break;
 566                 case VSB_8:
 567                         /* Set non-punctured clock for VSB */
 568                         if (state->config->set_ts_params)
 569                                 state->config->set_ts_params(fe, 0);
 570                         break;
 571                 default:
 572                         return -EINVAL;
 573                         break;
 574         }
 575
 576         /* write frequency information */
 577         nxt200x_writetuner(state, buf);
 578
 579         /* reset the agc now that tuning has been completed */
 580         nxt200x_agc_reset(state);
 581
 582         /* set target power level */
 583         switch (p->u.vsb.modulation) {
 584                 case QAM_64:
 585                 case QAM_256:
 586                         buf[0] = 0x74;
 587                         break;
 588                 case VSB_8:
 589                         buf[0] = 0x70;
 590                         break;
 591                 default:
 592                         return -EINVAL;
 593                         break;
 594         }
 595         nxt200x_writebytes(state, 0x42, buf, 1);
 596
 597         /* configure sdm */
 598         switch (state->demod_chip) {
 599                 case NXT2002:
 600                         buf[0] = 0x87;
 601                         break;
 602                 case NXT2004:
 603                         buf[0] = 0x07;
 604                         break;
 605                 default:
 606                         return -EINVAL;
 607                         break;
 608         }
 609         nxt200x_writebytes(state, 0x57, buf, 1);
 610
 611         /* write sdm1 input */
 612         buf[0] = 0x10;
 613         buf[1] = 0x00;
 614         nxt200x_writebytes(state, 0x58, buf, 2);
 615
 616         /* write sdmx input */
 617         switch (p->u.vsb.modulation) {
 618                 case QAM_64:
 619                                 buf[0] = 0x68;
 620                                 break;
 621                 case QAM_256:
 622                                 buf[0] = 0x64;
 623                                 break;
 624                 case VSB_8:
 625                                 buf[0] = 0x60;
 626                                 break;
 627                 default:
 628                                 return -EINVAL;
 629                                 break;
 630         }
 631         buf[1] = 0x00;
 632         nxt200x_writebytes(state, 0x5C, buf, 2);
 633
 634         /* write adc power lpf fc */
 635         buf[0] = 0x05;
 636         nxt200x_writebytes(state, 0x43, buf, 1);
 637
 638         if (state->demod_chip == NXT2004) {
 639                 /* write ??? */
 640                 buf[0] = 0x00;
 641                 buf[1] = 0x00;
 642                 nxt200x_writebytes(state, 0x46, buf, 2);
 643         }
 644
 645         /* write accumulator2 input */
 646         buf[0] = 0x80;
 647         buf[1] = 0x00;
 648         nxt200x_writebytes(state, 0x4B, buf, 2);
 649
 650         /* write kg1 */
 651         buf[0] = 0x00;
 652         nxt200x_writebytes(state, 0x4D, buf, 1);
 653
 654         /* write sdm12 lpf fc */
 655         buf[0] = 0x44;
 656         nxt200x_writebytes(state, 0x55, buf, 1);
 657
 658         /* write agc control reg */
 659         buf[0] = 0x04;
 660         nxt200x_writebytes(state, 0x41, buf, 1);
 661
 662         if (state->demod_chip == NXT2004) {
 663                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 664                 buf[0] = 0x24;
 665                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 666
 667                 /* soft reset? */
 668                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 669                 buf[0] = 0x10;
 670                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 671                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 672                 buf[0] = 0x00;
 673                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 674
 675                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 676                 buf[0] = 0x04;
 677                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 678                 buf[0] = 0x00;
 679                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 680                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 681                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 682                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 683                 buf[0] = 0x11;
 684                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 685                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 686                 buf[0] = 0x44;
 687                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 688         }
 689
 690         /* write agc ucgp0 */
 691         switch (p->u.vsb.modulation) {
 692                 case QAM_64:
 693                                 buf[0] = 0x02;
 694                                 break;
 695                 case QAM_256:
 696                                 buf[0] = 0x03;
 697                                 break;
 698                 case VSB_8:
 699                                 buf[0] = 0x00;
 700                                 break;
 701                 default:
 702                                 return -EINVAL;
 703                                 break;
 704         }
 705         nxt200x_writebytes(state, 0x30, buf, 1);
 706
 707         /* write agc control reg */
 708         buf[0] = 0x00;
 709         nxt200x_writebytes(state, 0x41, buf, 1);
 710
 711         /* write accumulator2 input */
 712         buf[0] = 0x80;
 713         buf[1] = 0x00;
 714         nxt200x_writebytes(state, 0x49, buf,2);
 715         nxt200x_writebytes(state, 0x4B, buf,2);
 716
 717         /* write agc control reg */
 718         buf[0] = 0x04;
 719         nxt200x_writebytes(state, 0x41, buf, 1);
 720
 721         nxt200x_microcontroller_start(state);
 722
 723         if (state->demod_chip == NXT2004) {
 724                 nxt2004_microcontroller_init(state);
 725
 726                 /* ???? */
 727                 buf[0] = 0xF0;
 728                 buf[1] = 0x00;
 729                 nxt200x_writebytes(state, 0x5C, buf, 2);
 730         }
 731
 732         /* adjacent channel detection should be done here, but I don't
 733         have any stations with this need so I cannot test it */
 734
 735         return 0;
 736 }
 737
 738 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 739 {
 740         struct nxt200x_state* state = fe->demodulator_priv;
 741         u8 lock;
 742         nxt200x_readbytes(state, 0x31, &lock, 1);
 743
 744         *status = 0;
 745         if (lock & 0x20) {
 746                 *status |= FE_HAS_SIGNAL;
 747                 *status |= FE_HAS_CARRIER;
 748                 *status |= FE_HAS_VITERBI;
 749                 *status |= FE_HAS_SYNC;
 750                 *status |= FE_HAS_LOCK;
 751         }
 752         return 0;
 753 }
 754
 755 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 756 {
 757         struct nxt200x_state* state = fe->demodulator_priv;
 758         u8 b[3];
 759
 760         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 761
 762         *ber = ((b[0] << 8) + b[1]) * 8;
 763
 764         return 0;
 765 }
 766
 767 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 768 {
 769         struct nxt200x_state* state = fe->demodulator_priv;
 770         u8 b[2];
 771         u16 temp = 0;
 772
 773         /* setup to read cluster variance */
 774         b[0] = 0x00;
 775         nxt200x_writebytes(state, 0xA1, b, 1);
 776
 777         /* get multreg val */
 778         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 779
 780         temp = (b[0] << 8) | b[1];
 781         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 782
 783         return 0;
 784 }
 785
 786 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 787 {
 788
 789         struct nxt200x_state* state = fe->demodulator_priv;
 790         u8 b[2];
 791         u16 temp = 0, temp2;
 792         u32 snrdb = 0;
 793
 794         /* setup to read cluster variance */
 795         b[0] = 0x00;
 796         nxt200x_writebytes(state, 0xA1, b, 1);
 797
 798         /* get multreg val from 0xA6 */
 799         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 800
 801         temp = (b[0] << 8) | b[1];
 802         temp2 = 0x7FFF - temp;
 803
 804         /* snr will be in db */
 805         if (temp2 > 0x7F00)
 806                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 807         else if (temp2 > 0x7EC0)
 808                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 809         else if (temp2 > 0x7C00)
 810                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 811         else
 812                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 813
 814         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 815         *snr = snrdb * (0xFFFF/32000);
 816
 817         return 0;
 818 }
 819
 820 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 821 {
 822         struct nxt200x_state* state = fe->demodulator_priv;
 823         u8 b[3];
 824
 825         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 826         *ucblocks = b[2];
 827
 828         return 0;
 829 }
 830
 831 static int nxt200x_sleep(struct dvb_frontend* fe)
 832 {
 833         return 0;
 834 }
 835
 836 static int nxt2002_init(struct dvb_frontend* fe)
 837 {
 838         struct nxt200x_state* state = fe->demodulator_priv;
 839         const struct firmware *fw;
 840         int ret;
 841         u8 buf[2];
 842
 843         /* request the firmware, this will block until someone uploads it */
 844         printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
 845         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
 846         printk("nxt2002: Waiting for firmware upload(2)...\n");
 847         if (ret) {
 848                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
 849                 return ret;
 850         }
 851
 852         ret = nxt2002_load_firmware(fe, fw);
 853         if (ret) {
 854                 printk("nxt2002: Writing firmware to device failed\n");
 855                 release_firmware(fw);
 856                 return ret;
 857         }
 858         printk("nxt2002: Firmware upload complete\n");
 859
 860         /* Put the micro into reset */
 861         nxt200x_microcontroller_stop(state);
 862
 863         /* ensure transfer is complete */
 864         buf[0]=0x00;
 865         nxt200x_writebytes(state, 0x2B, buf, 1);
 866
 867         /* Put the micro into reset for real this time */
 868         nxt200x_microcontroller_stop(state);
 869
 870         /* soft reset everything (agc,frontend,eq,fec)*/
 871         buf[0] = 0x0F;
 872         nxt200x_writebytes(state, 0x08, buf, 1);
 873         buf[0] = 0x00;
 874         nxt200x_writebytes(state, 0x08, buf, 1);
 875
 876         /* write agc sdm configure */
 877         buf[0] = 0xF1;
 878         nxt200x_writebytes(state, 0x57, buf, 1);
 879
 880         /* write mod output format */
 881         buf[0] = 0x20;
 882         nxt200x_writebytes(state, 0x09, buf, 1);
 883
 884         /* write fec mpeg mode */
 885         buf[0] = 0x7E;
 886         buf[1] = 0x00;
 887         nxt200x_writebytes(state, 0xE9, buf, 2);
 888
 889         /* write mux selection */
 890         buf[0] = 0x00;
 891         nxt200x_writebytes(state, 0xCC, buf, 1);
 892
 893         return 0;
 894 }
 895
 896 static int nxt2004_init(struct dvb_frontend* fe)
 897 {
 898         struct nxt200x_state* state = fe->demodulator_priv;
 899         const struct firmware *fw;
 900         int ret;
 901         u8 buf[3];
 902
 903         /* ??? */
 904         buf[0]=0x00;
 905         nxt200x_writebytes(state, 0x1E, buf, 1);
 906
 907         /* request the firmware, this will block until someone uploads it */
 908         printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
 909         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
 910         printk("nxt2004: Waiting for firmware upload(2)...\n");
 911         if (ret) {
 912                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
 913                 return ret;
 914         }
 915
 916         ret = nxt2004_load_firmware(fe, fw);
 917         if (ret) {
 918                 printk("nxt2004: Writing firmware to device failed\n");
 919                 release_firmware(fw);
 920                 return ret;
 921         }
 922         printk("nxt2004: Firmware upload complete\n");
 923
 924         /* ensure transfer is complete */
 925         buf[0] = 0x01;
 926         nxt200x_writebytes(state, 0x19, buf, 1);
 927
 928         nxt2004_microcontroller_init(state);
 929         nxt200x_microcontroller_stop(state);
 930         nxt200x_microcontroller_stop(state);
 931         nxt2004_microcontroller_init(state);
 932         nxt200x_microcontroller_stop(state);
 933
 934         /* soft reset everything (agc,frontend,eq,fec)*/
 935         buf[0] = 0xFF;
 936         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 937         buf[0] = 0x00;
 938         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 939
 940         /* write agc sdm configure */
 941         buf[0] = 0xD7;
 942         nxt200x_writebytes(state, 0x57, buf, 1);
 943
 944         /* ???*/
 945         buf[0] = 0x07;
 946         buf[1] = 0xfe;
 947         nxt200x_writebytes(state, 0x35, buf, 2);
 948         buf[0] = 0x12;
 949         nxt200x_writebytes(state, 0x34, buf, 1);
 950         buf[0] = 0x80;
 951         nxt200x_writebytes(state, 0x21, buf, 1);
 952
 953         /* ???*/
 954         buf[0] = 0x21;
 955         nxt200x_writebytes(state, 0x0A, buf, 1);
 956
 957         /* ???*/
 958         buf[0] = 0x01;
 959         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 960
 961         /* write fec mpeg mode */
 962         buf[0] = 0x7E;
 963         buf[1] = 0x00;
 964         nxt200x_writebytes(state, 0xE9, buf, 2);
 965
 966         /* write mux selection */
 967         buf[0] = 0x00;
 968         nxt200x_writebytes(state, 0xCC, buf, 1);
 969
 970         /* ???*/
 971         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 972         buf[0] = 0x00;
 973         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 974
 975         /* soft reset? */
 976         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 977         buf[0] = 0x10;
 978         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 979         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 980         buf[0] = 0x00;
 981         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 982
 983         /* ???*/
 984         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 985         buf[0] = 0x01;
 986         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 987         buf[0] = 0x70;
 988         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 989         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
 990         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 991
 992         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 993         buf[0] = 0x11;
 994         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 995         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 996         buf[0] = 0x40;
 997         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 998
 999         nxt200x_readbytes(state, 0x10, buf, 1);
1000         buf[0] = 0x10;
1001         nxt200x_writebytes(state, 0x10, buf, 1);
1002         nxt200x_readbytes(state, 0x0A, buf, 1);
1003         buf[0] = 0x21;
1004         nxt200x_writebytes(state, 0x0A, buf, 1);
1005
1006         nxt2004_microcontroller_init(state);
1007
1008         buf[0] = 0x21;
1009         nxt200x_writebytes(state, 0x0A, buf, 1);
1010         buf[0] = 0x7E;
1011         nxt200x_writebytes(state, 0xE9, buf, 1);
1012         buf[0] = 0x00;
1013         nxt200x_writebytes(state, 0xEA, buf, 1);
1014
1015         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1016         buf[0] = 0x00;
1017         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1018         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1019         buf[0] = 0x00;
1020         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1021
1022         /* soft reset? */
1023         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1024         buf[0] = 0x10;
1025         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1026         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1027         buf[0] = 0x00;
1028         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1029
1030         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1031         buf[0] = 0x04;
1032         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1033         buf[0] = 0x00;
1034         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1035         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1036         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1037
1038         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1039         buf[0] = 0x11;
1040         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1041
1042         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1043         buf[0] = 0x44;
1044         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1045
1046         /* initialize tuner */
1047         nxt200x_readbytes(state, 0x10, buf, 1);
1048         buf[0] = 0x12;
1049         nxt200x_writebytes(state, 0x10, buf, 1);
1050         buf[0] = 0x04;
1051         nxt200x_writebytes(state, 0x13, buf, 1);
1052         buf[0] = 0x00;
1053         nxt200x_writebytes(state, 0x16, buf, 1);
1054         buf[0] = 0x04;
1055         nxt200x_writebytes(state, 0x14, buf, 1);
1056         buf[0] = 0x00;
1057         nxt200x_writebytes(state, 0x14, buf, 1);
1058         nxt200x_writebytes(state, 0x17, buf, 1);
1059         nxt200x_writebytes(state, 0x14, buf, 1);
1060         nxt200x_writebytes(state, 0x17, buf, 1);
1061
1062         return 0;
1063 }
1064
1065 static int nxt200x_init(struct dvb_frontend* fe)
1066 {
1067         struct nxt200x_state* state = fe->demodulator_priv;
1068         int ret = 0;
1069
1070         if (!state->initialised) {
1071                 switch (state->demod_chip) {
1072                         case NXT2002:
1073                                 ret = nxt2002_init(fe);
1074                                 break;
1075                         case NXT2004:
1076                                 ret = nxt2004_init(fe);
1077                                 break;
1078                         default:
1079                                 return -EINVAL;
1080                                 break;
1081                 }
1082                 state->initialised = 1;
1083         }
1084         return ret;
1085 }
1086
1087 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1088 {
1089         fesettings->min_delay_ms = 500;
1090         fesettings->step_size = 0;
1091         fesettings->max_drift = 0;
1092         return 0;
1093 }
1094
1095 static void nxt200x_release(struct dvb_frontend* fe)
1096 {
1097         struct nxt200x_state* state = fe->demodulator_priv;
1098         kfree(state);
1099 }
1100
1101 static struct dvb_frontend_ops nxt200x_ops;
1102
1103 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1104                                    struct i2c_adapter* i2c)
1105 {
1106         struct nxt200x_state* state = NULL;
1107         u8 buf [] = {0,0,0,0,0};
1108
1109         /* allocate memory for the internal state */
1110         state = (struct nxt200x_state*) kmalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1111         if (state == NULL)
1112                 goto error;
1113         memset(state,0,sizeof(*state));
1114
1115         /* setup the state */
1116         state->config = config;
1117         state->i2c = i2c;
1118         memcpy(&state->ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1119         state->initialised = 0;
1120
1121         /* read card id */
1122         nxt200x_readbytes(state, 0x00, buf, 5);
1123         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1124                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1125
1126         /* set demod chip */
1127         switch (buf[0]) {
1128                 case 0x04:
1129                         state->demod_chip = NXT2002;
1130                         printk("nxt200x: NXT2002 Detected\n");
1131                         break;
1132                 case 0x05:
1133                         state->demod_chip = NXT2004;
1134                         printk("nxt200x: NXT2004 Detected\n");
1135                         break;
1136                 default:
1137                         goto error;
1138         }
1139
1140         /* make sure demod chip is supported */
1141         switch (state->demod_chip) {
1142                 case NXT2002:
1143                         if (buf[0] != 0x04) goto error;         /* device id */
1144                         if (buf[1] != 0x02) goto error;         /* fab id */
1145                         if (buf[2] != 0x11) goto error;         /* month */
1146                         if (buf[3] != 0x20) goto error;         /* year msb */
1147                         if (buf[4] != 0x00) goto error;         /* year lsb */
1148                         break;
1149                 case NXT2004:
1150                         if (buf[0] != 0x05) goto error;         /* device id */
1151                         break;
1152                 default:
1153                         goto error;
1154         }
1155
1156         /* create dvb_frontend */
1157         state->frontend.ops = &state->ops;
1158         state->frontend.demodulator_priv = state;
1159         return &state->frontend;
1160
1161 error:
1162         if (state)
1163                 kfree(state);
1164         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1165                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1166         return NULL;
1167 }
1168
1169 static struct dvb_frontend_ops nxt200x_ops = {
1170
1171         .info = {
1172                 .name = "Nextwave NXT200X VSB/QAM frontend",
1173                 .type = FE_ATSC,
1174                 .frequency_min =  54000000,
1175                 .frequency_max = 860000000,
1176                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1177                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1178                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1179                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1180         },
1181
1182         .release = nxt200x_release,
1183
1184         .init = nxt200x_init,
1185         .sleep = nxt200x_sleep,
1186
1187         .set_frontend = nxt200x_setup_frontend_parameters,
1188         .get_tune_settings = nxt200x_get_tune_settings,
1189
1190         .read_status = nxt200x_read_status,
1191         .read_ber = nxt200x_read_ber,
1192         .read_signal_strength = nxt200x_read_signal_strength,
1193         .read_snr = nxt200x_read_snr,
1194         .read_ucblocks = nxt200x_read_ucblocks,
1195 };
1196
1197 module_param(debug, int, 0644);
1198 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1199
1200 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1201 MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob");
1202 MODULE_LICENSE("GPL");
1203
1204 EXPORT_SYMBOL(nxt200x_attach);
1205