drivers/media/dvb/frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com)
   5  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   6  *    and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com)
   7  *
   8  *    This program is free software; you can redistribute it and/or modify
   9  *    it under the terms of the GNU General Public License as published by
  10  *    the Free Software Foundation; either version 2 of the License, or
  11  *    (at your option) any later version.
  12  *
  13  *    This program is distributed in the hope that it will be useful,
  14  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *    GNU General Public License for more details.
  17  *
  18  *    You should have received a copy of the GNU General Public License
  19  *    along with this program; if not, write to the Free Software
  20  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22 */
  23
  24 /*
  25  *                      NOTES ABOUT THIS DRIVER
  26  *
  27  * This Linux driver supports:
  28  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
  29  *   AverTVHD MCE A180 (NXT2004)
  30  *   ATI HDTV Wonder (NXT2004)
  31  *
  32  * This driver needs external firmware. Please use the command
  33  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
  34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
  35  * download/extract the appropriate firmware, and then copy it to
  36  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  37  * (depending on configuration of firmware hotplug).
  38  */
  39 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
  40 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
  41 #define CRC_CCIT_MASK 0x1021
  42
  43 #include <linux/kernel.h>
  44 #include <linux/init.h>
  45 #include <linux/module.h>
  46 #include <linux/moduleparam.h>
  47
  48 #include "dvb_frontend.h"
  49 #include "dvb-pll.h"
  50 #include "nxt200x.h"
  51
  52 struct nxt200x_state {
  53
  54         struct i2c_adapter* i2c;
  55         struct dvb_frontend_ops ops;
  56         const struct nxt200x_config* config;
  57         struct dvb_frontend frontend;
  58
  59         /* demodulator private data */
  60         nxt_chip_type demod_chip;
  61         u8 initialised:1;
  62 };
  63
  64 static int debug;
  65 #define dprintk(args...) \
  66         do { \
  67                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
  68         } while (0)
  69
  70 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  71 {
  72         int err;
  73         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  74
  75         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  76                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  77                         __FUNCTION__, addr, err);
  78                 return -EREMOTEIO;
  79         }
  80         return 0;
  81 }
  82
  83 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
  84 {
  85         int err;
  86         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  87
  88         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  89                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
  90                         __FUNCTION__, addr, err);
  91                 return -EREMOTEIO;
  92         }
  93         return 0;
  94 }
  95
  96 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
  97 {
  98         u8 buf2 [len+1];
  99         int err;
 100         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
 101
 102         buf2[0] = reg;
 103         memcpy(&buf2[1], buf, len);
 104
 105         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 106                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
 107                         __FUNCTION__, state->config->demod_address, err);
 108                 return -EREMOTEIO;
 109         }
 110         return 0;
 111 }
 112
 113 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
 114 {
 115         u8 reg2 [] = { reg };
 116
 117         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 118                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 119
 120         int err;
 121
 122         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 123                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
 124                         __FUNCTION__, state->config->demod_address, err);
 125                 return -EREMOTEIO;
 126         }
 127         return 0;
 128 }
 129
 130 static u16 nxt200x_crc(u16 crc, u8 c)
 131 {
 132         u8 i;
 133         u16 input = (u16) c & 0xFF;
 134
 135         input<<=8;
 136         for(i=0; i<8; i++) {
 137                 if((crc^input) & 0x8000)
 138                         crc=(crc<<1)^CRC_CCIT_MASK;
 139                 else
 140                         crc<<=1;
 141                 input<<=1;
 142         }
 143         return crc;
 144 }
 145
 146 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 147 {
 148         u8 attr, len2, buf;
 149         dprintk("%s\n", __FUNCTION__);
 150
 151         /* set mutli register register */
 152         nxt200x_writebytes(state, 0x35, &reg, 1);
 153
 154         /* send the actual data */
 155         nxt200x_writebytes(state, 0x36, data, len);
 156
 157         switch (state->demod_chip) {
 158                 case NXT2002:
 159                         len2 = len;
 160                         buf = 0x02;
 161                         break;
 162                 case NXT2004:
 163                         /* probably not right, but gives correct values */
 164                         attr = 0x02;
 165                         if (reg & 0x80) {
 166                                 attr = attr << 1;
 167                                 if (reg & 0x04)
 168                                         attr = attr >> 1;
 169                         }
 170                         /* set write bit */
 171                         len2 = ((attr << 4) | 0x10) | len;
 172                         buf = 0x80;
 173                         break;
 174                 default:
 175                         return -EINVAL;
 176                         break;
 177         }
 178
 179         /* set multi register length */
 180         nxt200x_writebytes(state, 0x34, &len2, 1);
 181
 182         /* toggle the multireg write bit */
 183         nxt200x_writebytes(state, 0x21, &buf, 1);
 184
 185         nxt200x_readbytes(state, 0x21, &buf, 1);
 186
 187         switch (state->demod_chip) {
 188                 case NXT2002:
 189                         if ((buf & 0x02) == 0)
 190                                 return 0;
 191                         break;
 192                 case NXT2004:
 193                         if (buf == 0)
 194                                 return 0;
 195                         break;
 196                 default:
 197                         return -EINVAL;
 198                         break;
 199         }
 200
 201         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
 202
 203         return 0;
 204 }
 205
 206 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 207 {
 208         int i;
 209         u8 buf, len2, attr;
 210         dprintk("%s\n", __FUNCTION__);
 211
 212         /* set mutli register register */
 213         nxt200x_writebytes(state, 0x35, &reg, 1);
 214
 215         switch (state->demod_chip) {
 216                 case NXT2002:
 217                         /* set multi register length */
 218                         len2 = len & 0x80;
 219                         nxt200x_writebytes(state, 0x34, &len2, 1);
 220
 221                         /* read the actual data */
 222                         nxt200x_readbytes(state, reg, data, len);
 223                         return 0;
 224                         break;
 225                 case NXT2004:
 226                         /* probably not right, but gives correct values */
 227                         attr = 0x02;
 228                         if (reg & 0x80) {
 229                                 attr = attr << 1;
 230                                 if (reg & 0x04)
 231                                         attr = attr >> 1;
 232                         }
 233
 234                         /* set multi register length */
 235                         len2 = (attr << 4) | len;
 236                         nxt200x_writebytes(state, 0x34, &len2, 1);
 237
 238                         /* toggle the multireg bit*/
 239                         buf = 0x80;
 240                         nxt200x_writebytes(state, 0x21, &buf, 1);
 241
 242                         /* read status */
 243                         nxt200x_readbytes(state, 0x21, &buf, 1);
 244
 245                         if (buf == 0)
 246                         {
 247                                 /* read the actual data */
 248                                 for(i = 0; i < len; i++) {
 249                     nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 250                                 }
 251                                 return 0;
 252                         }
 253                         break;
 254                 default:
 255                         return -EINVAL;
 256                         break;
 257         }
 258
 259         printk(KERN_WARNING "nxt200x: Error reading multireg register 0x%02X\n",reg);
 260
 261         return 0;
 262 }
 263
 264 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 265 {
 266         u8 buf, stopval, counter = 0;
 267         dprintk("%s\n", __FUNCTION__);
 268
 269         /* set correct stop value */
 270         switch (state->demod_chip) {
 271                 case NXT2002:
 272                         stopval = 0x40;
 273                         break;
 274                 case NXT2004:
 275                         stopval = 0x10;
 276                         break;
 277                 default:
 278                         stopval = 0;
 279                         break;
 280         }
 281
 282         buf = 0x80;
 283         nxt200x_writebytes(state, 0x22, &buf, 1);
 284
 285         while (counter < 20) {
 286                 nxt200x_readbytes(state, 0x31, &buf, 1);
 287                 if (buf & stopval)
 288                         return;
 289                 msleep(10);
 290                 counter++;
 291         }
 292
 293         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 294         return;
 295 }
 296
 297 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 298 {
 299         u8 buf;
 300         dprintk("%s\n", __FUNCTION__);
 301
 302         buf = 0x00;
 303         nxt200x_writebytes(state, 0x22, &buf, 1);
 304 }
 305
 306 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 307 {
 308         u8 buf[9];
 309         u8 counter = 0;
 310         dprintk("%s\n", __FUNCTION__);
 311
 312         buf[0] = 0x00;
 313         nxt200x_writebytes(state, 0x2b, buf, 1);
 314         buf[0] = 0x70;
 315         nxt200x_writebytes(state, 0x34, buf, 1);
 316         buf[0] = 0x04;
 317         nxt200x_writebytes(state, 0x35, buf, 1);
 318         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 319         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 320         nxt200x_writebytes(state, 0x36, buf, 9);
 321         buf[0] = 0x80;
 322         nxt200x_writebytes(state, 0x21, buf, 1);
 323
 324         while (counter < 20) {
 325                 nxt200x_readbytes(state, 0x21, buf, 1);
 326                 if (buf[0] == 0)
 327                         return;
 328                 msleep(10);
 329                 counter++;
 330         }
 331
 332         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
 333
 334         return;
 335 }
 336
 337 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 338 {
 339         u8 buf, count = 0;
 340
 341         dprintk("%s\n", __FUNCTION__);
 342
 343         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[0], data[1], data[2], data[3]);
 344
 345         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 346          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 347         switch (state->demod_chip) {
 348                 case NXT2004:
 349                         if (i2c_writebytes(state, state->config->pll_address, data, 4))
 350                                 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
 351                         /* wait until we have a lock */
 352                         while (count < 20) {
 353                                 i2c_readbytes(state, state->config->pll_address, &buf, 1);
 354                                 if (buf & 0x40)
 355                                         return 0;
 356                                 msleep(100);
 357                                 count++;
 358                         }
 359                         printk("nxt2004: timeout waiting for tuner lock\n");
 360                         break;
 361                 case NXT2002:
 362                         /* set the i2c transfer speed to the tuner */
 363                         buf = 0x03;
 364                         nxt200x_writebytes(state, 0x20, &buf, 1);
 365
 366                         /* setup to transfer 4 bytes via i2c */
 367                         buf = 0x04;
 368                         nxt200x_writebytes(state, 0x34, &buf, 1);
 369
 370                         /* write actual tuner bytes */
 371                         nxt200x_writebytes(state, 0x36, data, 4);
 372
 373                         /* set tuner i2c address */
 374                         buf = state->config->pll_address;
 375                         nxt200x_writebytes(state, 0x35, &buf, 1);
 376
 377                         /* write UC Opmode to begin transfer */
 378                         buf = 0x80;
 379                         nxt200x_writebytes(state, 0x21, &buf, 1);
 380
 381                         while (count < 20) {
 382                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 383                                 if ((buf & 0x80)== 0x00)
 384                                         return 0;
 385                                 msleep(100);
 386                                 count++;
 387                         }
 388                         printk("nxt2002: timeout error writing tuner\n");
 389                         break;
 390                 default:
 391                         return -EINVAL;
 392                         break;
 393         }
 394         return 0;
 395 }
 396
 397 static void nxt200x_agc_reset(struct nxt200x_state* state)
 398 {
 399         u8 buf;
 400         dprintk("%s\n", __FUNCTION__);
 401
 402         switch (state->demod_chip) {
 403                 case NXT2002:
 404                         buf = 0x08;
 405                         nxt200x_writebytes(state, 0x08, &buf, 1);
 406                         buf = 0x00;
 407                         nxt200x_writebytes(state, 0x08, &buf, 1);
 408                         break;
 409                 case NXT2004:
 410                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 411                         buf = 0x08;
 412                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 413                         buf = 0x00;
 414                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 415                         break;
 416                 default:
 417                         break;
 418         }
 419         return;
 420 }
 421
 422 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 423 {
 424
 425         struct nxt200x_state* state = fe->demodulator_priv;
 426         u8 buf[3], written = 0, chunkpos = 0;
 427         u16 rambase, position, crc = 0;
 428
 429         dprintk("%s\n", __FUNCTION__);
 430         dprintk("Firmware is %zu bytes\n", fw->size);
 431
 432         /* Get the RAM base for this nxt2002 */
 433         nxt200x_readbytes(state, 0x10, buf, 1);
 434
 435         if (buf[0] & 0x10)
 436                 rambase = 0x1000;
 437         else
 438                 rambase = 0x0000;
 439
 440         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 441
 442         /* Hold the micro in reset while loading firmware */
 443         buf[0] = 0x80;
 444         nxt200x_writebytes(state, 0x2B, buf, 1);
 445
 446         for (position = 0; position < fw->size; position++) {
 447                 if (written == 0) {
 448                         crc = 0;
 449                         chunkpos = 0x28;
 450                         buf[0] = ((rambase + position) >> 8);
 451                         buf[1] = (rambase + position) & 0xFF;
 452                         buf[2] = 0x81;
 453                         /* write starting address */
 454                         nxt200x_writebytes(state, 0x29, buf, 3);
 455                 }
 456                 written++;
 457                 chunkpos++;
 458
 459                 if ((written % 4) == 0)
 460                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 461
 462                 crc = nxt200x_crc(crc, fw->data[position]);
 463
 464                 if ((written == 255) || (position+1 == fw->size)) {
 465                         /* write remaining bytes of firmware */
 466                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 467                                 &fw->data[position-(written %4) + 1],
 468                                 written %4);
 469                         buf[0] = crc << 8;
 470                         buf[1] = crc & 0xFF;
 471
 472                         /* write crc */
 473                         nxt200x_writebytes(state, 0x2C, buf, 2);
 474
 475                         /* do a read to stop things */
 476                         nxt200x_readbytes(state, 0x2A, buf, 1);
 477
 478                         /* set transfer mode to complete */
 479                         buf[0] = 0x80;
 480                         nxt200x_writebytes(state, 0x2B, buf, 1);
 481
 482                         written = 0;
 483                 }
 484         }
 485
 486         return 0;
 487 };
 488
 489 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 490 {
 491
 492         struct nxt200x_state* state = fe->demodulator_priv;
 493         u8 buf[3];
 494         u16 rambase, position, crc=0;
 495
 496         dprintk("%s\n", __FUNCTION__);
 497         dprintk("Firmware is %zu bytes\n", fw->size);
 498
 499         /* set rambase */
 500         rambase = 0x1000;
 501
 502         /* hold the micro in reset while loading firmware */
 503         buf[0] = 0x80;
 504         nxt200x_writebytes(state, 0x2B, buf,1);
 505
 506         /* calculate firmware CRC */
 507         for (position = 0; position < fw->size; position++) {
 508                 crc = nxt200x_crc(crc, fw->data[position]);
 509         }
 510
 511         buf[0] = rambase >> 8;
 512         buf[1] = rambase & 0xFF;
 513         buf[2] = 0x81;
 514         /* write starting address */
 515         nxt200x_writebytes(state,0x29,buf,3);
 516
 517         for (position = 0; position < fw->size;) {
 518                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 519                         fw->size-position > 255 ? 255 : fw->size-position);
 520                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 521         }
 522         buf[0] = crc >> 8;
 523         buf[1] = crc & 0xFF;
 524
 525         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 526
 527         /* write crc */
 528         nxt200x_writebytes(state, 0x2C, buf,2);
 529
 530         /* do a read to stop things */
 531         nxt200x_readbytes(state, 0x2C, buf, 1);
 532
 533         /* set transfer mode to complete */
 534         buf[0] = 0x80;
 535         nxt200x_writebytes(state, 0x2B, buf,1);
 536
 537         return 0;
 538 };
 539
 540 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
 541                                              struct dvb_frontend_parameters *p)
 542 {
 543         struct nxt200x_state* state = fe->demodulator_priv;
 544         u8 buf[4];
 545
 546         /* stop the micro first */
 547         nxt200x_microcontroller_stop(state);
 548
 549         if (state->demod_chip == NXT2004) {
 550                 /* make sure demod is set to digital */
 551                 buf[0] = 0x04;
 552                 nxt200x_writebytes(state, 0x14, buf, 1);
 553                 buf[0] = 0x00;
 554                 nxt200x_writebytes(state, 0x17, buf, 1);
 555         }
 556
 557         /* get tuning information */
 558         dvb_pll_configure(state->config->pll_desc, buf, p->frequency, 0);
 559
 560         /* set additional params */
 561         switch (p->u.vsb.modulation) {
 562                 case QAM_64:
 563                 case QAM_256:
 564                         /* Set punctured clock for QAM */
 565                         /* This is just a guess since I am unable to test it */
 566                         if (state->config->set_ts_params)
 567                                 state->config->set_ts_params(fe, 1);
 568
 569                         /* set to use cable input */
 570                         buf[3] |= 0x08;
 571                         break;
 572                 case VSB_8:
 573                         /* Set non-punctured clock for VSB */
 574                         if (state->config->set_ts_params)
 575                                 state->config->set_ts_params(fe, 0);
 576                         break;
 577                 default:
 578                         return -EINVAL;
 579                         break;
 580         }
 581
 582         /* write frequency information */
 583         nxt200x_writetuner(state, buf);
 584
 585         /* reset the agc now that tuning has been completed */
 586         nxt200x_agc_reset(state);
 587
 588         /* set target power level */
 589         switch (p->u.vsb.modulation) {
 590                 case QAM_64:
 591                 case QAM_256:
 592                         buf[0] = 0x74;
 593                         break;
 594                 case VSB_8:
 595                         buf[0] = 0x70;
 596                         break;
 597                 default:
 598                         return -EINVAL;
 599                         break;
 600         }
 601         nxt200x_writebytes(state, 0x42, buf, 1);
 602
 603         /* configure sdm */
 604         switch (state->demod_chip) {
 605                 case NXT2002:
 606                         buf[0] = 0x87;
 607                         break;
 608                 case NXT2004:
 609                         buf[0] = 0x07;
 610                         break;
 611                 default:
 612                         return -EINVAL;
 613                         break;
 614         }
 615         nxt200x_writebytes(state, 0x57, buf, 1);
 616
 617         /* write sdm1 input */
 618         buf[0] = 0x10;
 619         buf[1] = 0x00;
 620         nxt200x_writebytes(state, 0x58, buf, 2);
 621
 622         /* write sdmx input */
 623         switch (p->u.vsb.modulation) {
 624                 case QAM_64:
 625                                 buf[0] = 0x68;
 626                                 break;
 627                 case QAM_256:
 628                                 buf[0] = 0x64;
 629                                 break;
 630                 case VSB_8:
 631                                 buf[0] = 0x60;
 632                                 break;
 633                 default:
 634                                 return -EINVAL;
 635                                 break;
 636         }
 637         buf[1] = 0x00;
 638         nxt200x_writebytes(state, 0x5C, buf, 2);
 639
 640         /* write adc power lpf fc */
 641         buf[0] = 0x05;
 642         nxt200x_writebytes(state, 0x43, buf, 1);
 643
 644         if (state->demod_chip == NXT2004) {
 645                 /* write ??? */
 646                 buf[0] = 0x00;
 647                 buf[1] = 0x00;
 648                 nxt200x_writebytes(state, 0x46, buf, 2);
 649         }
 650
 651         /* write accumulator2 input */
 652         buf[0] = 0x80;
 653         buf[1] = 0x00;
 654         nxt200x_writebytes(state, 0x4B, buf, 2);
 655
 656         /* write kg1 */
 657         buf[0] = 0x00;
 658         nxt200x_writebytes(state, 0x4D, buf, 1);
 659
 660         /* write sdm12 lpf fc */
 661         buf[0] = 0x44;
 662         nxt200x_writebytes(state, 0x55, buf, 1);
 663
 664         /* write agc control reg */
 665         buf[0] = 0x04;
 666         nxt200x_writebytes(state, 0x41, buf, 1);
 667
 668         if (state->demod_chip == NXT2004) {
 669                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 670                 buf[0] = 0x24;
 671                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 672
 673                 /* soft reset? */
 674                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 675                 buf[0] = 0x10;
 676                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 677                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 678                 buf[0] = 0x00;
 679                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 680
 681                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 682                 buf[0] = 0x04;
 683                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 684                 buf[0] = 0x00;
 685                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 686                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 687                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 688                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 689                 buf[0] = 0x11;
 690                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 691                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 692                 buf[0] = 0x44;
 693                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 694         }
 695
 696         /* write agc ucgp0 */
 697         switch (p->u.vsb.modulation) {
 698                 case QAM_64:
 699                                 buf[0] = 0x02;
 700                                 break;
 701                 case QAM_256:
 702                                 buf[0] = 0x03;
 703                                 break;
 704                 case VSB_8:
 705                                 buf[0] = 0x00;
 706                                 break;
 707                 default:
 708                                 return -EINVAL;
 709                                 break;
 710         }
 711         nxt200x_writebytes(state, 0x30, buf, 1);
 712
 713         /* write agc control reg */
 714         buf[0] = 0x00;
 715         nxt200x_writebytes(state, 0x41, buf, 1);
 716
 717         /* write accumulator2 input */
 718         buf[0] = 0x80;
 719         buf[1] = 0x00;
 720         nxt200x_writebytes(state, 0x49, buf,2);
 721         nxt200x_writebytes(state, 0x4B, buf,2);
 722
 723         /* write agc control reg */
 724         buf[0] = 0x04;
 725         nxt200x_writebytes(state, 0x41, buf, 1);
 726
 727         nxt200x_microcontroller_start(state);
 728
 729         if (state->demod_chip == NXT2004) {
 730                 nxt2004_microcontroller_init(state);
 731
 732                 /* ???? */
 733                 buf[0] = 0xF0;
 734                 buf[1] = 0x00;
 735                 nxt200x_writebytes(state, 0x5C, buf, 2);
 736         }
 737
 738         /* adjacent channel detection should be done here, but I don't
 739         have any stations with this need so I cannot test it */
 740
 741         return 0;
 742 }
 743
 744 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 745 {
 746         struct nxt200x_state* state = fe->demodulator_priv;
 747         u8 lock;
 748         nxt200x_readbytes(state, 0x31, &lock, 1);
 749
 750         *status = 0;
 751         if (lock & 0x20) {
 752                 *status |= FE_HAS_SIGNAL;
 753                 *status |= FE_HAS_CARRIER;
 754                 *status |= FE_HAS_VITERBI;
 755                 *status |= FE_HAS_SYNC;
 756                 *status |= FE_HAS_LOCK;
 757         }
 758         return 0;
 759 }
 760
 761 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 762 {
 763         struct nxt200x_state* state = fe->demodulator_priv;
 764         u8 b[3];
 765
 766         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 767
 768         *ber = ((b[0] << 8) + b[1]) * 8;
 769
 770         return 0;
 771 }
 772
 773 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 774 {
 775         struct nxt200x_state* state = fe->demodulator_priv;
 776         u8 b[2];
 777         u16 temp = 0;
 778
 779         /* setup to read cluster variance */
 780         b[0] = 0x00;
 781         nxt200x_writebytes(state, 0xA1, b, 1);
 782
 783         /* get multreg val */
 784         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 785
 786         temp = (b[0] << 8) | b[1];
 787         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 788
 789         return 0;
 790 }
 791
 792 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 793 {
 794
 795         struct nxt200x_state* state = fe->demodulator_priv;
 796         u8 b[2];
 797         u16 temp = 0, temp2;
 798         u32 snrdb = 0;
 799
 800         /* setup to read cluster variance */
 801         b[0] = 0x00;
 802         nxt200x_writebytes(state, 0xA1, b, 1);
 803
 804         /* get multreg val from 0xA6 */
 805         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 806
 807         temp = (b[0] << 8) | b[1];
 808         temp2 = 0x7FFF - temp;
 809
 810         /* snr will be in db */
 811         if (temp2 > 0x7F00)
 812                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 813         else if (temp2 > 0x7EC0)
 814                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 815         else if (temp2 > 0x7C00)
 816                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 817         else
 818                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 819
 820         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 821         *snr = snrdb * (0xFFFF/32000);
 822
 823         return 0;
 824 }
 825
 826 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 827 {
 828         struct nxt200x_state* state = fe->demodulator_priv;
 829         u8 b[3];
 830
 831         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 832         *ucblocks = b[2];
 833
 834         return 0;
 835 }
 836
 837 static int nxt200x_sleep(struct dvb_frontend* fe)
 838 {
 839         return 0;
 840 }
 841
 842 static int nxt2002_init(struct dvb_frontend* fe)
 843 {
 844         struct nxt200x_state* state = fe->demodulator_priv;
 845         const struct firmware *fw;
 846         int ret;
 847         u8 buf[2];
 848
 849         /* request the firmware, this will block until someone uploads it */
 850         printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
 851         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
 852         printk("nxt2002: Waiting for firmware upload(2)...\n");
 853         if (ret) {
 854                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
 855                 return ret;
 856         }
 857
 858         ret = nxt2002_load_firmware(fe, fw);
 859         if (ret) {
 860                 printk("nxt2002: Writing firmware to device failed\n");
 861                 release_firmware(fw);
 862                 return ret;
 863         }
 864         printk("nxt2002: Firmware upload complete\n");
 865
 866         /* Put the micro into reset */
 867         nxt200x_microcontroller_stop(state);
 868
 869         /* ensure transfer is complete */
 870         buf[0]=0x00;
 871         nxt200x_writebytes(state, 0x2B, buf, 1);
 872
 873         /* Put the micro into reset for real this time */
 874         nxt200x_microcontroller_stop(state);
 875
 876         /* soft reset everything (agc,frontend,eq,fec)*/
 877         buf[0] = 0x0F;
 878         nxt200x_writebytes(state, 0x08, buf, 1);
 879         buf[0] = 0x00;
 880         nxt200x_writebytes(state, 0x08, buf, 1);
 881
 882         /* write agc sdm configure */
 883         buf[0] = 0xF1;
 884         nxt200x_writebytes(state, 0x57, buf, 1);
 885
 886         /* write mod output format */
 887         buf[0] = 0x20;
 888         nxt200x_writebytes(state, 0x09, buf, 1);
 889
 890         /* write fec mpeg mode */
 891         buf[0] = 0x7E;
 892         buf[1] = 0x00;
 893         nxt200x_writebytes(state, 0xE9, buf, 2);
 894
 895         /* write mux selection */
 896         buf[0] = 0x00;
 897         nxt200x_writebytes(state, 0xCC, buf, 1);
 898
 899         return 0;
 900 }
 901
 902 static int nxt2004_init(struct dvb_frontend* fe)
 903 {
 904         struct nxt200x_state* state = fe->demodulator_priv;
 905         const struct firmware *fw;
 906         int ret;
 907         u8 buf[3];
 908
 909         /* ??? */
 910         buf[0]=0x00;
 911         nxt200x_writebytes(state, 0x1E, buf, 1);
 912
 913         /* request the firmware, this will block until someone uploads it */
 914         printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
 915         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
 916         printk("nxt2004: Waiting for firmware upload(2)...\n");
 917         if (ret) {
 918                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
 919                 return ret;
 920         }
 921
 922         ret = nxt2004_load_firmware(fe, fw);
 923         if (ret) {
 924                 printk("nxt2004: Writing firmware to device failed\n");
 925                 release_firmware(fw);
 926                 return ret;
 927         }
 928         printk("nxt2004: Firmware upload complete\n");
 929
 930         /* ensure transfer is complete */
 931         buf[0] = 0x01;
 932         nxt200x_writebytes(state, 0x19, buf, 1);
 933
 934         nxt2004_microcontroller_init(state);
 935         nxt200x_microcontroller_stop(state);
 936         nxt200x_microcontroller_stop(state);
 937         nxt2004_microcontroller_init(state);
 938         nxt200x_microcontroller_stop(state);
 939
 940         /* soft reset everything (agc,frontend,eq,fec)*/
 941         buf[0] = 0xFF;
 942         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 943         buf[0] = 0x00;
 944         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 945
 946         /* write agc sdm configure */
 947         buf[0] = 0xD7;
 948         nxt200x_writebytes(state, 0x57, buf, 1);
 949
 950         /* ???*/
 951         buf[0] = 0x07;
 952         buf[1] = 0xfe;
 953         nxt200x_writebytes(state, 0x35, buf, 2);
 954         buf[0] = 0x12;
 955         nxt200x_writebytes(state, 0x34, buf, 1);
 956         buf[0] = 0x80;
 957         nxt200x_writebytes(state, 0x21, buf, 1);
 958
 959         /* ???*/
 960         buf[0] = 0x21;
 961         nxt200x_writebytes(state, 0x0A, buf, 1);
 962
 963         /* ???*/
 964         buf[0] = 0x01;
 965         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 966
 967         /* write fec mpeg mode */
 968         buf[0] = 0x7E;
 969         buf[1] = 0x00;
 970         nxt200x_writebytes(state, 0xE9, buf, 2);
 971
 972         /* write mux selection */
 973         buf[0] = 0x00;
 974         nxt200x_writebytes(state, 0xCC, buf, 1);
 975
 976         /* ???*/
 977         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 978         buf[0] = 0x00;
 979         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 980
 981         /* soft reset? */
 982         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 983         buf[0] = 0x10;
 984         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 985         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 986         buf[0] = 0x00;
 987         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 988
 989         /* ???*/
 990         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 991         buf[0] = 0x01;
 992         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 993         buf[0] = 0x70;
 994         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 995         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
 996         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 997
 998         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 999         buf[0] = 0x11;
1000         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1001         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1002         buf[0] = 0x40;
1003         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1004
1005         nxt200x_readbytes(state, 0x10, buf, 1);
1006         buf[0] = 0x10;
1007         nxt200x_writebytes(state, 0x10, buf, 1);
1008         nxt200x_readbytes(state, 0x0A, buf, 1);
1009         buf[0] = 0x21;
1010         nxt200x_writebytes(state, 0x0A, buf, 1);
1011
1012         nxt2004_microcontroller_init(state);
1013
1014         buf[0] = 0x21;
1015         nxt200x_writebytes(state, 0x0A, buf, 1);
1016         buf[0] = 0x7E;
1017         nxt200x_writebytes(state, 0xE9, buf, 1);
1018         buf[0] = 0x00;
1019         nxt200x_writebytes(state, 0xEA, buf, 1);
1020
1021         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1022         buf[0] = 0x00;
1023         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1024         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1025         buf[0] = 0x00;
1026         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1027
1028         /* soft reset? */
1029         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1030         buf[0] = 0x10;
1031         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1032         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1033         buf[0] = 0x00;
1034         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1035
1036         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1037         buf[0] = 0x04;
1038         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1039         buf[0] = 0x00;
1040         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1041         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1042         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1043
1044         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1045         buf[0] = 0x11;
1046         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1047
1048         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1049         buf[0] = 0x44;
1050         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1051
1052         /* initialize tuner */
1053         nxt200x_readbytes(state, 0x10, buf, 1);
1054         buf[0] = 0x12;
1055         nxt200x_writebytes(state, 0x10, buf, 1);
1056         buf[0] = 0x04;
1057         nxt200x_writebytes(state, 0x13, buf, 1);
1058         buf[0] = 0x00;
1059         nxt200x_writebytes(state, 0x16, buf, 1);
1060         buf[0] = 0x04;
1061         nxt200x_writebytes(state, 0x14, buf, 1);
1062         buf[0] = 0x00;
1063         nxt200x_writebytes(state, 0x14, buf, 1);
1064         nxt200x_writebytes(state, 0x17, buf, 1);
1065         nxt200x_writebytes(state, 0x14, buf, 1);
1066         nxt200x_writebytes(state, 0x17, buf, 1);
1067
1068         return 0;
1069 }
1070
1071 static int nxt200x_init(struct dvb_frontend* fe)
1072 {
1073         struct nxt200x_state* state = fe->demodulator_priv;
1074         int ret = 0;
1075
1076         if (!state->initialised) {
1077                 switch (state->demod_chip) {
1078                         case NXT2002:
1079                                 ret = nxt2002_init(fe);
1080                                 break;
1081                         case NXT2004:
1082                                 ret = nxt2004_init(fe);
1083                                 break;
1084                         default:
1085                                 return -EINVAL;
1086                                 break;
1087                 }
1088                 state->initialised = 1;
1089         }
1090         return ret;
1091 }
1092
1093 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1094 {
1095         fesettings->min_delay_ms = 500;
1096         fesettings->step_size = 0;
1097         fesettings->max_drift = 0;
1098         return 0;
1099 }
1100
1101 static void nxt200x_release(struct dvb_frontend* fe)
1102 {
1103         struct nxt200x_state* state = fe->demodulator_priv;
1104         kfree(state);
1105 }
1106
1107 static struct dvb_frontend_ops nxt200x_ops;
1108
1109 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1110                                    struct i2c_adapter* i2c)
1111 {
1112         struct nxt200x_state* state = NULL;
1113         u8 buf [] = {0,0,0,0,0};
1114
1115         /* allocate memory for the internal state */
1116         state = (struct nxt200x_state*) kmalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1117         if (state == NULL)
1118                 goto error;
1119         memset(state,0,sizeof(*state));
1120
1121         /* setup the state */
1122         state->config = config;
1123         state->i2c = i2c;
1124         memcpy(&state->ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1125         state->initialised = 0;
1126
1127         /* read card id */
1128         nxt200x_readbytes(state, 0x00, buf, 5);
1129         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1130                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1131
1132         /* set demod chip */
1133         switch (buf[0]) {
1134                 case 0x04:
1135                         state->demod_chip = NXT2002;
1136                         printk("nxt200x: NXT2002 Detected\n");
1137                         break;
1138                 case 0x05:
1139                         state->demod_chip = NXT2004;
1140                         printk("nxt200x: NXT2004 Detected\n");
1141                         break;
1142                 default:
1143                         goto error;
1144         }
1145
1146         /* make sure demod chip is supported */
1147         switch (state->demod_chip) {
1148                 case NXT2002:
1149                         if (buf[0] != 0x04) goto error;         /* device id */
1150                         if (buf[1] != 0x02) goto error;         /* fab id */
1151                         if (buf[2] != 0x11) goto error;         /* month */
1152                         if (buf[3] != 0x20) goto error;         /* year msb */
1153                         if (buf[4] != 0x00) goto error;         /* year lsb */
1154                         break;
1155                 case NXT2004:
1156                         if (buf[0] != 0x05) goto error;         /* device id */
1157                         break;
1158                 default:
1159                         goto error;
1160         }
1161
1162         /* create dvb_frontend */
1163         state->frontend.ops = &state->ops;
1164         state->frontend.demodulator_priv = state;
1165         return &state->frontend;
1166
1167 error:
1168         kfree(state);
1169         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1170                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1171         return NULL;
1172 }
1173
1174 static struct dvb_frontend_ops nxt200x_ops = {
1175
1176         .info = {
1177                 .name = "Nextwave NXT200X VSB/QAM frontend",
1178                 .type = FE_ATSC,
1179                 .frequency_min =  54000000,
1180                 .frequency_max = 860000000,
1181                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1182                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1183                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1184                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1185         },
1186
1187         .release = nxt200x_release,
1188
1189         .init = nxt200x_init,
1190         .sleep = nxt200x_sleep,
1191
1192         .set_frontend = nxt200x_setup_frontend_parameters,
1193         .get_tune_settings = nxt200x_get_tune_settings,
1194
1195         .read_status = nxt200x_read_status,
1196         .read_ber = nxt200x_read_ber,
1197         .read_signal_strength = nxt200x_read_signal_strength,
1198         .read_snr = nxt200x_read_snr,
1199         .read_ucblocks = nxt200x_read_ucblocks,
1200 };
1201
1202 module_param(debug, int, 0644);
1203 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1204
1205 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1206 MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob");
1207 MODULE_LICENSE("GPL");
1208
1209 EXPORT_SYMBOL(nxt200x_attach);
1210