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[PATCH] KVM: Prevent stale bits in cr0 and cr4
[linux-2.6-omap-h63xx.git] / drivers / kvm / svm.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * AMD SVM support
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  *
8  * Authors:
9  *   Yaniv Kamay  <yaniv@qumranet.com>
10  *   Avi Kivity   <avi@qumranet.com>
11  *
12  * This work is licensed under the terms of the GNU GPL, version 2.  See
13  * the COPYING file in the top-level directory.
14  *
15  */
16
17 #include <linux/module.h>
18 #include <linux/vmalloc.h>
19 #include <linux/highmem.h>
20 #include <asm/desc.h>
21
22 #include "kvm_svm.h"
23 #include "x86_emulate.h"
24
25 MODULE_AUTHOR("Qumranet");
26 MODULE_LICENSE("GPL");
27
28 #define IOPM_ALLOC_ORDER 2
29 #define MSRPM_ALLOC_ORDER 1
30
31 #define DB_VECTOR 1
32 #define UD_VECTOR 6
33 #define GP_VECTOR 13
34
35 #define DR7_GD_MASK (1 << 13)
36 #define DR6_BD_MASK (1 << 13)
37 #define CR4_DE_MASK (1UL << 3)
38
39 #define SEG_TYPE_LDT 2
40 #define SEG_TYPE_BUSY_TSS16 3
41
42 #define KVM_EFER_LMA (1 << 10)
43 #define KVM_EFER_LME (1 << 8)
44
45 unsigned long iopm_base;
46 unsigned long msrpm_base;
47
48 struct kvm_ldttss_desc {
49         u16 limit0;
50         u16 base0;
51         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
52         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
53         u32 base3;
54         u32 zero1;
55 } __attribute__((packed));
56
57 struct svm_cpu_data {
58         int cpu;
59
60         uint64_t asid_generation;
61         uint32_t max_asid;
62         uint32_t next_asid;
63         struct kvm_ldttss_desc *tss_desc;
64
65         struct page *save_area;
66 };
67
68 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
69
70 struct svm_init_data {
71         int cpu;
72         int r;
73 };
74
75 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
76
77 #define NUM_MSR_MAPS (sizeof(msrpm_ranges) / sizeof(*msrpm_ranges))
78 #define MSRS_RANGE_SIZE 2048
79 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
80
81 #define MAX_INST_SIZE 15
82
83 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
84 {
85         struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
86         u16 cs_attrib;
87
88         if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
89                 return 2;
90
91         cs_attrib = sa->cs.attrib;
92
93         return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
94                                 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
95 }
96
97 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
98 {
99         int word_index = __ffs(vcpu->irq_summary);
100         int bit_index = __ffs(vcpu->irq_pending[word_index]);
101         int irq = word_index * BITS_PER_LONG + bit_index;
102
103         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
104         if (!vcpu->irq_pending[word_index])
105                 clear_bit(word_index, &vcpu->irq_summary);
106         return irq;
107 }
108
109 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
110 {
111         set_bit(irq, vcpu->irq_pending);
112         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
113 }
114
115 static inline void clgi(void)
116 {
117         asm volatile (SVM_CLGI);
118 }
119
120 static inline void stgi(void)
121 {
122         asm volatile (SVM_STGI);
123 }
124
125 static inline void invlpga(unsigned long addr, u32 asid)
126 {
127         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
128 }
129
130 static inline unsigned long kvm_read_cr2(void)
131 {
132         unsigned long cr2;
133
134         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
135         return cr2;
136 }
137
138 static inline void kvm_write_cr2(unsigned long val)
139 {
140         asm volatile ("mov %0, %%cr2" :: "r" (val));
141 }
142
143 static inline unsigned long read_dr6(void)
144 {
145         unsigned long dr6;
146
147         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
148         return dr6;
149 }
150
151 static inline void write_dr6(unsigned long val)
152 {
153         asm volatile ("mov %0, %%dr6" :: "r" (val));
154 }
155
156 static inline unsigned long read_dr7(void)
157 {
158         unsigned long dr7;
159
160         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
161         return dr7;
162 }
163
164 static inline void write_dr7(unsigned long val)
165 {
166         asm volatile ("mov %0, %%dr7" :: "r" (val));
167 }
168
169 static inline void force_new_asid(struct kvm_vcpu *vcpu)
170 {
171         vcpu->svm->asid_generation--;
172 }
173
174 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
175 {
176         force_new_asid(vcpu);
177 }
178
179 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
180 {
181         if (!(efer & KVM_EFER_LMA))
182                 efer &= ~KVM_EFER_LME;
183
184         vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
185         vcpu->shadow_efer = efer;
186 }
187
188 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
189 {
190         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
191                                                 SVM_EVTINJ_VALID_ERR |
192                                                 SVM_EVTINJ_TYPE_EXEPT |
193                                                 GP_VECTOR;
194         vcpu->svm->vmcb->control.event_inj_err = error_code;
195 }
196
197 static void inject_ud(struct kvm_vcpu *vcpu)
198 {
199         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
200                                                 SVM_EVTINJ_TYPE_EXEPT |
201                                                 UD_VECTOR;
202 }
203
204 static void inject_db(struct kvm_vcpu *vcpu)
205 {
206         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
207                                                 SVM_EVTINJ_TYPE_EXEPT |
208                                                 DB_VECTOR;
209 }
210
211 static int is_page_fault(uint32_t info)
212 {
213         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
214         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
215 }
216
217 static int is_external_interrupt(u32 info)
218 {
219         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
220         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
221 }
222
223 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
224 {
225         if (!vcpu->svm->next_rip) {
226                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
227                 return;
228         }
229         if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
230                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
231                        __FUNCTION__,
232                        vcpu->svm->vmcb->save.rip,
233                        vcpu->svm->next_rip);
234         }
235
236         vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
237         vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
238
239         vcpu->interrupt_window_open = 1;
240 }
241
242 static int has_svm(void)
243 {
244         uint32_t eax, ebx, ecx, edx;
245
246         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
247                 printk(KERN_INFO "has_svm: not amd\n");
248                 return 0;
249         }
250
251         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
252         if (eax < SVM_CPUID_FUNC) {
253                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
254                 return 0;
255         }
256
257         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
258         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
259                 printk(KERN_DEBUG "has_svm: svm not available\n");
260                 return 0;
261         }
262         return 1;
263 }
264
265 static void svm_hardware_disable(void *garbage)
266 {
267         struct svm_cpu_data *svm_data
268                 = per_cpu(svm_data, raw_smp_processor_id());
269
270         if (svm_data) {
271                 uint64_t efer;
272
273                 wrmsrl(MSR_VM_HSAVE_PA, 0);
274                 rdmsrl(MSR_EFER, efer);
275                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
276                 per_cpu(svm_data, raw_smp_processor_id()) = 0;
277                 __free_page(svm_data->save_area);
278                 kfree(svm_data);
279         }
280 }
281
282 static void svm_hardware_enable(void *garbage)
283 {
284
285         struct svm_cpu_data *svm_data;
286         uint64_t efer;
287 #ifdef CONFIG_X86_64
288         struct desc_ptr gdt_descr;
289 #else
290         struct Xgt_desc_struct gdt_descr;
291 #endif
292         struct desc_struct *gdt;
293         int me = raw_smp_processor_id();
294
295         if (!has_svm()) {
296                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
297                 return;
298         }
299         svm_data = per_cpu(svm_data, me);
300
301         if (!svm_data) {
302                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
303                        me);
304                 return;
305         }
306
307         svm_data->asid_generation = 1;
308         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
309         svm_data->next_asid = svm_data->max_asid + 1;
310
311         asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
312         gdt = (struct desc_struct *)gdt_descr.address;
313         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
314
315         rdmsrl(MSR_EFER, efer);
316         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
317
318         wrmsrl(MSR_VM_HSAVE_PA,
319                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
320 }
321
322 static int svm_cpu_init(int cpu)
323 {
324         struct svm_cpu_data *svm_data;
325         int r;
326
327         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
328         if (!svm_data)
329                 return -ENOMEM;
330         svm_data->cpu = cpu;
331         svm_data->save_area = alloc_page(GFP_KERNEL);
332         r = -ENOMEM;
333         if (!svm_data->save_area)
334                 goto err_1;
335
336         per_cpu(svm_data, cpu) = svm_data;
337
338         return 0;
339
340 err_1:
341         kfree(svm_data);
342         return r;
343
344 }
345
346 static int set_msr_interception(u32 *msrpm, unsigned msr,
347                                 int read, int write)
348 {
349         int i;
350
351         for (i = 0; i < NUM_MSR_MAPS; i++) {
352                 if (msr >= msrpm_ranges[i] &&
353                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
354                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
355                                           msrpm_ranges[i]) * 2;
356
357                         u32 *base = msrpm + (msr_offset / 32);
358                         u32 msr_shift = msr_offset % 32;
359                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
360                         *base = (*base & ~(0x3 << msr_shift)) |
361                                 (mask << msr_shift);
362                         return 1;
363                 }
364         }
365         printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
366         return 0;
367 }
368
369 static __init int svm_hardware_setup(void)
370 {
371         int cpu;
372         struct page *iopm_pages;
373         struct page *msrpm_pages;
374         void *msrpm_va;
375         int r;
376
377         kvm_emulator_want_group7_invlpg();
378
379         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
380
381         if (!iopm_pages)
382                 return -ENOMEM;
383         memset(page_address(iopm_pages), 0xff,
384                                         PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
385         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
386
387
388         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
389
390         r = -ENOMEM;
391         if (!msrpm_pages)
392                 goto err_1;
393
394         msrpm_va = page_address(msrpm_pages);
395         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
396         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
397
398 #ifdef CONFIG_X86_64
399         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
400         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
401         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
402         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
403         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
404         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
405 #endif
406         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
407         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
408         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
409         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
410
411         for_each_online_cpu(cpu) {
412                 r = svm_cpu_init(cpu);
413                 if (r)
414                         goto err_2;
415         }
416         return 0;
417
418 err_2:
419         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
420         msrpm_base = 0;
421 err_1:
422         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
423         iopm_base = 0;
424         return r;
425 }
426
427 static __exit void svm_hardware_unsetup(void)
428 {
429         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
430         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
431         iopm_base = msrpm_base = 0;
432 }
433
434 static void init_seg(struct vmcb_seg *seg)
435 {
436         seg->selector = 0;
437         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
438                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
439         seg->limit = 0xffff;
440         seg->base = 0;
441 }
442
443 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
444 {
445         seg->selector = 0;
446         seg->attrib = SVM_SELECTOR_P_MASK | type;
447         seg->limit = 0xffff;
448         seg->base = 0;
449 }
450
451 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
452 {
453         return 0;
454 }
455
456 static void init_vmcb(struct vmcb *vmcb)
457 {
458         struct vmcb_control_area *control = &vmcb->control;
459         struct vmcb_save_area *save = &vmcb->save;
460         u64 tsc;
461
462         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
463                                         INTERCEPT_CR3_MASK |
464                                         INTERCEPT_CR4_MASK;
465
466         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
467                                         INTERCEPT_CR3_MASK |
468                                         INTERCEPT_CR4_MASK;
469
470         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
471                                         INTERCEPT_DR1_MASK |
472                                         INTERCEPT_DR2_MASK |
473                                         INTERCEPT_DR3_MASK;
474
475         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
476                                         INTERCEPT_DR1_MASK |
477                                         INTERCEPT_DR2_MASK |
478                                         INTERCEPT_DR3_MASK |
479                                         INTERCEPT_DR5_MASK |
480                                         INTERCEPT_DR7_MASK;
481
482         control->intercept_exceptions = 1 << PF_VECTOR;
483
484
485         control->intercept =    (1ULL << INTERCEPT_INTR) |
486                                 (1ULL << INTERCEPT_NMI) |
487                 /*
488                  * selective cr0 intercept bug?
489                  *      0:   0f 22 d8                mov    %eax,%cr3
490                  *      3:   0f 20 c0                mov    %cr0,%eax
491                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
492                  *      b:   0f 22 c0                mov    %eax,%cr0
493                  * set cr3 ->interception
494                  * get cr0 ->interception
495                  * set cr0 -> no interception
496                  */
497                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
498                                 (1ULL << INTERCEPT_CPUID) |
499                                 (1ULL << INTERCEPT_HLT) |
500                                 (1ULL << INTERCEPT_INVLPG) |
501                                 (1ULL << INTERCEPT_INVLPGA) |
502                                 (1ULL << INTERCEPT_IOIO_PROT) |
503                                 (1ULL << INTERCEPT_MSR_PROT) |
504                                 (1ULL << INTERCEPT_TASK_SWITCH) |
505                                 (1ULL << INTERCEPT_VMRUN) |
506                                 (1ULL << INTERCEPT_VMMCALL) |
507                                 (1ULL << INTERCEPT_VMLOAD) |
508                                 (1ULL << INTERCEPT_VMSAVE) |
509                                 (1ULL << INTERCEPT_STGI) |
510                                 (1ULL << INTERCEPT_CLGI) |
511                                 (1ULL << INTERCEPT_SKINIT);
512
513         control->iopm_base_pa = iopm_base;
514         control->msrpm_base_pa = msrpm_base;
515         rdtscll(tsc);
516         control->tsc_offset = -tsc;
517         control->int_ctl = V_INTR_MASKING_MASK;
518
519         init_seg(&save->es);
520         init_seg(&save->ss);
521         init_seg(&save->ds);
522         init_seg(&save->fs);
523         init_seg(&save->gs);
524
525         save->cs.selector = 0xf000;
526         /* Executable/Readable Code Segment */
527         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
528                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
529         save->cs.limit = 0xffff;
530         save->cs.base = 0xffff0000;
531
532         save->gdtr.limit = 0xffff;
533         save->idtr.limit = 0xffff;
534
535         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
536         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
537
538         save->efer = MSR_EFER_SVME_MASK;
539
540         save->dr6 = 0xffff0ff0;
541         save->dr7 = 0x400;
542         save->rflags = 2;
543         save->rip = 0x0000fff0;
544
545         /*
546          * cr0 val on cpu init should be 0x60000010, we enable cpu
547          * cache by default. the orderly way is to enable cache in bios.
548          */
549         save->cr0 = 0x00000010 | CR0_PG_MASK;
550         save->cr4 = CR4_PAE_MASK;
551         /* rdx = ?? */
552 }
553
554 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
555 {
556         struct page *page;
557         int r;
558
559         r = -ENOMEM;
560         vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
561         if (!vcpu->svm)
562                 goto out1;
563         page = alloc_page(GFP_KERNEL);
564         if (!page)
565                 goto out2;
566
567         vcpu->svm->vmcb = page_address(page);
568         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
569         vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
570         vcpu->svm->cr0 = 0x00000010;
571         vcpu->svm->asid_generation = 0;
572         memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
573         init_vmcb(vcpu->svm->vmcb);
574
575         fx_init(vcpu);
576
577         return 0;
578
579 out2:
580         kfree(vcpu->svm);
581 out1:
582         return r;
583 }
584
585 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
586 {
587         if (!vcpu->svm)
588                 return;
589         if (vcpu->svm->vmcb)
590                 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
591         kfree(vcpu->svm);
592 }
593
594 static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
595 {
596         get_cpu();
597         return vcpu;
598 }
599
600 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
601 {
602         put_cpu();
603 }
604
605 static void svm_cache_regs(struct kvm_vcpu *vcpu)
606 {
607         vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
608         vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
609         vcpu->rip = vcpu->svm->vmcb->save.rip;
610 }
611
612 static void svm_decache_regs(struct kvm_vcpu *vcpu)
613 {
614         vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
615         vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
616         vcpu->svm->vmcb->save.rip = vcpu->rip;
617 }
618
619 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
620 {
621         return vcpu->svm->vmcb->save.rflags;
622 }
623
624 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
625 {
626         vcpu->svm->vmcb->save.rflags = rflags;
627 }
628
629 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
630 {
631         struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
632
633         switch (seg) {
634         case VCPU_SREG_CS: return &save->cs;
635         case VCPU_SREG_DS: return &save->ds;
636         case VCPU_SREG_ES: return &save->es;
637         case VCPU_SREG_FS: return &save->fs;
638         case VCPU_SREG_GS: return &save->gs;
639         case VCPU_SREG_SS: return &save->ss;
640         case VCPU_SREG_TR: return &save->tr;
641         case VCPU_SREG_LDTR: return &save->ldtr;
642         }
643         BUG();
644         return 0;
645 }
646
647 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
648 {
649         struct vmcb_seg *s = svm_seg(vcpu, seg);
650
651         return s->base;
652 }
653
654 static void svm_get_segment(struct kvm_vcpu *vcpu,
655                             struct kvm_segment *var, int seg)
656 {
657         struct vmcb_seg *s = svm_seg(vcpu, seg);
658
659         var->base = s->base;
660         var->limit = s->limit;
661         var->selector = s->selector;
662         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
663         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
664         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
665         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
666         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
667         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
668         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
669         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
670         var->unusable = !var->present;
671 }
672
673 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
674 {
675         struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
676
677         *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
678         *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
679 }
680
681 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
682 {
683         dt->limit = vcpu->svm->vmcb->save.ldtr.limit;
684         dt->base = vcpu->svm->vmcb->save.ldtr.base;
685 }
686
687 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
688 {
689         vcpu->svm->vmcb->save.ldtr.limit = dt->limit;
690         vcpu->svm->vmcb->save.ldtr.base = dt->base ;
691 }
692
693 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
694 {
695         dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
696         dt->base = vcpu->svm->vmcb->save.gdtr.base;
697 }
698
699 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
700 {
701         vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
702         vcpu->svm->vmcb->save.gdtr.base = dt->base ;
703 }
704
705 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
706 {
707 }
708
709 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
710 {
711 #ifdef CONFIG_X86_64
712         if (vcpu->shadow_efer & KVM_EFER_LME) {
713                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
714                         vcpu->shadow_efer |= KVM_EFER_LMA;
715                         vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
716                 }
717
718                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
719                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
720                         vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
721                 }
722         }
723 #endif
724         vcpu->svm->cr0 = cr0;
725         vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK;
726         vcpu->cr0 = cr0;
727 }
728
729 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
730 {
731        vcpu->cr4 = cr4;
732        vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
733 }
734
735 static void svm_set_segment(struct kvm_vcpu *vcpu,
736                             struct kvm_segment *var, int seg)
737 {
738         struct vmcb_seg *s = svm_seg(vcpu, seg);
739
740         s->base = var->base;
741         s->limit = var->limit;
742         s->selector = var->selector;
743         if (var->unusable)
744                 s->attrib = 0;
745         else {
746                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
747                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
748                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
749                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
750                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
751                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
752                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
753                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
754         }
755         if (seg == VCPU_SREG_CS)
756                 vcpu->svm->vmcb->save.cpl
757                         = (vcpu->svm->vmcb->save.cs.attrib
758                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
759
760 }
761
762 /* FIXME:
763
764         vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
765         vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
766
767 */
768
769 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
770 {
771         return -EOPNOTSUPP;
772 }
773
774 static void load_host_msrs(struct kvm_vcpu *vcpu)
775 {
776         int i;
777
778         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
779                 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
780 }
781
782 static void save_host_msrs(struct kvm_vcpu *vcpu)
783 {
784         int i;
785
786         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
787                 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
788 }
789
790 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
791 {
792         if (svm_data->next_asid > svm_data->max_asid) {
793                 ++svm_data->asid_generation;
794                 svm_data->next_asid = 1;
795                 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
796         }
797
798         vcpu->cpu = svm_data->cpu;
799         vcpu->svm->asid_generation = svm_data->asid_generation;
800         vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
801 }
802
803 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
804 {
805         invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
806 }
807
808 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
809 {
810         return vcpu->svm->db_regs[dr];
811 }
812
813 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
814                        int *exception)
815 {
816         *exception = 0;
817
818         if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
819                 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
820                 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
821                 *exception = DB_VECTOR;
822                 return;
823         }
824
825         switch (dr) {
826         case 0 ... 3:
827                 vcpu->svm->db_regs[dr] = value;
828                 return;
829         case 4 ... 5:
830                 if (vcpu->cr4 & CR4_DE_MASK) {
831                         *exception = UD_VECTOR;
832                         return;
833                 }
834         case 7: {
835                 if (value & ~((1ULL << 32) - 1)) {
836                         *exception = GP_VECTOR;
837                         return;
838                 }
839                 vcpu->svm->vmcb->save.dr7 = value;
840                 return;
841         }
842         default:
843                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
844                        __FUNCTION__, dr);
845                 *exception = UD_VECTOR;
846                 return;
847         }
848 }
849
850 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
851 {
852         u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
853         u64 fault_address;
854         u32 error_code;
855         enum emulation_result er;
856
857         if (is_external_interrupt(exit_int_info))
858                 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
859
860         spin_lock(&vcpu->kvm->lock);
861
862         fault_address  = vcpu->svm->vmcb->control.exit_info_2;
863         error_code = vcpu->svm->vmcb->control.exit_info_1;
864         if (!vcpu->mmu.page_fault(vcpu, fault_address, error_code)) {
865                 spin_unlock(&vcpu->kvm->lock);
866                 return 1;
867         }
868         er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
869         spin_unlock(&vcpu->kvm->lock);
870
871         switch (er) {
872         case EMULATE_DONE:
873                 return 1;
874         case EMULATE_DO_MMIO:
875                 ++kvm_stat.mmio_exits;
876                 kvm_run->exit_reason = KVM_EXIT_MMIO;
877                 return 0;
878         case EMULATE_FAIL:
879                 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
880                 break;
881         default:
882                 BUG();
883         }
884
885         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
886         return 0;
887 }
888
889 static int io_get_override(struct kvm_vcpu *vcpu,
890                           struct vmcb_seg **seg,
891                           int *addr_override)
892 {
893         u8 inst[MAX_INST_SIZE];
894         unsigned ins_length;
895         gva_t rip;
896         int i;
897
898         rip =  vcpu->svm->vmcb->save.rip;
899         ins_length = vcpu->svm->next_rip - rip;
900         rip += vcpu->svm->vmcb->save.cs.base;
901
902         if (ins_length > MAX_INST_SIZE)
903                 printk(KERN_DEBUG
904                        "%s: inst length err, cs base 0x%llx rip 0x%llx "
905                        "next rip 0x%llx ins_length %u\n",
906                        __FUNCTION__,
907                        vcpu->svm->vmcb->save.cs.base,
908                        vcpu->svm->vmcb->save.rip,
909                        vcpu->svm->vmcb->control.exit_info_2,
910                        ins_length);
911
912         if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
913                 /* #PF */
914                 return 0;
915
916         *addr_override = 0;
917         *seg = 0;
918         for (i = 0; i < ins_length; i++)
919                 switch (inst[i]) {
920                 case 0xf0:
921                 case 0xf2:
922                 case 0xf3:
923                 case 0x66:
924                         continue;
925                 case 0x67:
926                         *addr_override = 1;
927                         continue;
928                 case 0x2e:
929                         *seg = &vcpu->svm->vmcb->save.cs;
930                         continue;
931                 case 0x36:
932                         *seg = &vcpu->svm->vmcb->save.ss;
933                         continue;
934                 case 0x3e:
935                         *seg = &vcpu->svm->vmcb->save.ds;
936                         continue;
937                 case 0x26:
938                         *seg = &vcpu->svm->vmcb->save.es;
939                         continue;
940                 case 0x64:
941                         *seg = &vcpu->svm->vmcb->save.fs;
942                         continue;
943                 case 0x65:
944                         *seg = &vcpu->svm->vmcb->save.gs;
945                         continue;
946                 default:
947                         return 1;
948                 }
949         printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
950         return 0;
951 }
952
953 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
954 {
955         unsigned long addr_mask;
956         unsigned long *reg;
957         struct vmcb_seg *seg;
958         int addr_override;
959         struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
960         u16 cs_attrib = save_area->cs.attrib;
961         unsigned addr_size = get_addr_size(vcpu);
962
963         if (!io_get_override(vcpu, &seg, &addr_override))
964                 return 0;
965
966         if (addr_override)
967                 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
968
969         if (ins) {
970                 reg = &vcpu->regs[VCPU_REGS_RDI];
971                 seg = &vcpu->svm->vmcb->save.es;
972         } else {
973                 reg = &vcpu->regs[VCPU_REGS_RSI];
974                 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
975         }
976
977         addr_mask = ~0ULL >> (64 - (addr_size * 8));
978
979         if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
980             !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
981                 *address = (*reg & addr_mask);
982                 return addr_mask;
983         }
984
985         if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
986                 svm_inject_gp(vcpu, 0);
987                 return 0;
988         }
989
990         *address = (*reg & addr_mask) + seg->base;
991         return addr_mask;
992 }
993
994 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
995 {
996         u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
997         int _in = io_info & SVM_IOIO_TYPE_MASK;
998
999         ++kvm_stat.io_exits;
1000
1001         vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1002
1003         kvm_run->exit_reason = KVM_EXIT_IO;
1004         kvm_run->io.port = io_info >> 16;
1005         kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1006         kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1007         kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1008         kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1009
1010         if (kvm_run->io.string) {
1011                 unsigned addr_mask;
1012
1013                 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1014                 if (!addr_mask) {
1015                         printk(KERN_DEBUG "%s: get io address failed\n", __FUNCTION__);
1016                         return 1;
1017                 }
1018
1019                 if (kvm_run->io.rep) {
1020                         kvm_run->io.count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1021                         kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1022                                                    & X86_EFLAGS_DF) != 0;
1023                 }
1024         } else {
1025                 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1026         }
1027         return 0;
1028 }
1029
1030
1031 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1032 {
1033         return 1;
1034 }
1035
1036 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1037 {
1038         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1039         skip_emulated_instruction(vcpu);
1040         if (vcpu->irq_summary)
1041                 return 1;
1042
1043         kvm_run->exit_reason = KVM_EXIT_HLT;
1044         ++kvm_stat.halt_exits;
1045         return 0;
1046 }
1047
1048 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1049 {
1050         inject_ud(vcpu);
1051         return 1;
1052 }
1053
1054 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1055 {
1056         printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1057         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1058         return 0;
1059 }
1060
1061 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1062 {
1063         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1064         kvm_run->exit_reason = KVM_EXIT_CPUID;
1065         return 0;
1066 }
1067
1068 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1069 {
1070         if (emulate_instruction(vcpu, 0, 0, 0) != EMULATE_DONE)
1071                 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1072         return 1;
1073 }
1074
1075 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1076 {
1077         switch (ecx) {
1078         case MSR_IA32_TIME_STAMP_COUNTER: {
1079                 u64 tsc;
1080
1081                 rdtscll(tsc);
1082                 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1083                 break;
1084         }
1085         case MSR_K6_STAR:
1086                 *data = vcpu->svm->vmcb->save.star;
1087                 break;
1088 #ifdef CONFIG_X86_64
1089         case MSR_LSTAR:
1090                 *data = vcpu->svm->vmcb->save.lstar;
1091                 break;
1092         case MSR_CSTAR:
1093                 *data = vcpu->svm->vmcb->save.cstar;
1094                 break;
1095         case MSR_KERNEL_GS_BASE:
1096                 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1097                 break;
1098         case MSR_SYSCALL_MASK:
1099                 *data = vcpu->svm->vmcb->save.sfmask;
1100                 break;
1101 #endif
1102         case MSR_IA32_SYSENTER_CS:
1103                 *data = vcpu->svm->vmcb->save.sysenter_cs;
1104                 break;
1105         case MSR_IA32_SYSENTER_EIP:
1106                 *data = vcpu->svm->vmcb->save.sysenter_eip;
1107                 break;
1108         case MSR_IA32_SYSENTER_ESP:
1109                 *data = vcpu->svm->vmcb->save.sysenter_esp;
1110                 break;
1111         default:
1112                 return kvm_get_msr_common(vcpu, ecx, data);
1113         }
1114         return 0;
1115 }
1116
1117 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1118 {
1119         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1120         u64 data;
1121
1122         if (svm_get_msr(vcpu, ecx, &data))
1123                 svm_inject_gp(vcpu, 0);
1124         else {
1125                 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1126                 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1127                 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1128                 skip_emulated_instruction(vcpu);
1129         }
1130         return 1;
1131 }
1132
1133 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1134 {
1135         switch (ecx) {
1136         case MSR_IA32_TIME_STAMP_COUNTER: {
1137                 u64 tsc;
1138
1139                 rdtscll(tsc);
1140                 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1141                 break;
1142         }
1143         case MSR_K6_STAR:
1144                 vcpu->svm->vmcb->save.star = data;
1145                 break;
1146 #ifdef CONFIG_X86_64_
1147         case MSR_LSTAR:
1148                 vcpu->svm->vmcb->save.lstar = data;
1149                 break;
1150         case MSR_CSTAR:
1151                 vcpu->svm->vmcb->save.cstar = data;
1152                 break;
1153         case MSR_KERNEL_GS_BASE:
1154                 vcpu->svm->vmcb->save.kernel_gs_base = data;
1155                 break;
1156         case MSR_SYSCALL_MASK:
1157                 vcpu->svm->vmcb->save.sfmask = data;
1158                 break;
1159 #endif
1160         case MSR_IA32_SYSENTER_CS:
1161                 vcpu->svm->vmcb->save.sysenter_cs = data;
1162                 break;
1163         case MSR_IA32_SYSENTER_EIP:
1164                 vcpu->svm->vmcb->save.sysenter_eip = data;
1165                 break;
1166         case MSR_IA32_SYSENTER_ESP:
1167                 vcpu->svm->vmcb->save.sysenter_esp = data;
1168                 break;
1169         default:
1170                 return kvm_set_msr_common(vcpu, ecx, data);
1171         }
1172         return 0;
1173 }
1174
1175 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1176 {
1177         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1178         u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1179                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1180         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1181         if (svm_set_msr(vcpu, ecx, data))
1182                 svm_inject_gp(vcpu, 0);
1183         else
1184                 skip_emulated_instruction(vcpu);
1185         return 1;
1186 }
1187
1188 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1189 {
1190         if (vcpu->svm->vmcb->control.exit_info_1)
1191                 return wrmsr_interception(vcpu, kvm_run);
1192         else
1193                 return rdmsr_interception(vcpu, kvm_run);
1194 }
1195
1196 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1197                                    struct kvm_run *kvm_run)
1198 {
1199         /*
1200          * If the user space waits to inject interrupts, exit as soon as
1201          * possible
1202          */
1203         if (kvm_run->request_interrupt_window &&
1204             !vcpu->irq_summary &&
1205             (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF)) {
1206                 ++kvm_stat.irq_window_exits;
1207                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1208                 return 0;
1209         }
1210
1211         return 1;
1212 }
1213
1214 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1215                                       struct kvm_run *kvm_run) = {
1216         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1217         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1218         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1219         /* for now: */
1220         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1221         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1222         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1223         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1224         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1225         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1226         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1227         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1228         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1229         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1230         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1231         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1232         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1233         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1234         [SVM_EXIT_INTR]                         = nop_on_interception,
1235         [SVM_EXIT_NMI]                          = nop_on_interception,
1236         [SVM_EXIT_SMI]                          = nop_on_interception,
1237         [SVM_EXIT_INIT]                         = nop_on_interception,
1238         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1239         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1240         [SVM_EXIT_CPUID]                        = cpuid_interception,
1241         [SVM_EXIT_HLT]                          = halt_interception,
1242         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1243         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1244         [SVM_EXIT_IOIO]                         = io_interception,
1245         [SVM_EXIT_MSR]                          = msr_interception,
1246         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1247         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1248         [SVM_EXIT_VMMCALL]                      = invalid_op_interception,
1249         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1250         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1251         [SVM_EXIT_STGI]                         = invalid_op_interception,
1252         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1253         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1254 };
1255
1256
1257 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1258 {
1259         u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1260
1261         kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1262
1263         if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1264             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1265                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1266                        "exit_code 0x%x\n",
1267                        __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1268                        exit_code);
1269
1270         if (exit_code >= sizeof(svm_exit_handlers) / sizeof(*svm_exit_handlers)
1271             || svm_exit_handlers[exit_code] == 0) {
1272                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1273                 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1274                        __FUNCTION__,
1275                        exit_code,
1276                        vcpu->svm->vmcb->save.rip,
1277                        vcpu->cr0,
1278                        vcpu->svm->vmcb->save.rflags);
1279                 return 0;
1280         }
1281
1282         return svm_exit_handlers[exit_code](vcpu, kvm_run);
1283 }
1284
1285 static void reload_tss(struct kvm_vcpu *vcpu)
1286 {
1287         int cpu = raw_smp_processor_id();
1288
1289         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1290         svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1291         load_TR_desc();
1292 }
1293
1294 static void pre_svm_run(struct kvm_vcpu *vcpu)
1295 {
1296         int cpu = raw_smp_processor_id();
1297
1298         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1299
1300         vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1301         if (vcpu->cpu != cpu ||
1302             vcpu->svm->asid_generation != svm_data->asid_generation)
1303                 new_asid(vcpu, svm_data);
1304 }
1305
1306
1307 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1308 {
1309         struct vmcb_control_area *control;
1310
1311         control = &vcpu->svm->vmcb->control;
1312         control->int_vector = pop_irq(vcpu);
1313         control->int_ctl &= ~V_INTR_PRIO_MASK;
1314         control->int_ctl |= V_IRQ_MASK |
1315                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1316 }
1317
1318 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1319 {
1320         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1321
1322         if (control->int_ctl & V_IRQ_MASK) {
1323                 control->int_ctl &= ~V_IRQ_MASK;
1324                 push_irq(vcpu, control->int_vector);
1325         }
1326
1327         vcpu->interrupt_window_open =
1328                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1329 }
1330
1331 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1332                                        struct kvm_run *kvm_run)
1333 {
1334         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1335
1336         vcpu->interrupt_window_open =
1337                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1338                  (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1339
1340         if (vcpu->interrupt_window_open && vcpu->irq_summary)
1341                 /*
1342                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1343                  */
1344                 kvm_do_inject_irq(vcpu);
1345
1346         /*
1347          * Interrupts blocked.  Wait for unblock.
1348          */
1349         if (!vcpu->interrupt_window_open &&
1350             (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1351                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1352         } else
1353                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1354 }
1355
1356 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1357                               struct kvm_run *kvm_run)
1358 {
1359         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1360                                                   vcpu->irq_summary == 0);
1361         kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1362         kvm_run->cr8 = vcpu->cr8;
1363         kvm_run->apic_base = vcpu->apic_base;
1364 }
1365
1366 /*
1367  * Check if userspace requested an interrupt window, and that the
1368  * interrupt window is open.
1369  *
1370  * No need to exit to userspace if we already have an interrupt queued.
1371  */
1372 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1373                                           struct kvm_run *kvm_run)
1374 {
1375         return (!vcpu->irq_summary &&
1376                 kvm_run->request_interrupt_window &&
1377                 vcpu->interrupt_window_open &&
1378                 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1379 }
1380
1381 static void save_db_regs(unsigned long *db_regs)
1382 {
1383         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1384         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1385         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1386         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1387 }
1388
1389 static void load_db_regs(unsigned long *db_regs)
1390 {
1391         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1392         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1393         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1394         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1395 }
1396
1397 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1398 {
1399         u16 fs_selector;
1400         u16 gs_selector;
1401         u16 ldt_selector;
1402
1403 again:
1404         do_interrupt_requests(vcpu, kvm_run);
1405
1406         clgi();
1407
1408         pre_svm_run(vcpu);
1409
1410         save_host_msrs(vcpu);
1411         fs_selector = read_fs();
1412         gs_selector = read_gs();
1413         ldt_selector = read_ldt();
1414         vcpu->svm->host_cr2 = kvm_read_cr2();
1415         vcpu->svm->host_dr6 = read_dr6();
1416         vcpu->svm->host_dr7 = read_dr7();
1417         vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1418
1419         if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1420                 write_dr7(0);
1421                 save_db_regs(vcpu->svm->host_db_regs);
1422                 load_db_regs(vcpu->svm->db_regs);
1423         }
1424
1425         fx_save(vcpu->host_fx_image);
1426         fx_restore(vcpu->guest_fx_image);
1427
1428         asm volatile (
1429 #ifdef CONFIG_X86_64
1430                 "push %%rbx; push %%rcx; push %%rdx;"
1431                 "push %%rsi; push %%rdi; push %%rbp;"
1432                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1433                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1434 #else
1435                 "push %%ebx; push %%ecx; push %%edx;"
1436                 "push %%esi; push %%edi; push %%ebp;"
1437 #endif
1438
1439 #ifdef CONFIG_X86_64
1440                 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1441                 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1442                 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1443                 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1444                 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1445                 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1446                 "mov %c[r8](%[vcpu]),  %%r8  \n\t"
1447                 "mov %c[r9](%[vcpu]),  %%r9  \n\t"
1448                 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1449                 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1450                 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1451                 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1452                 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1453                 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1454 #else
1455                 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1456                 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1457                 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1458                 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1459                 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1460                 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1461 #endif
1462
1463 #ifdef CONFIG_X86_64
1464                 /* Enter guest mode */
1465                 "push %%rax \n\t"
1466                 "mov %c[svm](%[vcpu]), %%rax \n\t"
1467                 "mov %c[vmcb](%%rax), %%rax \n\t"
1468                 SVM_VMLOAD "\n\t"
1469                 SVM_VMRUN "\n\t"
1470                 SVM_VMSAVE "\n\t"
1471                 "pop %%rax \n\t"
1472 #else
1473                 /* Enter guest mode */
1474                 "push %%eax \n\t"
1475                 "mov %c[svm](%[vcpu]), %%eax \n\t"
1476                 "mov %c[vmcb](%%eax), %%eax \n\t"
1477                 SVM_VMLOAD "\n\t"
1478                 SVM_VMRUN "\n\t"
1479                 SVM_VMSAVE "\n\t"
1480                 "pop %%eax \n\t"
1481 #endif
1482
1483                 /* Save guest registers, load host registers */
1484 #ifdef CONFIG_X86_64
1485                 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1486                 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1487                 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1488                 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1489                 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1490                 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1491                 "mov %%r8,  %c[r8](%[vcpu]) \n\t"
1492                 "mov %%r9,  %c[r9](%[vcpu]) \n\t"
1493                 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1494                 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1495                 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1496                 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1497                 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1498                 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1499
1500                 "pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1501                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1502                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1503                 "pop  %%rdx; pop  %%rcx; pop  %%rbx; \n\t"
1504 #else
1505                 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1506                 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1507                 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1508                 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1509                 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1510                 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1511
1512                 "pop  %%ebp; pop  %%edi; pop  %%esi;"
1513                 "pop  %%edx; pop  %%ecx; pop  %%ebx; \n\t"
1514 #endif
1515                 :
1516                 : [vcpu]"a"(vcpu),
1517                   [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1518                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1519                   [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1520                   [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1521                   [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1522                   [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1523                   [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1524                   [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1525 #ifdef CONFIG_X86_64
1526                   ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1527                   [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1528                   [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1529                   [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1530                   [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1531                   [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1532                   [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1533                   [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1534 #endif
1535                 : "cc", "memory" );
1536
1537         fx_save(vcpu->guest_fx_image);
1538         fx_restore(vcpu->host_fx_image);
1539
1540         if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1541                 load_db_regs(vcpu->svm->host_db_regs);
1542
1543         vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1544
1545         write_dr6(vcpu->svm->host_dr6);
1546         write_dr7(vcpu->svm->host_dr7);
1547         kvm_write_cr2(vcpu->svm->host_cr2);
1548
1549         load_fs(fs_selector);
1550         load_gs(gs_selector);
1551         load_ldt(ldt_selector);
1552         load_host_msrs(vcpu);
1553
1554         reload_tss(vcpu);
1555
1556         stgi();
1557
1558         kvm_reput_irq(vcpu);
1559
1560         vcpu->svm->next_rip = 0;
1561
1562         if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1563                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1564                 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
1565                 post_kvm_run_save(vcpu, kvm_run);
1566                 return 0;
1567         }
1568
1569         if (handle_exit(vcpu, kvm_run)) {
1570                 if (signal_pending(current)) {
1571                         ++kvm_stat.signal_exits;
1572                         post_kvm_run_save(vcpu, kvm_run);
1573                         return -EINTR;
1574                 }
1575
1576                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1577                         ++kvm_stat.request_irq_exits;
1578                         post_kvm_run_save(vcpu, kvm_run);
1579                         return -EINTR;
1580                 }
1581                 kvm_resched(vcpu);
1582                 goto again;
1583         }
1584         post_kvm_run_save(vcpu, kvm_run);
1585         return 0;
1586 }
1587
1588 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1589 {
1590         force_new_asid(vcpu);
1591 }
1592
1593 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1594 {
1595         vcpu->svm->vmcb->save.cr3 = root;
1596         force_new_asid(vcpu);
1597 }
1598
1599 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1600                                   unsigned long  addr,
1601                                   uint32_t err_code)
1602 {
1603         uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1604
1605         ++kvm_stat.pf_guest;
1606
1607         if (is_page_fault(exit_int_info)) {
1608
1609                 vcpu->svm->vmcb->control.event_inj_err = 0;
1610                 vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1611                                                         SVM_EVTINJ_VALID_ERR |
1612                                                         SVM_EVTINJ_TYPE_EXEPT |
1613                                                         DF_VECTOR;
1614                 return;
1615         }
1616         vcpu->cr2 = addr;
1617         vcpu->svm->vmcb->save.cr2 = addr;
1618         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1619                                                 SVM_EVTINJ_VALID_ERR |
1620                                                 SVM_EVTINJ_TYPE_EXEPT |
1621                                                 PF_VECTOR;
1622         vcpu->svm->vmcb->control.event_inj_err = err_code;
1623 }
1624
1625
1626 static int is_disabled(void)
1627 {
1628         return 0;
1629 }
1630
1631 static struct kvm_arch_ops svm_arch_ops = {
1632         .cpu_has_kvm_support = has_svm,
1633         .disabled_by_bios = is_disabled,
1634         .hardware_setup = svm_hardware_setup,
1635         .hardware_unsetup = svm_hardware_unsetup,
1636         .hardware_enable = svm_hardware_enable,
1637         .hardware_disable = svm_hardware_disable,
1638
1639         .vcpu_create = svm_create_vcpu,
1640         .vcpu_free = svm_free_vcpu,
1641
1642         .vcpu_load = svm_vcpu_load,
1643         .vcpu_put = svm_vcpu_put,
1644
1645         .set_guest_debug = svm_guest_debug,
1646         .get_msr = svm_get_msr,
1647         .set_msr = svm_set_msr,
1648         .get_segment_base = svm_get_segment_base,
1649         .get_segment = svm_get_segment,
1650         .set_segment = svm_set_segment,
1651         .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1652         .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1653         .set_cr0 = svm_set_cr0,
1654         .set_cr0_no_modeswitch = svm_set_cr0,
1655         .set_cr3 = svm_set_cr3,
1656         .set_cr4 = svm_set_cr4,
1657         .set_efer = svm_set_efer,
1658         .get_idt = svm_get_idt,
1659         .set_idt = svm_set_idt,
1660         .get_gdt = svm_get_gdt,
1661         .set_gdt = svm_set_gdt,
1662         .get_dr = svm_get_dr,
1663         .set_dr = svm_set_dr,
1664         .cache_regs = svm_cache_regs,
1665         .decache_regs = svm_decache_regs,
1666         .get_rflags = svm_get_rflags,
1667         .set_rflags = svm_set_rflags,
1668
1669         .invlpg = svm_invlpg,
1670         .tlb_flush = svm_flush_tlb,
1671         .inject_page_fault = svm_inject_page_fault,
1672
1673         .inject_gp = svm_inject_gp,
1674
1675         .run = svm_vcpu_run,
1676         .skip_emulated_instruction = skip_emulated_instruction,
1677         .vcpu_setup = svm_vcpu_setup,
1678 };
1679
1680 static int __init svm_init(void)
1681 {
1682         return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1683 }
1684
1685 static void __exit svm_exit(void)
1686 {
1687         kvm_exit_arch();
1688 }
1689
1690 module_init(svm_init)
1691 module_exit(svm_exit)