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[PATCH] KVM: MMU: Flush guest tlb when reducing permissions on a pte
[linux-2.6-omap-h63xx.git] / drivers / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25
26 #include "vmx.h"
27 #include "kvm.h"
28
29 #define pgprintk(x...) do { printk(x); } while (0)
30 #define rmap_printk(x...) do { printk(x); } while (0)
31
32 #define ASSERT(x)                                                       \
33         if (!(x)) {                                                     \
34                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
35                        __FILE__, __LINE__, #x);                         \
36         }
37
38 #define PT64_PT_BITS 9
39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
40 #define PT32_PT_BITS 10
41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
42
43 #define PT_WRITABLE_SHIFT 1
44
45 #define PT_PRESENT_MASK (1ULL << 0)
46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
47 #define PT_USER_MASK (1ULL << 2)
48 #define PT_PWT_MASK (1ULL << 3)
49 #define PT_PCD_MASK (1ULL << 4)
50 #define PT_ACCESSED_MASK (1ULL << 5)
51 #define PT_DIRTY_MASK (1ULL << 6)
52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
53 #define PT_PAT_MASK (1ULL << 7)
54 #define PT_GLOBAL_MASK (1ULL << 8)
55 #define PT64_NX_MASK (1ULL << 63)
56
57 #define PT_PAT_SHIFT 7
58 #define PT_DIR_PAT_SHIFT 12
59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
60
61 #define PT32_DIR_PSE36_SIZE 4
62 #define PT32_DIR_PSE36_SHIFT 13
63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
64
65
66 #define PT32_PTE_COPY_MASK \
67         (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
68
69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
70
71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
73
74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
76
77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
79
80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
82
83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
84
85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
86
87 #define PT64_LEVEL_BITS 9
88
89 #define PT64_LEVEL_SHIFT(level) \
90                 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
91
92 #define PT64_LEVEL_MASK(level) \
93                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
94
95 #define PT64_INDEX(address, level)\
96         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
97
98
99 #define PT32_LEVEL_BITS 10
100
101 #define PT32_LEVEL_SHIFT(level) \
102                 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
103
104 #define PT32_LEVEL_MASK(level) \
105                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
106
107 #define PT32_INDEX(address, level)\
108         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
109
110
111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
112 #define PT64_DIR_BASE_ADDR_MASK \
113         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
114
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118
119
120 #define PFERR_PRESENT_MASK (1U << 0)
121 #define PFERR_WRITE_MASK (1U << 1)
122 #define PFERR_USER_MASK (1U << 2)
123
124 #define PT64_ROOT_LEVEL 4
125 #define PT32_ROOT_LEVEL 2
126 #define PT32E_ROOT_LEVEL 3
127
128 #define PT_DIRECTORY_LEVEL 2
129 #define PT_PAGE_TABLE_LEVEL 1
130
131 #define RMAP_EXT 4
132
133 struct kvm_rmap_desc {
134         u64 *shadow_ptes[RMAP_EXT];
135         struct kvm_rmap_desc *more;
136 };
137
138 static int is_write_protection(struct kvm_vcpu *vcpu)
139 {
140         return vcpu->cr0 & CR0_WP_MASK;
141 }
142
143 static int is_cpuid_PSE36(void)
144 {
145         return 1;
146 }
147
148 static int is_present_pte(unsigned long pte)
149 {
150         return pte & PT_PRESENT_MASK;
151 }
152
153 static int is_writeble_pte(unsigned long pte)
154 {
155         return pte & PT_WRITABLE_MASK;
156 }
157
158 static int is_io_pte(unsigned long pte)
159 {
160         return pte & PT_SHADOW_IO_MARK;
161 }
162
163 static int is_rmap_pte(u64 pte)
164 {
165         return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
166                 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
167 }
168
169 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
170                                   size_t objsize, int min)
171 {
172         void *obj;
173
174         if (cache->nobjs >= min)
175                 return 0;
176         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
177                 obj = kzalloc(objsize, GFP_NOWAIT);
178                 if (!obj)
179                         return -ENOMEM;
180                 cache->objects[cache->nobjs++] = obj;
181         }
182         return 0;
183 }
184
185 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
186 {
187         while (mc->nobjs)
188                 kfree(mc->objects[--mc->nobjs]);
189 }
190
191 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
192 {
193         int r;
194
195         r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
196                                    sizeof(struct kvm_pte_chain), 4);
197         if (r)
198                 goto out;
199         r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
200                                    sizeof(struct kvm_rmap_desc), 1);
201 out:
202         return r;
203 }
204
205 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
206 {
207         mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
208         mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
209 }
210
211 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
212                                     size_t size)
213 {
214         void *p;
215
216         BUG_ON(!mc->nobjs);
217         p = mc->objects[--mc->nobjs];
218         memset(p, 0, size);
219         return p;
220 }
221
222 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
223 {
224         if (mc->nobjs < KVM_NR_MEM_OBJS)
225                 mc->objects[mc->nobjs++] = obj;
226         else
227                 kfree(obj);
228 }
229
230 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
231 {
232         return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
233                                       sizeof(struct kvm_pte_chain));
234 }
235
236 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
237                                struct kvm_pte_chain *pc)
238 {
239         mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
240 }
241
242 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
243 {
244         return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
245                                       sizeof(struct kvm_rmap_desc));
246 }
247
248 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
249                                struct kvm_rmap_desc *rd)
250 {
251         mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
252 }
253
254 /*
255  * Reverse mapping data structures:
256  *
257  * If page->private bit zero is zero, then page->private points to the
258  * shadow page table entry that points to page_address(page).
259  *
260  * If page->private bit zero is one, (then page->private & ~1) points
261  * to a struct kvm_rmap_desc containing more mappings.
262  */
263 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
264 {
265         struct page *page;
266         struct kvm_rmap_desc *desc;
267         int i;
268
269         if (!is_rmap_pte(*spte))
270                 return;
271         page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
272         if (!page->private) {
273                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
274                 page->private = (unsigned long)spte;
275         } else if (!(page->private & 1)) {
276                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
277                 desc = mmu_alloc_rmap_desc(vcpu);
278                 desc->shadow_ptes[0] = (u64 *)page->private;
279                 desc->shadow_ptes[1] = spte;
280                 page->private = (unsigned long)desc | 1;
281         } else {
282                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
283                 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
284                 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
285                         desc = desc->more;
286                 if (desc->shadow_ptes[RMAP_EXT-1]) {
287                         desc->more = mmu_alloc_rmap_desc(vcpu);
288                         desc = desc->more;
289                 }
290                 for (i = 0; desc->shadow_ptes[i]; ++i)
291                         ;
292                 desc->shadow_ptes[i] = spte;
293         }
294 }
295
296 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
297                                    struct page *page,
298                                    struct kvm_rmap_desc *desc,
299                                    int i,
300                                    struct kvm_rmap_desc *prev_desc)
301 {
302         int j;
303
304         for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
305                 ;
306         desc->shadow_ptes[i] = desc->shadow_ptes[j];
307         desc->shadow_ptes[j] = 0;
308         if (j != 0)
309                 return;
310         if (!prev_desc && !desc->more)
311                 page->private = (unsigned long)desc->shadow_ptes[0];
312         else
313                 if (prev_desc)
314                         prev_desc->more = desc->more;
315                 else
316                         page->private = (unsigned long)desc->more | 1;
317         mmu_free_rmap_desc(vcpu, desc);
318 }
319
320 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
321 {
322         struct page *page;
323         struct kvm_rmap_desc *desc;
324         struct kvm_rmap_desc *prev_desc;
325         int i;
326
327         if (!is_rmap_pte(*spte))
328                 return;
329         page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
330         if (!page->private) {
331                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
332                 BUG();
333         } else if (!(page->private & 1)) {
334                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
335                 if ((u64 *)page->private != spte) {
336                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
337                                spte, *spte);
338                         BUG();
339                 }
340                 page->private = 0;
341         } else {
342                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
343                 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
344                 prev_desc = NULL;
345                 while (desc) {
346                         for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
347                                 if (desc->shadow_ptes[i] == spte) {
348                                         rmap_desc_remove_entry(vcpu, page,
349                                                                desc, i,
350                                                                prev_desc);
351                                         return;
352                                 }
353                         prev_desc = desc;
354                         desc = desc->more;
355                 }
356                 BUG();
357         }
358 }
359
360 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
361 {
362         struct kvm *kvm = vcpu->kvm;
363         struct page *page;
364         struct kvm_memory_slot *slot;
365         struct kvm_rmap_desc *desc;
366         u64 *spte;
367
368         slot = gfn_to_memslot(kvm, gfn);
369         BUG_ON(!slot);
370         page = gfn_to_page(slot, gfn);
371
372         while (page->private) {
373                 if (!(page->private & 1))
374                         spte = (u64 *)page->private;
375                 else {
376                         desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
377                         spte = desc->shadow_ptes[0];
378                 }
379                 BUG_ON(!spte);
380                 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
381                        page_to_pfn(page) << PAGE_SHIFT);
382                 BUG_ON(!(*spte & PT_PRESENT_MASK));
383                 BUG_ON(!(*spte & PT_WRITABLE_MASK));
384                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
385                 rmap_remove(vcpu, spte);
386                 kvm_arch_ops->tlb_flush(vcpu);
387                 *spte &= ~(u64)PT_WRITABLE_MASK;
388         }
389 }
390
391 static int is_empty_shadow_page(hpa_t page_hpa)
392 {
393         u64 *pos;
394         u64 *end;
395
396         for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
397                       pos != end; pos++)
398                 if (*pos != 0) {
399                         printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
400                                pos, *pos);
401                         return 0;
402                 }
403         return 1;
404 }
405
406 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
407 {
408         struct kvm_mmu_page *page_head = page_header(page_hpa);
409
410         ASSERT(is_empty_shadow_page(page_hpa));
411         list_del(&page_head->link);
412         page_head->page_hpa = page_hpa;
413         list_add(&page_head->link, &vcpu->free_pages);
414         ++vcpu->kvm->n_free_mmu_pages;
415 }
416
417 static unsigned kvm_page_table_hashfn(gfn_t gfn)
418 {
419         return gfn;
420 }
421
422 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
423                                                u64 *parent_pte)
424 {
425         struct kvm_mmu_page *page;
426
427         if (list_empty(&vcpu->free_pages))
428                 return NULL;
429
430         page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
431         list_del(&page->link);
432         list_add(&page->link, &vcpu->kvm->active_mmu_pages);
433         ASSERT(is_empty_shadow_page(page->page_hpa));
434         page->slot_bitmap = 0;
435         page->global = 1;
436         page->multimapped = 0;
437         page->parent_pte = parent_pte;
438         --vcpu->kvm->n_free_mmu_pages;
439         return page;
440 }
441
442 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
443                                     struct kvm_mmu_page *page, u64 *parent_pte)
444 {
445         struct kvm_pte_chain *pte_chain;
446         struct hlist_node *node;
447         int i;
448
449         if (!parent_pte)
450                 return;
451         if (!page->multimapped) {
452                 u64 *old = page->parent_pte;
453
454                 if (!old) {
455                         page->parent_pte = parent_pte;
456                         return;
457                 }
458                 page->multimapped = 1;
459                 pte_chain = mmu_alloc_pte_chain(vcpu);
460                 INIT_HLIST_HEAD(&page->parent_ptes);
461                 hlist_add_head(&pte_chain->link, &page->parent_ptes);
462                 pte_chain->parent_ptes[0] = old;
463         }
464         hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
465                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
466                         continue;
467                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
468                         if (!pte_chain->parent_ptes[i]) {
469                                 pte_chain->parent_ptes[i] = parent_pte;
470                                 return;
471                         }
472         }
473         pte_chain = mmu_alloc_pte_chain(vcpu);
474         BUG_ON(!pte_chain);
475         hlist_add_head(&pte_chain->link, &page->parent_ptes);
476         pte_chain->parent_ptes[0] = parent_pte;
477 }
478
479 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
480                                        struct kvm_mmu_page *page,
481                                        u64 *parent_pte)
482 {
483         struct kvm_pte_chain *pte_chain;
484         struct hlist_node *node;
485         int i;
486
487         if (!page->multimapped) {
488                 BUG_ON(page->parent_pte != parent_pte);
489                 page->parent_pte = NULL;
490                 return;
491         }
492         hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
493                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
494                         if (!pte_chain->parent_ptes[i])
495                                 break;
496                         if (pte_chain->parent_ptes[i] != parent_pte)
497                                 continue;
498                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
499                                 && pte_chain->parent_ptes[i + 1]) {
500                                 pte_chain->parent_ptes[i]
501                                         = pte_chain->parent_ptes[i + 1];
502                                 ++i;
503                         }
504                         pte_chain->parent_ptes[i] = NULL;
505                         if (i == 0) {
506                                 hlist_del(&pte_chain->link);
507                                 mmu_free_pte_chain(vcpu, pte_chain);
508                                 if (hlist_empty(&page->parent_ptes)) {
509                                         page->multimapped = 0;
510                                         page->parent_pte = NULL;
511                                 }
512                         }
513                         return;
514                 }
515         BUG();
516 }
517
518 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
519                                                 gfn_t gfn)
520 {
521         unsigned index;
522         struct hlist_head *bucket;
523         struct kvm_mmu_page *page;
524         struct hlist_node *node;
525
526         pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
527         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
528         bucket = &vcpu->kvm->mmu_page_hash[index];
529         hlist_for_each_entry(page, node, bucket, hash_link)
530                 if (page->gfn == gfn && !page->role.metaphysical) {
531                         pgprintk("%s: found role %x\n",
532                                  __FUNCTION__, page->role.word);
533                         return page;
534                 }
535         return NULL;
536 }
537
538 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
539                                              gfn_t gfn,
540                                              gva_t gaddr,
541                                              unsigned level,
542                                              int metaphysical,
543                                              u64 *parent_pte)
544 {
545         union kvm_mmu_page_role role;
546         unsigned index;
547         unsigned quadrant;
548         struct hlist_head *bucket;
549         struct kvm_mmu_page *page;
550         struct hlist_node *node;
551
552         role.word = 0;
553         role.glevels = vcpu->mmu.root_level;
554         role.level = level;
555         role.metaphysical = metaphysical;
556         if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
557                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
558                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
559                 role.quadrant = quadrant;
560         }
561         pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
562                  gfn, role.word);
563         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
564         bucket = &vcpu->kvm->mmu_page_hash[index];
565         hlist_for_each_entry(page, node, bucket, hash_link)
566                 if (page->gfn == gfn && page->role.word == role.word) {
567                         mmu_page_add_parent_pte(vcpu, page, parent_pte);
568                         pgprintk("%s: found\n", __FUNCTION__);
569                         return page;
570                 }
571         page = kvm_mmu_alloc_page(vcpu, parent_pte);
572         if (!page)
573                 return page;
574         pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
575         page->gfn = gfn;
576         page->role = role;
577         hlist_add_head(&page->hash_link, bucket);
578         if (!metaphysical)
579                 rmap_write_protect(vcpu, gfn);
580         return page;
581 }
582
583 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
584                                          struct kvm_mmu_page *page)
585 {
586         unsigned i;
587         u64 *pt;
588         u64 ent;
589
590         pt = __va(page->page_hpa);
591
592         if (page->role.level == PT_PAGE_TABLE_LEVEL) {
593                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
594                         if (pt[i] & PT_PRESENT_MASK)
595                                 rmap_remove(vcpu, &pt[i]);
596                         pt[i] = 0;
597                 }
598                 kvm_arch_ops->tlb_flush(vcpu);
599                 return;
600         }
601
602         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
603                 ent = pt[i];
604
605                 pt[i] = 0;
606                 if (!(ent & PT_PRESENT_MASK))
607                         continue;
608                 ent &= PT64_BASE_ADDR_MASK;
609                 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
610         }
611 }
612
613 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
614                              struct kvm_mmu_page *page,
615                              u64 *parent_pte)
616 {
617         mmu_page_remove_parent_pte(vcpu, page, parent_pte);
618 }
619
620 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
621                              struct kvm_mmu_page *page)
622 {
623         u64 *parent_pte;
624
625         while (page->multimapped || page->parent_pte) {
626                 if (!page->multimapped)
627                         parent_pte = page->parent_pte;
628                 else {
629                         struct kvm_pte_chain *chain;
630
631                         chain = container_of(page->parent_ptes.first,
632                                              struct kvm_pte_chain, link);
633                         parent_pte = chain->parent_ptes[0];
634                 }
635                 BUG_ON(!parent_pte);
636                 kvm_mmu_put_page(vcpu, page, parent_pte);
637                 *parent_pte = 0;
638         }
639         kvm_mmu_page_unlink_children(vcpu, page);
640         if (!page->root_count) {
641                 hlist_del(&page->hash_link);
642                 kvm_mmu_free_page(vcpu, page->page_hpa);
643         } else {
644                 list_del(&page->link);
645                 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
646         }
647 }
648
649 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
650 {
651         unsigned index;
652         struct hlist_head *bucket;
653         struct kvm_mmu_page *page;
654         struct hlist_node *node, *n;
655         int r;
656
657         pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
658         r = 0;
659         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
660         bucket = &vcpu->kvm->mmu_page_hash[index];
661         hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
662                 if (page->gfn == gfn && !page->role.metaphysical) {
663                         pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
664                                  page->role.word);
665                         kvm_mmu_zap_page(vcpu, page);
666                         r = 1;
667                 }
668         return r;
669 }
670
671 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
672 {
673         int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
674         struct kvm_mmu_page *page_head = page_header(__pa(pte));
675
676         __set_bit(slot, &page_head->slot_bitmap);
677 }
678
679 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
680 {
681         hpa_t hpa = gpa_to_hpa(vcpu, gpa);
682
683         return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
684 }
685
686 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
687 {
688         struct kvm_memory_slot *slot;
689         struct page *page;
690
691         ASSERT((gpa & HPA_ERR_MASK) == 0);
692         slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
693         if (!slot)
694                 return gpa | HPA_ERR_MASK;
695         page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
696         return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
697                 | (gpa & (PAGE_SIZE-1));
698 }
699
700 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
701 {
702         gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
703
704         if (gpa == UNMAPPED_GVA)
705                 return UNMAPPED_GVA;
706         return gpa_to_hpa(vcpu, gpa);
707 }
708
709 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
710 {
711 }
712
713 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
714 {
715         int level = PT32E_ROOT_LEVEL;
716         hpa_t table_addr = vcpu->mmu.root_hpa;
717
718         for (; ; level--) {
719                 u32 index = PT64_INDEX(v, level);
720                 u64 *table;
721                 u64 pte;
722
723                 ASSERT(VALID_PAGE(table_addr));
724                 table = __va(table_addr);
725
726                 if (level == 1) {
727                         pte = table[index];
728                         if (is_present_pte(pte) && is_writeble_pte(pte))
729                                 return 0;
730                         mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
731                         page_header_update_slot(vcpu->kvm, table, v);
732                         table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
733                                                                 PT_USER_MASK;
734                         rmap_add(vcpu, &table[index]);
735                         return 0;
736                 }
737
738                 if (table[index] == 0) {
739                         struct kvm_mmu_page *new_table;
740                         gfn_t pseudo_gfn;
741
742                         pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
743                                 >> PAGE_SHIFT;
744                         new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
745                                                      v, level - 1,
746                                                      1, &table[index]);
747                         if (!new_table) {
748                                 pgprintk("nonpaging_map: ENOMEM\n");
749                                 return -ENOMEM;
750                         }
751
752                         table[index] = new_table->page_hpa | PT_PRESENT_MASK
753                                 | PT_WRITABLE_MASK | PT_USER_MASK;
754                 }
755                 table_addr = table[index] & PT64_BASE_ADDR_MASK;
756         }
757 }
758
759 static void mmu_free_roots(struct kvm_vcpu *vcpu)
760 {
761         int i;
762         struct kvm_mmu_page *page;
763
764 #ifdef CONFIG_X86_64
765         if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
766                 hpa_t root = vcpu->mmu.root_hpa;
767
768                 ASSERT(VALID_PAGE(root));
769                 page = page_header(root);
770                 --page->root_count;
771                 vcpu->mmu.root_hpa = INVALID_PAGE;
772                 return;
773         }
774 #endif
775         for (i = 0; i < 4; ++i) {
776                 hpa_t root = vcpu->mmu.pae_root[i];
777
778                 ASSERT(VALID_PAGE(root));
779                 root &= PT64_BASE_ADDR_MASK;
780                 page = page_header(root);
781                 --page->root_count;
782                 vcpu->mmu.pae_root[i] = INVALID_PAGE;
783         }
784         vcpu->mmu.root_hpa = INVALID_PAGE;
785 }
786
787 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
788 {
789         int i;
790         gfn_t root_gfn;
791         struct kvm_mmu_page *page;
792
793         root_gfn = vcpu->cr3 >> PAGE_SHIFT;
794
795 #ifdef CONFIG_X86_64
796         if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
797                 hpa_t root = vcpu->mmu.root_hpa;
798
799                 ASSERT(!VALID_PAGE(root));
800                 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
801                                         PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
802                 page = page_header(root);
803                 ++page->root_count;
804                 vcpu->mmu.root_hpa = root;
805                 return;
806         }
807 #endif
808         for (i = 0; i < 4; ++i) {
809                 hpa_t root = vcpu->mmu.pae_root[i];
810
811                 ASSERT(!VALID_PAGE(root));
812                 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
813                         root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
814                 else if (vcpu->mmu.root_level == 0)
815                         root_gfn = 0;
816                 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
817                                         PT32_ROOT_LEVEL, !is_paging(vcpu),
818                                         NULL)->page_hpa;
819                 page = page_header(root);
820                 ++page->root_count;
821                 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
822         }
823         vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
824 }
825
826 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
827 {
828         return vaddr;
829 }
830
831 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
832                                u32 error_code)
833 {
834         gpa_t addr = gva;
835         hpa_t paddr;
836         int r;
837
838         r = mmu_topup_memory_caches(vcpu);
839         if (r)
840                 return r;
841
842         ASSERT(vcpu);
843         ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
844
845
846         paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
847
848         if (is_error_hpa(paddr))
849                 return 1;
850
851         return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
852 }
853
854 static void nonpaging_free(struct kvm_vcpu *vcpu)
855 {
856         mmu_free_roots(vcpu);
857 }
858
859 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
860 {
861         struct kvm_mmu *context = &vcpu->mmu;
862
863         context->new_cr3 = nonpaging_new_cr3;
864         context->page_fault = nonpaging_page_fault;
865         context->gva_to_gpa = nonpaging_gva_to_gpa;
866         context->free = nonpaging_free;
867         context->root_level = 0;
868         context->shadow_root_level = PT32E_ROOT_LEVEL;
869         mmu_alloc_roots(vcpu);
870         ASSERT(VALID_PAGE(context->root_hpa));
871         kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
872         return 0;
873 }
874
875 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
876 {
877         ++kvm_stat.tlb_flush;
878         kvm_arch_ops->tlb_flush(vcpu);
879 }
880
881 static void paging_new_cr3(struct kvm_vcpu *vcpu)
882 {
883         pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
884         mmu_free_roots(vcpu);
885         mmu_alloc_roots(vcpu);
886         kvm_mmu_flush_tlb(vcpu);
887         kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
888 }
889
890 static void mark_pagetable_nonglobal(void *shadow_pte)
891 {
892         page_header(__pa(shadow_pte))->global = 0;
893 }
894
895 static inline void set_pte_common(struct kvm_vcpu *vcpu,
896                              u64 *shadow_pte,
897                              gpa_t gaddr,
898                              int dirty,
899                              u64 access_bits,
900                              gfn_t gfn)
901 {
902         hpa_t paddr;
903
904         *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
905         if (!dirty)
906                 access_bits &= ~PT_WRITABLE_MASK;
907
908         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
909
910         *shadow_pte |= access_bits;
911
912         if (!(*shadow_pte & PT_GLOBAL_MASK))
913                 mark_pagetable_nonglobal(shadow_pte);
914
915         if (is_error_hpa(paddr)) {
916                 *shadow_pte |= gaddr;
917                 *shadow_pte |= PT_SHADOW_IO_MARK;
918                 *shadow_pte &= ~PT_PRESENT_MASK;
919                 return;
920         }
921
922         *shadow_pte |= paddr;
923
924         if (access_bits & PT_WRITABLE_MASK) {
925                 struct kvm_mmu_page *shadow;
926
927                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
928                 if (shadow) {
929                         pgprintk("%s: found shadow page for %lx, marking ro\n",
930                                  __FUNCTION__, gfn);
931                         access_bits &= ~PT_WRITABLE_MASK;
932                         if (is_writeble_pte(*shadow_pte)) {
933                                     *shadow_pte &= ~PT_WRITABLE_MASK;
934                                     kvm_arch_ops->tlb_flush(vcpu);
935                         }
936                 }
937         }
938
939         if (access_bits & PT_WRITABLE_MASK)
940                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
941
942         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
943         rmap_add(vcpu, shadow_pte);
944 }
945
946 static void inject_page_fault(struct kvm_vcpu *vcpu,
947                               u64 addr,
948                               u32 err_code)
949 {
950         kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
951 }
952
953 static inline int fix_read_pf(u64 *shadow_ent)
954 {
955         if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
956             !(*shadow_ent & PT_USER_MASK)) {
957                 /*
958                  * If supervisor write protect is disabled, we shadow kernel
959                  * pages as user pages so we can trap the write access.
960                  */
961                 *shadow_ent |= PT_USER_MASK;
962                 *shadow_ent &= ~PT_WRITABLE_MASK;
963
964                 return 1;
965
966         }
967         return 0;
968 }
969
970 static int may_access(u64 pte, int write, int user)
971 {
972
973         if (user && !(pte & PT_USER_MASK))
974                 return 0;
975         if (write && !(pte & PT_WRITABLE_MASK))
976                 return 0;
977         return 1;
978 }
979
980 static void paging_free(struct kvm_vcpu *vcpu)
981 {
982         nonpaging_free(vcpu);
983 }
984
985 #define PTTYPE 64
986 #include "paging_tmpl.h"
987 #undef PTTYPE
988
989 #define PTTYPE 32
990 #include "paging_tmpl.h"
991 #undef PTTYPE
992
993 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
994 {
995         struct kvm_mmu *context = &vcpu->mmu;
996
997         ASSERT(is_pae(vcpu));
998         context->new_cr3 = paging_new_cr3;
999         context->page_fault = paging64_page_fault;
1000         context->gva_to_gpa = paging64_gva_to_gpa;
1001         context->free = paging_free;
1002         context->root_level = level;
1003         context->shadow_root_level = level;
1004         mmu_alloc_roots(vcpu);
1005         ASSERT(VALID_PAGE(context->root_hpa));
1006         kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1007                     (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1008         return 0;
1009 }
1010
1011 static int paging64_init_context(struct kvm_vcpu *vcpu)
1012 {
1013         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1014 }
1015
1016 static int paging32_init_context(struct kvm_vcpu *vcpu)
1017 {
1018         struct kvm_mmu *context = &vcpu->mmu;
1019
1020         context->new_cr3 = paging_new_cr3;
1021         context->page_fault = paging32_page_fault;
1022         context->gva_to_gpa = paging32_gva_to_gpa;
1023         context->free = paging_free;
1024         context->root_level = PT32_ROOT_LEVEL;
1025         context->shadow_root_level = PT32E_ROOT_LEVEL;
1026         mmu_alloc_roots(vcpu);
1027         ASSERT(VALID_PAGE(context->root_hpa));
1028         kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1029                     (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1030         return 0;
1031 }
1032
1033 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1034 {
1035         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1036 }
1037
1038 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1039 {
1040         ASSERT(vcpu);
1041         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1042
1043         if (!is_paging(vcpu))
1044                 return nonpaging_init_context(vcpu);
1045         else if (is_long_mode(vcpu))
1046                 return paging64_init_context(vcpu);
1047         else if (is_pae(vcpu))
1048                 return paging32E_init_context(vcpu);
1049         else
1050                 return paging32_init_context(vcpu);
1051 }
1052
1053 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1054 {
1055         ASSERT(vcpu);
1056         if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1057                 vcpu->mmu.free(vcpu);
1058                 vcpu->mmu.root_hpa = INVALID_PAGE;
1059         }
1060 }
1061
1062 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1063 {
1064         int r;
1065
1066         destroy_kvm_mmu(vcpu);
1067         r = init_kvm_mmu(vcpu);
1068         if (r < 0)
1069                 goto out;
1070         r = mmu_topup_memory_caches(vcpu);
1071 out:
1072         return r;
1073 }
1074
1075 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1076 {
1077         gfn_t gfn = gpa >> PAGE_SHIFT;
1078         struct kvm_mmu_page *page;
1079         struct kvm_mmu_page *child;
1080         struct hlist_node *node, *n;
1081         struct hlist_head *bucket;
1082         unsigned index;
1083         u64 *spte;
1084         u64 pte;
1085         unsigned offset = offset_in_page(gpa);
1086         unsigned pte_size;
1087         unsigned page_offset;
1088         unsigned misaligned;
1089         int level;
1090         int flooded = 0;
1091
1092         pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1093         if (gfn == vcpu->last_pt_write_gfn) {
1094                 ++vcpu->last_pt_write_count;
1095                 if (vcpu->last_pt_write_count >= 3)
1096                         flooded = 1;
1097         } else {
1098                 vcpu->last_pt_write_gfn = gfn;
1099                 vcpu->last_pt_write_count = 1;
1100         }
1101         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1102         bucket = &vcpu->kvm->mmu_page_hash[index];
1103         hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1104                 if (page->gfn != gfn || page->role.metaphysical)
1105                         continue;
1106                 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1107                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1108                 if (misaligned || flooded) {
1109                         /*
1110                          * Misaligned accesses are too much trouble to fix
1111                          * up; also, they usually indicate a page is not used
1112                          * as a page table.
1113                          *
1114                          * If we're seeing too many writes to a page,
1115                          * it may no longer be a page table, or we may be
1116                          * forking, in which case it is better to unmap the
1117                          * page.
1118                          */
1119                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1120                                  gpa, bytes, page->role.word);
1121                         kvm_mmu_zap_page(vcpu, page);
1122                         continue;
1123                 }
1124                 page_offset = offset;
1125                 level = page->role.level;
1126                 if (page->role.glevels == PT32_ROOT_LEVEL) {
1127                         page_offset <<= 1;          /* 32->64 */
1128                         page_offset &= ~PAGE_MASK;
1129                 }
1130                 spte = __va(page->page_hpa);
1131                 spte += page_offset / sizeof(*spte);
1132                 pte = *spte;
1133                 if (is_present_pte(pte)) {
1134                         if (level == PT_PAGE_TABLE_LEVEL)
1135                                 rmap_remove(vcpu, spte);
1136                         else {
1137                                 child = page_header(pte & PT64_BASE_ADDR_MASK);
1138                                 mmu_page_remove_parent_pte(vcpu, child, spte);
1139                         }
1140                 }
1141                 *spte = 0;
1142         }
1143 }
1144
1145 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1146 {
1147 }
1148
1149 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1150 {
1151         gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1152
1153         return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1154 }
1155
1156 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1157 {
1158         while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1159                 struct kvm_mmu_page *page;
1160
1161                 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1162                                     struct kvm_mmu_page, link);
1163                 kvm_mmu_zap_page(vcpu, page);
1164         }
1165 }
1166 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1167
1168 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1169 {
1170         struct kvm_mmu_page *page;
1171
1172         while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1173                 page = container_of(vcpu->kvm->active_mmu_pages.next,
1174                                     struct kvm_mmu_page, link);
1175                 kvm_mmu_zap_page(vcpu, page);
1176         }
1177         while (!list_empty(&vcpu->free_pages)) {
1178                 page = list_entry(vcpu->free_pages.next,
1179                                   struct kvm_mmu_page, link);
1180                 list_del(&page->link);
1181                 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1182                 page->page_hpa = INVALID_PAGE;
1183         }
1184         free_page((unsigned long)vcpu->mmu.pae_root);
1185 }
1186
1187 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1188 {
1189         struct page *page;
1190         int i;
1191
1192         ASSERT(vcpu);
1193
1194         for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1195                 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1196
1197                 INIT_LIST_HEAD(&page_header->link);
1198                 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1199                         goto error_1;
1200                 page->private = (unsigned long)page_header;
1201                 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1202                 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1203                 list_add(&page_header->link, &vcpu->free_pages);
1204                 ++vcpu->kvm->n_free_mmu_pages;
1205         }
1206
1207         /*
1208          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1209          * Therefore we need to allocate shadow page tables in the first
1210          * 4GB of memory, which happens to fit the DMA32 zone.
1211          */
1212         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1213         if (!page)
1214                 goto error_1;
1215         vcpu->mmu.pae_root = page_address(page);
1216         for (i = 0; i < 4; ++i)
1217                 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1218
1219         return 0;
1220
1221 error_1:
1222         free_mmu_pages(vcpu);
1223         return -ENOMEM;
1224 }
1225
1226 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1227 {
1228         ASSERT(vcpu);
1229         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1230         ASSERT(list_empty(&vcpu->free_pages));
1231
1232         return alloc_mmu_pages(vcpu);
1233 }
1234
1235 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1236 {
1237         ASSERT(vcpu);
1238         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1239         ASSERT(!list_empty(&vcpu->free_pages));
1240
1241         return init_kvm_mmu(vcpu);
1242 }
1243
1244 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1245 {
1246         ASSERT(vcpu);
1247
1248         destroy_kvm_mmu(vcpu);
1249         free_mmu_pages(vcpu);
1250         mmu_free_memory_caches(vcpu);
1251 }
1252
1253 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1254 {
1255         struct kvm *kvm = vcpu->kvm;
1256         struct kvm_mmu_page *page;
1257
1258         list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1259                 int i;
1260                 u64 *pt;
1261
1262                 if (!test_bit(slot, &page->slot_bitmap))
1263                         continue;
1264
1265                 pt = __va(page->page_hpa);
1266                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1267                         /* avoid RMW */
1268                         if (pt[i] & PT_WRITABLE_MASK) {
1269                                 rmap_remove(vcpu, &pt[i]);
1270                                 pt[i] &= ~PT_WRITABLE_MASK;
1271                         }
1272         }
1273 }