1 #ifndef _IPATH_KERNEL_H
2 #define _IPATH_KERNEL_H
4 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
5 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 * This header file is the base header file for infinipath kernel code
38 * ipath_user.h serves a similar purpose for user code.
41 #include <linux/interrupt.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/mutex.h>
46 #include <rdma/ib_verbs.h>
48 #include "ipath_common.h"
49 #include "ipath_debug.h"
50 #include "ipath_registers.h"
52 /* only s/w major version of InfiniPath we can handle */
53 #define IPATH_CHIP_VERS_MAJ 2U
55 /* don't care about this except printing */
56 #define IPATH_CHIP_VERS_MIN 0U
58 /* temporary, maybe always */
59 extern struct infinipath_stats ipath_stats;
61 #define IPATH_CHIP_SWVERSION IPATH_CHIP_VERS_MAJ
63 * First-cut critierion for "device is active" is
64 * two thousand dwords combined Tx, Rx traffic per
65 * 5-second interval. SMA packets are 64 dwords,
66 * and occur "a few per second", presumably each way.
68 #define IPATH_TRAFFIC_ACTIVE_THRESHOLD (2000)
70 * Struct used to indicate which errors are logged in each of the
71 * error-counters that are logged to EEPROM. A counter is incremented
72 * _once_ (saturating at 255) for each event with any bits set in
73 * the error or hwerror register masks below.
75 #define IPATH_EEP_LOG_CNT (4)
76 struct ipath_eep_log_mask {
81 struct ipath_portdata {
82 void **port_rcvegrbuf;
83 dma_addr_t *port_rcvegrbuf_phys;
84 /* rcvhdrq base, needs mmap before useful */
86 /* kernel virtual address where hdrqtail is updated */
87 void *port_rcvhdrtail_kvaddr;
89 * temp buffer for expected send setup, allocated at open, instead
92 void *port_tid_pg_list;
93 /* when waiting for rcv or pioavail */
94 wait_queue_head_t port_wait;
96 * rcvegr bufs base, physical, must fit
97 * in 44 bits so 32 bit programs mmap64 44 bit works)
99 dma_addr_t port_rcvegr_phys;
100 /* mmap of hdrq, must fit in 44 bits */
101 dma_addr_t port_rcvhdrq_phys;
102 dma_addr_t port_rcvhdrqtailaddr_phys;
104 * number of opens (including slave subports) on this instance
105 * (ignoring forks, dup, etc. for now)
109 * how much space to leave at start of eager TID entries for
110 * protocol use, on each TID
112 /* instead of calculating it */
114 /* non-zero if port is being shared. */
115 u16 port_subport_cnt;
116 /* non-zero if port is being shared. */
118 /* chip offset of PIO buffers for this port */
120 /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
121 u32 port_rcvegrbuf_chunks;
122 /* how many egrbufs per chunk */
123 u32 port_rcvegrbufs_perchunk;
124 /* order for port_rcvegrbuf_pages */
125 size_t port_rcvegrbuf_size;
126 /* rcvhdrq size (for freeing) */
127 size_t port_rcvhdrq_size;
128 /* next expected TID to check when looking for free */
130 /* next expected TID to check */
131 unsigned long port_flag;
133 unsigned long int_flag;
134 /* WAIT_RCV that timed out, no interrupt */
136 /* WAIT_PIO that timed out, no interrupt */
138 /* WAIT_RCV already happened, no wait */
140 /* WAIT_PIO already happened, no wait */
142 /* total number of rcvhdrqfull errors */
145 * Used to suppress multiple instances of same
146 * port staying stuck at same point.
148 u32 port_lastrcvhdrqtail;
149 /* saved total number of rcvhdrqfull errors for poll edge trigger */
150 u32 port_hdrqfull_poll;
151 /* total number of polled urgent packets */
153 /* saved total number of polled urgent packets for poll edge trigger */
154 u32 port_urgent_poll;
155 /* pid of process using this port */
157 pid_t port_subpid[INFINIPATH_MAX_SUBPORT];
158 /* same size as task_struct .comm[] */
160 /* pkeys set by this use of this port */
162 /* so file ops can get at unit */
163 struct ipath_devdata *port_dd;
164 /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
165 void *subport_uregbase;
166 /* An array of pages for the eager receive buffers * N */
167 void *subport_rcvegrbuf;
168 /* An array of pages for the eager header queue entries * N */
169 void *subport_rcvhdr_base;
170 /* The version of the library which opened this port */
172 /* Bitmask of active slaves */
174 /* Type of packets or conditions we want to poll for */
176 /* port rcvhdrq head offset */
183 * control information for layered drivers
185 struct _ipath_layer {
189 struct ipath_skbinfo {
194 struct ipath_devdata {
195 struct list_head ipath_list;
197 struct ipath_kregs const *ipath_kregs;
198 struct ipath_cregs const *ipath_cregs;
200 /* mem-mapped pointer to base of chip regs */
201 u64 __iomem *ipath_kregbase;
202 /* end of mem-mapped chip space; range checking */
203 u64 __iomem *ipath_kregend;
204 /* physical address of chip for io_remap, etc. */
205 unsigned long ipath_physaddr;
206 /* base of memory alloced for ipath_kregbase, for free */
207 u64 *ipath_kregalloc;
209 * virtual address where port0 rcvhdrqtail updated for this unit.
210 * only written to by the chip, not the driver.
212 volatile __le64 *ipath_hdrqtailptr;
213 /* ipath_cfgports pointers */
214 struct ipath_portdata **ipath_pd;
215 /* sk_buffs used by port 0 eager receive queue */
216 struct ipath_skbinfo *ipath_port0_skbinfo;
217 /* kvirt address of 1st 2k pio buffer */
218 void __iomem *ipath_pio2kbase;
219 /* kvirt address of 1st 4k pio buffer */
220 void __iomem *ipath_pio4kbase;
222 * points to area where PIOavail registers will be DMA'ed.
223 * Has to be on a page of it's own, because the page will be
224 * mapped into user program space. This copy is *ONLY* ever
225 * written by DMA, not by the driver! Need a copy per device
226 * when we get to multiple devices
228 volatile __le64 *ipath_pioavailregs_dma;
229 /* physical address where updates occur */
230 dma_addr_t ipath_pioavailregs_phys;
231 struct _ipath_layer ipath_layer;
233 int (*ipath_f_intrsetup)(struct ipath_devdata *);
234 /* setup on-chip bus config */
235 int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
236 /* hard reset chip */
237 int (*ipath_f_reset)(struct ipath_devdata *);
238 int (*ipath_f_get_boardname)(struct ipath_devdata *, char *,
240 void (*ipath_f_init_hwerrors)(struct ipath_devdata *);
241 void (*ipath_f_handle_hwerrors)(struct ipath_devdata *, char *,
243 void (*ipath_f_quiet_serdes)(struct ipath_devdata *);
244 int (*ipath_f_bringup_serdes)(struct ipath_devdata *);
245 int (*ipath_f_early_init)(struct ipath_devdata *);
246 void (*ipath_f_clear_tids)(struct ipath_devdata *, unsigned);
247 void (*ipath_f_put_tid)(struct ipath_devdata *, u64 __iomem*,
249 void (*ipath_f_tidtemplate)(struct ipath_devdata *);
250 void (*ipath_f_cleanup)(struct ipath_devdata *);
251 void (*ipath_f_setextled)(struct ipath_devdata *, u64, u64);
252 /* fill out chip-specific fields */
253 int (*ipath_f_get_base_info)(struct ipath_portdata *, void *);
255 void (*ipath_f_free_irq)(struct ipath_devdata *);
256 void (*ipath_f_config_ports)(struct ipath_devdata *, ushort);
257 void (*ipath_f_read_counters)(struct ipath_devdata *,
258 struct infinipath_counters *);
259 struct ipath_ibdev *verbs_dev;
260 struct timer_list verbs_timer;
261 /* total dwords sent (summed from counter) */
263 /* total dwords rcvd (summed from counter) */
265 /* total packets sent (summed from counter) */
267 /* total packets rcvd (summed from counter) */
269 /* ipath_statusp initially points to this. */
271 /* GUID for this interface, in network order */
274 * aggregrate of error bits reported since last cleared, for
275 * limiting of error reporting
277 ipath_err_t ipath_lasterror;
279 * aggregrate of error bits reported since last cleared, for
280 * limiting of hwerror reporting
282 ipath_err_t ipath_lasthwerror;
283 /* errors masked because they occur too fast */
284 ipath_err_t ipath_maskederrs;
285 /* time in jiffies at which to re-enable maskederrs */
286 unsigned long ipath_unmasktime;
287 /* count of egrfull errors, combined for all ports */
288 u64 ipath_last_tidfull;
289 /* for ipath_qcheck() */
290 u64 ipath_lastport0rcv_cnt;
291 /* template for writing TIDs */
292 u64 ipath_tidtemplate;
293 /* value to write to free TIDs */
294 u64 ipath_tidinvalid;
295 /* IBA6120 rcv interrupt setup */
296 u64 ipath_rhdrhead_intr_off;
298 /* size of memory at ipath_kregbase */
300 /* number of registers used for pioavail */
302 /* IPATH_POLL, etc. */
304 /* ipath_flags driver is waiting for */
305 u32 ipath_state_wanted;
306 /* last buffer for user use, first buf for kernel use is this
308 u32 ipath_lastport_piobuf;
309 /* is a stats timer active */
310 u32 ipath_stats_timer_active;
311 /* number of interrupts for this device -- saturates... */
312 u32 ipath_int_counter;
313 /* dwords sent read from counter */
315 /* dwords received read from counter */
317 /* sent packets read from counter */
319 /* received packets read from counter */
321 /* pio bufs allocated per port */
324 * number of ports configured as max; zero is set to number chip
325 * supports, less gives more pio bufs/port, etc.
328 /* count of port 0 hdrqfull errors */
329 u32 ipath_p0_hdrqfull;
330 /* port 0 number of receive eager buffers */
331 u32 ipath_p0_rcvegrcnt;
334 * index of last piobuffer we used. Speeds up searching, by
335 * starting at this point. Doesn't matter if multiple cpu's use and
336 * update, last updater is only write that matters. Whenever it
337 * wraps, we update shadow copies. Need a copy per device when we
338 * get to multiple devices
340 u32 ipath_lastpioindex;
341 /* max length of freezemsg */
344 * consecutive times we wanted a PIO buffer but were unable to
347 u32 ipath_consec_nopiobuf;
349 * hint that we should update ipath_pioavailshadow before
350 * looking for a PIO buffer
352 u32 ipath_upd_pio_shadow;
353 /* so we can rewrite it after a chip reset */
355 /* so we can rewrite it after a chip reset */
358 /* interrupt number */
360 /* HT/PCI Vendor ID (here for NodeInfo) */
362 /* HT/PCI Device ID (here for NodeInfo) */
364 /* offset in HT config space of slave/primary interface block */
365 u8 ipath_ht_slave_off;
366 /* for write combining settings */
367 unsigned long ipath_wc_cookie;
368 unsigned long ipath_wc_base;
369 unsigned long ipath_wc_len;
370 /* ref count for each pkey */
371 atomic_t ipath_pkeyrefs[4];
372 /* shadow copy of all exptids physaddr; used only by funcsim */
373 u64 *ipath_tidsimshadow;
374 /* shadow copy of struct page *'s for exp tid pages */
375 struct page **ipath_pageshadow;
376 /* shadow copy of dma handles for exp tid pages */
377 dma_addr_t *ipath_physshadow;
378 /* lock to workaround chip bug 9437 */
379 spinlock_t ipath_tid_lock;
380 spinlock_t ipath_sendctrl_lock;
384 * this address is mapped readonly into user processes so they can
385 * get status cheaply, whenever they want.
388 /* freeze msg if hw error put chip in freeze */
389 char *ipath_freezemsg;
390 /* pci access data structure */
391 struct pci_dev *pcidev;
392 struct cdev *user_cdev;
393 struct cdev *diag_cdev;
394 struct class_device *user_class_dev;
395 struct class_device *diag_class_dev;
396 /* timer used to prevent stats overflow, error throttling, etc. */
397 struct timer_list ipath_stats_timer;
398 void *ipath_dummy_hdrq; /* used after port close */
399 dma_addr_t ipath_dummy_hdrq_phys;
401 unsigned long ipath_ureg_align; /* user register alignment */
404 * Shadow copies of registers; size indicates read access size.
405 * Most of them are readonly, but some are write-only register,
406 * where we manipulate the bits in the shadow copy, and then write
407 * the shadow copy to infinipath.
409 * We deliberately make most of these 32 bits, since they have
410 * restricted range. For any that we read, we won't to generate 32
411 * bit accesses, since Opteron will generate 2 separate 32 bit HT
412 * transactions for a 64 bit read, and we want to avoid unnecessary
416 /* This is the 64 bit group */
419 * shadow of pioavail, check to be sure it's large enough at
422 unsigned long ipath_pioavailshadow[8];
423 /* shadow of kr_gpio_out, for rmw ops */
425 /* shadow the gpio mask register */
427 /* shadow the gpio output enable, etc... */
429 /* kr_revision shadow */
432 * shadow of ibcctrl, for interrupt handling of link changes,
437 * last ibcstatus, to suppress "duplicate" status change messages,
440 u64 ipath_lastibcstat;
441 /* hwerrmask shadow */
442 ipath_err_t ipath_hwerrmask;
443 ipath_err_t ipath_errormask; /* errormask shadow */
444 /* interrupt config reg shadow */
446 /* kr_sendpiobufbase value */
447 u64 ipath_piobufbase;
449 /* these are the "32 bit" regs */
452 * number of GUIDs in the flash for this interface; may need some
453 * rethinking for setting on other ifaces
457 * the following two are 32-bit bitmasks, but {test,clear,set}_bit
458 * all expect bit fields to be "unsigned long"
460 /* shadow kr_rcvctrl */
461 unsigned long ipath_rcvctrl;
462 /* shadow kr_sendctrl */
463 unsigned long ipath_sendctrl;
464 unsigned long ipath_lastcancel; /* to not count armlaunch after cancel */
466 /* value we put in kr_rcvhdrcnt */
468 /* value we put in kr_rcvhdrsize */
469 u32 ipath_rcvhdrsize;
470 /* value we put in kr_rcvhdrentsize */
471 u32 ipath_rcvhdrentsize;
472 /* offset of last entry in rcvhdrq */
474 /* kr_portcnt value */
476 /* kr_pagealign value */
478 /* number of "2KB" PIO buffers */
480 /* size in bytes of "2KB" PIO buffers */
482 /* number of "4KB" PIO buffers */
484 /* size in bytes of "4KB" PIO buffers */
486 /* kr_rcvegrbase value */
487 u32 ipath_rcvegrbase;
488 /* kr_rcvegrcnt value */
490 /* kr_rcvtidbase value */
491 u32 ipath_rcvtidbase;
492 /* kr_rcvtidcnt value */
498 /* kr_counterregbase */
500 /* shadow the control register contents */
502 /* PCI revision register (HTC rev on FPGA) */
505 /* chip address space used by 4k pio buffers */
507 /* The MTU programmed for this unit */
510 * The max size IB packet, included IB headers that we can send.
511 * Starts same as ipath_piosize, but is affected when ibmtu is
512 * changed, or by size of eager buffers
516 * ibmaxlen at init time, limited by chip and by receive buffer
517 * size. Not changed after init.
519 u32 ipath_init_ibmaxlen;
520 /* size of each rcvegrbuffer */
521 u32 ipath_rcvegrbufsize;
522 /* width (2,4,8,16,32) from HT config reg */
524 /* HT speed (200,400,800,1000) from HT config */
527 * number of sequential ibcstatus change for polling active/quiet
528 * (i.e., link not coming up).
531 /* low and high portions of MSI capability/vector */
533 /* saved after PCIe init for restore after reset */
535 /* MSI data (vector) saved for restore */
537 /* MLID programmed for this instance */
539 /* LID programmed for this instance */
541 /* list of pkeys programmed; 0 if not set */
544 * ASCII serial number, from flash, large enough for original
545 * all digit strings, and longer QLogic serial number format
548 /* human readable board version */
549 u8 ipath_boardversion[80];
550 /* chip major rev, from ipath_revision */
552 /* chip minor rev, from ipath_revision */
554 /* board rev, from ipath_revision */
557 u8 ipath_r_portenable_shift;
558 u8 ipath_r_intravail_shift;
559 u8 ipath_r_tailupd_shift;
560 u8 ipath_r_portcfg_shift;
562 /* unit # of this chip, if present */
564 /* saved for restore after reset */
565 u8 ipath_pci_cacheline;
566 /* LID mask control */
568 /* Rx Polarity inversion (compensate for ~tx on partner) */
571 /* local link integrity counter */
572 u32 ipath_lli_counter;
573 /* local link integrity errors */
574 u32 ipath_lli_errors;
576 * Above counts only cases where _successive_ LocalLinkIntegrity
577 * errors were seen in the receive headers of kern-packets.
578 * Below are the three (monotonically increasing) counters
579 * maintained via GPIO interrupts on iba6120-rev2.
581 u32 ipath_rxfc_unsupvl_errs;
582 u32 ipath_overrun_thresh_errs;
585 /* status check work */
586 struct delayed_work status_work;
589 * Not all devices managed by a driver instance are the same
590 * type, so these fields must be per-device.
592 u64 ipath_i_bitsextant;
593 ipath_err_t ipath_e_bitsextant;
594 ipath_err_t ipath_hwe_bitsextant;
597 * Below should be computable from number of ports,
598 * since they are never modified.
600 u32 ipath_i_rcvavail_mask;
601 u32 ipath_i_rcvurg_mask;
604 * Register bits for selecting i2c direction and values, used for
607 u16 ipath_gpio_sda_num;
608 u16 ipath_gpio_scl_num;
612 /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
613 spinlock_t ipath_gpio_lock;
615 /* used to override LED behavior */
616 u8 ipath_led_override; /* Substituted for normal value, if non-zero */
617 u16 ipath_led_override_timeoff; /* delta to next timer event */
618 u8 ipath_led_override_vals[2]; /* Alternates per blink-frame */
619 u8 ipath_led_override_phase; /* Just counts, LSB picks from vals[] */
620 atomic_t ipath_led_override_timer_active;
621 /* Used to flash LEDs in override mode */
622 struct timer_list ipath_led_override_timer;
624 /* Support (including locks) for EEPROM logging of errors and time */
625 /* control access to actual counters, timer */
626 spinlock_t ipath_eep_st_lock;
627 /* control high-level access to EEPROM */
628 struct mutex ipath_eep_lock;
629 /* Below inc'd by ipath_snap_cntrs(), locked by ipath_eep_st_lock */
630 uint64_t ipath_traffic_wds;
631 /* active time is kept in seconds, but logged in hours */
632 atomic_t ipath_active_time;
633 /* Below are nominal shadow of EEPROM, new since last EEPROM update */
634 uint8_t ipath_eep_st_errs[IPATH_EEP_LOG_CNT];
635 uint8_t ipath_eep_st_new_errs[IPATH_EEP_LOG_CNT];
636 uint16_t ipath_eep_hrs;
638 * masks for which bits of errs, hwerrs that cause
639 * each of the counters to increment.
641 struct ipath_eep_log_mask ipath_eep_st_masks[IPATH_EEP_LOG_CNT];
644 /* Private data for file operations */
645 struct ipath_filedata {
646 struct ipath_portdata *pd;
650 extern struct list_head ipath_dev_list;
651 extern spinlock_t ipath_devs_lock;
652 extern struct ipath_devdata *ipath_lookup(int unit);
654 int ipath_init_chip(struct ipath_devdata *, int);
655 int ipath_enable_wc(struct ipath_devdata *dd);
656 void ipath_disable_wc(struct ipath_devdata *dd);
657 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp);
658 void ipath_shutdown_device(struct ipath_devdata *);
659 void ipath_clear_freeze(struct ipath_devdata *);
661 struct file_operations;
662 int ipath_cdev_init(int minor, char *name, const struct file_operations *fops,
663 struct cdev **cdevp, struct class_device **class_devp);
664 void ipath_cdev_cleanup(struct cdev **cdevp,
665 struct class_device **class_devp);
667 int ipath_diag_add(struct ipath_devdata *);
668 void ipath_diag_remove(struct ipath_devdata *);
670 extern wait_queue_head_t ipath_state_wait;
672 int ipath_user_add(struct ipath_devdata *dd);
673 void ipath_user_remove(struct ipath_devdata *dd);
675 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);
677 extern int ipath_diag_inuse;
679 irqreturn_t ipath_intr(int irq, void *devid);
680 int ipath_decode_err(char *buf, size_t blen, ipath_err_t err);
681 #if __IPATH_INFO || __IPATH_DBG
682 extern const char *ipath_ibcstatus_str[];
685 /* clean up any per-chip chip-specific stuff */
686 void ipath_chip_cleanup(struct ipath_devdata *);
687 /* clean up any chip type-specific stuff */
688 void ipath_chip_done(void);
690 /* check to see if we have to force ordering for write combining */
691 int ipath_unordered_wc(void);
693 void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
695 void ipath_cancel_sends(struct ipath_devdata *, int);
697 int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);
698 void ipath_free_pddata(struct ipath_devdata *, struct ipath_portdata *);
700 int ipath_parse_ushort(const char *str, unsigned short *valp);
702 void ipath_kreceive(struct ipath_portdata *);
703 int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);
704 int ipath_reset_device(int);
705 void ipath_get_faststats(unsigned long);
706 int ipath_set_linkstate(struct ipath_devdata *, u8);
707 int ipath_set_mtu(struct ipath_devdata *, u16);
708 int ipath_set_lid(struct ipath_devdata *, u32, u8);
709 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
711 /* for use in system calls, where we want to know device type, etc. */
712 #define port_fp(fp) ((struct ipath_filedata *)(fp)->private_data)->pd
713 #define subport_fp(fp) \
714 ((struct ipath_filedata *)(fp)->private_data)->subport
715 #define tidcursor_fp(fp) \
716 ((struct ipath_filedata *)(fp)->private_data)->tidcursor
719 * values for ipath_flags
721 /* The chip is up and initted */
722 #define IPATH_INITTED 0x2
723 /* set if any user code has set kr_rcvhdrsize */
724 #define IPATH_RCVHDRSZ_SET 0x4
725 /* The chip is present and valid for accesses */
726 #define IPATH_PRESENT 0x8
727 /* HT link0 is only 8 bits wide, ignore upper byte crc
729 #define IPATH_8BIT_IN_HT0 0x10
730 /* HT link1 is only 8 bits wide, ignore upper byte crc
732 #define IPATH_8BIT_IN_HT1 0x20
733 /* The link is down */
734 #define IPATH_LINKDOWN 0x40
735 /* The link level is up (0x11) */
736 #define IPATH_LINKINIT 0x80
737 /* The link is in the armed (0x21) state */
738 #define IPATH_LINKARMED 0x100
739 /* The link is in the active (0x31) state */
740 #define IPATH_LINKACTIVE 0x200
741 /* link current state is unknown */
742 #define IPATH_LINKUNK 0x400
743 /* Write combining flush needed for PIO */
744 #define IPATH_PIO_FLUSH_WC 0x1000
745 /* no IB cable, or no device on IB cable */
746 #define IPATH_NOCABLE 0x4000
747 /* Supports port zero per packet receive interrupts via
749 #define IPATH_GPIO_INTR 0x8000
750 /* uses the coded 4byte TID, not 8 byte */
751 #define IPATH_4BYTE_TID 0x10000
752 /* packet/word counters are 32 bit, else those 4 counters
754 #define IPATH_32BITCOUNTERS 0x20000
755 /* can miss port0 rx interrupts */
756 /* Interrupt register is 64 bits */
757 #define IPATH_INTREG_64 0x40000
758 #define IPATH_DISABLED 0x80000 /* administratively disabled */
759 /* Use GPIO interrupts for new counters */
760 #define IPATH_GPIO_ERRINTRS 0x100000
761 #define IPATH_SWAP_PIOBUFS 0x200000
763 /* Bits in GPIO for the added interrupts */
764 #define IPATH_GPIO_PORT0_BIT 2
765 #define IPATH_GPIO_RXUVL_BIT 3
766 #define IPATH_GPIO_OVRUN_BIT 4
767 #define IPATH_GPIO_LLI_BIT 5
768 #define IPATH_GPIO_ERRINTR_MASK 0x38
770 /* portdata flag bit offsets */
771 /* waiting for a packet to arrive */
772 #define IPATH_PORT_WAITING_RCV 2
773 /* master has not finished initializing */
774 #define IPATH_PORT_MASTER_UNINIT 4
775 /* waiting for an urgent packet to arrive */
776 #define IPATH_PORT_WAITING_URG 5
778 /* free up any allocated data at closes */
779 void ipath_free_data(struct ipath_portdata *dd);
780 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *);
781 int ipath_waitfor_complete(struct ipath_devdata *, ipath_kreg, u64, u64 *);
782 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);
783 void ipath_init_iba6120_funcs(struct ipath_devdata *);
784 void ipath_init_iba6110_funcs(struct ipath_devdata *);
785 void ipath_get_eeprom_info(struct ipath_devdata *);
786 int ipath_update_eeprom_log(struct ipath_devdata *dd);
787 void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr);
788 u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
789 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev);
792 * Set LED override, only the two LSBs have "public" meaning, but
793 * any non-zero value substitutes them for the Link and LinkTrain
796 #define IPATH_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
797 #define IPATH_LED_LOG 2 /* Logical (link) YELLOW LED */
798 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val);
801 * number of words used for protocol header if not set by ipath_userinit();
803 #define IPATH_DFLT_RCVHDRSIZE 9
805 #define IPATH_MDIO_CMD_WRITE 1
806 #define IPATH_MDIO_CMD_READ 2
807 #define IPATH_MDIO_CLD_DIV 25 /* to get 2.5 Mhz mdio clock */
808 #define IPATH_MDIO_CMDVALID 0x40000000 /* bit 30 */
809 #define IPATH_MDIO_DATAVALID 0x80000000 /* bit 31 */
810 #define IPATH_MDIO_CTRL_STD 0x0
812 static inline u64 ipath_mdio_req(int cmd, int dev, int reg, int data)
814 return (((u64) IPATH_MDIO_CLD_DIV) << 32) |
821 /* signal and fifo status, in bank 31 */
822 #define IPATH_MDIO_CTRL_XGXS_REG_8 0x8
823 /* controls loopback, redundancy */
824 #define IPATH_MDIO_CTRL_8355_REG_1 0x10
825 /* premph, encdec, etc. */
826 #define IPATH_MDIO_CTRL_8355_REG_2 0x11
828 #define IPATH_MDIO_CTRL_8355_REG_6 0x15
829 #define IPATH_MDIO_CTRL_8355_REG_9 0x18
830 #define IPATH_MDIO_CTRL_8355_REG_10 0x1D
832 int ipath_get_user_pages(unsigned long, size_t, struct page **);
833 void ipath_release_user_pages(struct page **, size_t);
834 void ipath_release_user_pages_on_close(struct page **, size_t);
835 int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);
836 int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);
838 /* these are used for the registers that vary with port */
839 void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,
843 * We could have a single register get/put routine, that takes a group type,
844 * but this is somewhat clearer and cleaner. It also gives us some error
845 * checking. 64 bit register reads should always work, but are inefficient
846 * on opteron (the northbridge always generates 2 separate HT 32 bit reads),
847 * so we use kreg32 wherever possible. User register and counter register
848 * reads are always 32 bit reads, so only one form of those routines.
852 * At the moment, none of the s-registers are writable, so no
853 * ipath_write_sreg(), and none of the c-registers are writable, so no
854 * ipath_write_creg().
858 * ipath_read_ureg32 - read 32-bit virtualized per-port register
860 * @regno: register number
863 * Return the contents of a register that is virtualized to be per port.
864 * Returns -1 on errors (not distinguishable from valid contents at
865 * runtime; we may add a separate error variable at some point).
867 static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
868 ipath_ureg regno, int port)
870 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
873 return readl(regno + (u64 __iomem *)
874 (dd->ipath_uregbase +
875 (char __iomem *)dd->ipath_kregbase +
876 dd->ipath_ureg_align * port));
880 * ipath_write_ureg - write 32-bit virtualized per-port register
882 * @regno: register number
886 * Write the contents of a register that is virtualized to be per port.
888 static inline void ipath_write_ureg(const struct ipath_devdata *dd,
889 ipath_ureg regno, u64 value, int port)
891 u64 __iomem *ubase = (u64 __iomem *)
892 (dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +
893 dd->ipath_ureg_align * port);
894 if (dd->ipath_kregbase)
895 writeq(value, &ubase[regno]);
898 static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
901 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
903 return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
906 static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
909 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
912 return readq(&dd->ipath_kregbase[regno]);
915 static inline void ipath_write_kreg(const struct ipath_devdata *dd,
916 ipath_kreg regno, u64 value)
918 if (dd->ipath_kregbase)
919 writeq(value, &dd->ipath_kregbase[regno]);
922 static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
925 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
928 return readq(regno + (u64 __iomem *)
929 (dd->ipath_cregbase +
930 (char __iomem *)dd->ipath_kregbase));
933 static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
936 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
938 return readl(regno + (u64 __iomem *)
939 (dd->ipath_cregbase +
940 (char __iomem *)dd->ipath_kregbase));
943 static inline void ipath_write_creg(const struct ipath_devdata *dd,
944 ipath_creg regno, u64 value)
946 if (dd->ipath_kregbase)
947 writeq(value, regno + (u64 __iomem *)
948 (dd->ipath_cregbase +
949 (char __iomem *)dd->ipath_kregbase));
952 static inline void ipath_clear_rcvhdrtail(const struct ipath_portdata *pd)
954 *((u64 *) pd->port_rcvhdrtail_kvaddr) = 0ULL;
957 static inline u32 ipath_get_rcvhdrtail(const struct ipath_portdata *pd)
959 return (u32) le64_to_cpu(*((volatile __le64 *)
960 pd->port_rcvhdrtail_kvaddr));
963 static inline u64 ipath_read_ireg(const struct ipath_devdata *dd, ipath_kreg r)
965 return (dd->ipath_flags & IPATH_INTREG_64) ?
966 ipath_read_kreg64(dd, r) : ipath_read_kreg32(dd, r);
973 struct device_driver;
975 extern const char ib_ipath_version[];
977 extern struct attribute_group *ipath_driver_attr_groups[];
979 int ipath_device_create_group(struct device *, struct ipath_devdata *);
980 void ipath_device_remove_group(struct device *, struct ipath_devdata *);
981 int ipath_expose_reset(struct device *);
983 int ipath_init_ipathfs(void);
984 void ipath_exit_ipathfs(void);
985 int ipathfs_add_device(struct ipath_devdata *);
986 int ipathfs_remove_device(struct ipath_devdata *);
989 * dma_addr wrappers - all 0's invalid for hw
991 dma_addr_t ipath_map_page(struct pci_dev *, struct page *, unsigned long,
993 dma_addr_t ipath_map_single(struct pci_dev *, void *, size_t, int);
996 * Flush write combining store buffers (if present) and perform a write
999 #if defined(CONFIG_X86_64)
1000 #define ipath_flush_wc() asm volatile("sfence" ::: "memory")
1002 #define ipath_flush_wc() wmb()
1005 extern unsigned ipath_debug; /* debugging bit mask */
1007 #define IPATH_MAX_PARITY_ATTEMPTS 10000 /* max times to try recovery */
1009 const char *ipath_get_unit_name(int unit);
1011 extern struct mutex ipath_mutex;
1013 #define IPATH_DRV_NAME "ib_ipath"
1014 #define IPATH_MAJOR 233
1015 #define IPATH_USER_MINOR_BASE 0
1016 #define IPATH_DIAGPKT_MINOR 127
1017 #define IPATH_DIAG_MINOR_BASE 129
1018 #define IPATH_NMINORS 255
1020 #define ipath_dev_err(dd,fmt,...) \
1022 const struct ipath_devdata *__dd = (dd); \
1024 dev_err(&__dd->pcidev->dev, "%s: " fmt, \
1025 ipath_get_unit_name(__dd->ipath_unit), \
1028 printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \
1029 ipath_get_unit_name(__dd->ipath_unit), \
1033 #if _IPATH_DEBUGGING
1035 # define __IPATH_DBG_WHICH(which,fmt,...) \
1037 if(unlikely(ipath_debug&(which))) \
1038 printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \
1039 __func__,##__VA_ARGS__); \
1042 # define ipath_dbg(fmt,...) \
1043 __IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)
1044 # define ipath_cdbg(which,fmt,...) \
1045 __IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)
1047 #else /* ! _IPATH_DEBUGGING */
1049 # define ipath_dbg(fmt,...)
1050 # define ipath_cdbg(which,fmt,...)
1052 #endif /* _IPATH_DEBUGGING */
1055 * this is used for formatting hw error messages...
1057 struct ipath_hwerror_msgs {
1062 #define INFINIPATH_HWE_MSG(a, b) { .mask = INFINIPATH_HWE_##a, .msg = b }
1064 /* in ipath_intr.c... */
1065 void ipath_format_hwerrors(u64 hwerrs,
1066 const struct ipath_hwerror_msgs *hwerrmsgs,
1068 char *msg, size_t lmsg);
1070 #endif /* _IPATH_KERNEL_H */