drivers/infiniband/hw/ipath/ipath_intr.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35
  36 #include "ipath_kernel.h"
  37 #include "ipath_verbs.h"
  38 #include "ipath_common.h"
  39
  40 /*
  41  * clear (write) a pio buffer, to clear a parity error.   This routine
  42  * should only be called when in freeze mode, and the buffer should be
  43  * canceled afterwards.
  44  */
  45 static void ipath_clrpiobuf(struct ipath_devdata *dd, u32 pnum)
  46 {
  47         u32 __iomem *pbuf;
  48         u32 dwcnt; /* dword count to write */
  49         if (pnum < dd->ipath_piobcnt2k) {
  50                 pbuf = (u32 __iomem *) (dd->ipath_pio2kbase + pnum *
  51                         dd->ipath_palign);
  52                 dwcnt = dd->ipath_piosize2k >> 2;
  53         }
  54         else {
  55                 pbuf = (u32 __iomem *) (dd->ipath_pio4kbase +
  56                         (pnum - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
  57                 dwcnt = dd->ipath_piosize4k >> 2;
  58         }
  59         dev_info(&dd->pcidev->dev,
  60                 "Rewrite PIO buffer %u, to recover from parity error\n",
  61                 pnum);
  62         *pbuf = dwcnt+1; /* no flush required, since already in freeze */
  63         while(--dwcnt)
  64                 *pbuf++ = 0;
  65 }
  66
  67 /*
  68  * Called when we might have an error that is specific to a particular
  69  * PIO buffer, and may need to cancel that buffer, so it can be re-used.
  70  * If rewrite is true, and bits are set in the sendbufferror registers,
  71  * we'll write to the buffer, for error recovery on parity errors.
  72  */
  73 static void ipath_disarm_senderrbufs(struct ipath_devdata *dd, int rewrite)
  74 {
  75         u32 piobcnt;
  76         unsigned long sbuf[4];
  77         /*
  78          * it's possible that sendbuffererror could have bits set; might
  79          * have already done this as a result of hardware error handling
  80          */
  81         piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
  82         /* read these before writing errorclear */
  83         sbuf[0] = ipath_read_kreg64(
  84                 dd, dd->ipath_kregs->kr_sendbuffererror);
  85         sbuf[1] = ipath_read_kreg64(
  86                 dd, dd->ipath_kregs->kr_sendbuffererror + 1);
  87         if (piobcnt > 128) {
  88                 sbuf[2] = ipath_read_kreg64(
  89                         dd, dd->ipath_kregs->kr_sendbuffererror + 2);
  90                 sbuf[3] = ipath_read_kreg64(
  91                         dd, dd->ipath_kregs->kr_sendbuffererror + 3);
  92         }
  93
  94         if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
  95                 int i;
  96                 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG) &&
  97                         dd->ipath_lastcancel > jiffies) {
  98                         __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG,
  99                                           "SendbufErrs %lx %lx", sbuf[0],
 100                                           sbuf[1]);
 101                         if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
 102                                 printk(" %lx %lx ", sbuf[2], sbuf[3]);
 103                         printk("\n");
 104                 }
 105
 106                 for (i = 0; i < piobcnt; i++)
 107                         if (test_bit(i, sbuf)) {
 108                                 if (rewrite)
 109                                         ipath_clrpiobuf(dd, i);
 110                                 ipath_disarm_piobufs(dd, i, 1);
 111                         }
 112                 /* ignore armlaunch errs for a bit */
 113                 dd->ipath_lastcancel = jiffies+3;
 114         }
 115 }
 116
 117
 118 /* These are all rcv-related errors which we want to count for stats */
 119 #define E_SUM_PKTERRS \
 120         (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
 121          INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
 122          INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
 123          INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 124          INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
 125          INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
 126
 127 /* These are all send-related errors which we want to count for stats */
 128 #define E_SUM_ERRS \
 129         (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
 130          INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 131          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
 132          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 133          INFINIPATH_E_INVALIDADDR)
 134
 135 /*
 136  * this is similar to E_SUM_ERRS, but can't ignore armlaunch, don't ignore
 137  * errors not related to freeze and cancelling buffers.  Can't ignore
 138  * armlaunch because could get more while still cleaning up, and need
 139  * to cancel those as they happen.
 140  */
 141 #define E_SPKT_ERRS_IGNORE \
 142          (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 143          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SMINPKTLEN | \
 144          INFINIPATH_E_SPKTLEN)
 145
 146 /*
 147  * these are errors that can occur when the link changes state while
 148  * a packet is being sent or received.  This doesn't cover things
 149  * like EBP or VCRC that can be the result of a sending having the
 150  * link change state, so we receive a "known bad" packet.
 151  */
 152 #define E_SUM_LINK_PKTERRS \
 153         (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 154          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 155          INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 156          INFINIPATH_E_RUNEXPCHAR)
 157
 158 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
 159 {
 160         u64 ignore_this_time = 0;
 161
 162         ipath_disarm_senderrbufs(dd, 0);
 163         if ((errs & E_SUM_LINK_PKTERRS) &&
 164             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 165                 /*
 166                  * This can happen when SMA is trying to bring the link
 167                  * up, but the IB link changes state at the "wrong" time.
 168                  * The IB logic then complains that the packet isn't
 169                  * valid.  We don't want to confuse people, so we just
 170                  * don't print them, except at debug
 171                  */
 172                 ipath_dbg("Ignoring packet errors %llx, because link not "
 173                           "ACTIVE\n", (unsigned long long) errs);
 174                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 175         }
 176
 177         return ignore_this_time;
 178 }
 179
 180 /* generic hw error messages... */
 181 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
 182         { \
 183                 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a <<    \
 184                           INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ),   \
 185                 .msg = "TXE " #a " Memory Parity"            \
 186         }
 187 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
 188         { \
 189                 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a <<    \
 190                           INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ),   \
 191                 .msg = "RXE " #a " Memory Parity"            \
 192         }
 193
 194 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = {
 195         INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"),
 196         INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"),
 197
 198         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF),
 199         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC),
 200         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO),
 201
 202         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF),
 203         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ),
 204         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID),
 205         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID),
 206         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF),
 207         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO),
 208         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO),
 209 };
 210
 211 /**
 212  * ipath_format_hwmsg - format a single hwerror message
 213  * @msg message buffer
 214  * @msgl length of message buffer
 215  * @hwmsg message to add to message buffer
 216  */
 217 static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
 218 {
 219         strlcat(msg, "[", msgl);
 220         strlcat(msg, hwmsg, msgl);
 221         strlcat(msg, "]", msgl);
 222 }
 223
 224 /**
 225  * ipath_format_hwerrors - format hardware error messages for display
 226  * @hwerrs hardware errors bit vector
 227  * @hwerrmsgs hardware error descriptions
 228  * @nhwerrmsgs number of hwerrmsgs
 229  * @msg message buffer
 230  * @msgl message buffer length
 231  */
 232 void ipath_format_hwerrors(u64 hwerrs,
 233                            const struct ipath_hwerror_msgs *hwerrmsgs,
 234                            size_t nhwerrmsgs,
 235                            char *msg, size_t msgl)
 236 {
 237         int i;
 238         const int glen =
 239             sizeof(ipath_generic_hwerror_msgs) /
 240             sizeof(ipath_generic_hwerror_msgs[0]);
 241
 242         for (i=0; i<glen; i++) {
 243                 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) {
 244                         ipath_format_hwmsg(msg, msgl,
 245                                            ipath_generic_hwerror_msgs[i].msg);
 246                 }
 247         }
 248
 249         for (i=0; i<nhwerrmsgs; i++) {
 250                 if (hwerrs & hwerrmsgs[i].mask) {
 251                         ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
 252                 }
 253         }
 254 }
 255
 256 /* return the strings for the most common link states */
 257 static char *ib_linkstate(u32 linkstate)
 258 {
 259         char *ret;
 260
 261         switch (linkstate) {
 262         case IPATH_IBSTATE_INIT:
 263                 ret = "Init";
 264                 break;
 265         case IPATH_IBSTATE_ARM:
 266                 ret = "Arm";
 267                 break;
 268         case IPATH_IBSTATE_ACTIVE:
 269                 ret = "Active";
 270                 break;
 271         default:
 272                 ret = "Down";
 273         }
 274
 275         return ret;
 276 }
 277
 278 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev)
 279 {
 280         struct ib_event event;
 281
 282         event.device = &dd->verbs_dev->ibdev;
 283         event.element.port_num = 1;
 284         event.event = ev;
 285         ib_dispatch_event(&event);
 286 }
 287
 288 static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
 289                                      ipath_err_t errs, int noprint)
 290 {
 291         u64 val;
 292         u32 ltstate, lstate;
 293
 294         /*
 295          * even if diags are enabled, we want to notice LINKINIT, etc.
 296          * We just don't want to change the LED state, or
 297          * dd->ipath_kregs->kr_ibcctrl
 298          */
 299         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 300         lstate = val & IPATH_IBSTATE_MASK;
 301
 302         /*
 303          * this is confusing enough when it happens that I want to always put it
 304          * on the console and in the logs.  If it was a requested state change,
 305          * we'll have already cleared the flags, so we won't print this warning
 306          */
 307         if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE)
 308                 && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
 309                 dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n",
 310                                  (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE",
 311                                  ib_linkstate(lstate));
 312                 /*
 313                  * Flush all queued sends when link went to DOWN or INIT,
 314                  * to be sure that they don't block SMA and other MAD packets
 315                  */
 316                 ipath_cancel_sends(dd, 1);
 317         }
 318         else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM ||
 319             lstate == IPATH_IBSTATE_ACTIVE) {
 320                 /*
 321                  * only print at SMA if there is a change, debug if not
 322                  * (sometimes we want to know that, usually not).
 323                  */
 324                 if (lstate == ((unsigned) dd->ipath_lastibcstat
 325                                & IPATH_IBSTATE_MASK)) {
 326                         ipath_dbg("Status change intr but no change (%s)\n",
 327                                   ib_linkstate(lstate));
 328                 }
 329                 else
 330                         ipath_cdbg(VERBOSE, "Unit %u link state %s, last "
 331                                    "was %s\n", dd->ipath_unit,
 332                                    ib_linkstate(lstate),
 333                                    ib_linkstate((unsigned)
 334                                                 dd->ipath_lastibcstat
 335                                                 & IPATH_IBSTATE_MASK));
 336         }
 337         else {
 338                 lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK;
 339                 if (lstate == IPATH_IBSTATE_INIT ||
 340                     lstate == IPATH_IBSTATE_ARM ||
 341                     lstate == IPATH_IBSTATE_ACTIVE)
 342                         ipath_cdbg(VERBOSE, "Unit %u link state down"
 343                                    " (state 0x%x), from %s\n",
 344                                    dd->ipath_unit,
 345                                    (u32)val & IPATH_IBSTATE_MASK,
 346                                    ib_linkstate(lstate));
 347                 else
 348                         ipath_cdbg(VERBOSE, "Unit %u link state changed "
 349                                    "to 0x%x from down (%x)\n",
 350                                    dd->ipath_unit, (u32) val, lstate);
 351         }
 352         ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
 353                 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
 354         lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
 355                 INFINIPATH_IBCS_LINKSTATE_MASK;
 356
 357         if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 358             ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 359                 u32 last_ltstate;
 360
 361                 /*
 362                  * Ignore cycling back and forth from Polling.Active
 363                  * to Polling.Quiet while waiting for the other end of
 364                  * the link to come up. We will cycle back and forth
 365                  * between them if no cable is plugged in,
 366                  * the other device is powered off or disabled, etc.
 367                  */
 368                 last_ltstate = (dd->ipath_lastibcstat >>
 369                                 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT)
 370                         & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
 371                 if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE
 372                     || last_ltstate ==
 373                     INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 374                         if (dd->ipath_ibpollcnt > 40) {
 375                                 dd->ipath_flags |= IPATH_NOCABLE;
 376                                 *dd->ipath_statusp |=
 377                                         IPATH_STATUS_IB_NOCABLE;
 378                         } else
 379                                 dd->ipath_ibpollcnt++;
 380                         goto skip_ibchange;
 381                 }
 382         }
 383         dd->ipath_ibpollcnt = 0;        /* some state other than 2 or 3 */
 384         ipath_stats.sps_iblink++;
 385         if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
 386                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 387                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 388                 dd->ipath_flags |= IPATH_LINKDOWN;
 389                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 390                                      | IPATH_LINKACTIVE |
 391                                      IPATH_LINKARMED);
 392                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 393                 dd->ipath_lli_counter = 0;
 394                 if (!noprint) {
 395                         if (((dd->ipath_lastibcstat >>
 396                               INFINIPATH_IBCS_LINKSTATE_SHIFT) &
 397                              INFINIPATH_IBCS_LINKSTATE_MASK)
 398                             == INFINIPATH_IBCS_L_STATE_ACTIVE)
 399                                 /* if from up to down be more vocal */
 400                                 ipath_cdbg(VERBOSE,
 401                                            "Unit %u link now down (%s)\n",
 402                                            dd->ipath_unit,
 403                                            ipath_ibcstatus_str[ltstate]);
 404                         else
 405                                 ipath_cdbg(VERBOSE, "Unit %u link is "
 406                                            "down (%s)\n", dd->ipath_unit,
 407                                            ipath_ibcstatus_str[ltstate]);
 408                 }
 409
 410                 dd->ipath_f_setextled(dd, lstate, ltstate);
 411         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) {
 412                 dd->ipath_flags |= IPATH_LINKACTIVE;
 413                 dd->ipath_flags &=
 414                         ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN |
 415                           IPATH_LINKARMED | IPATH_NOCABLE);
 416                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
 417                 *dd->ipath_statusp |=
 418                         IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
 419                 dd->ipath_f_setextled(dd, lstate, ltstate);
 420                 signal_ib_event(dd, IB_EVENT_PORT_ACTIVE);
 421         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) {
 422                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 423                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 424                 /*
 425                  * set INIT and DOWN.  Down is checked by most of the other
 426                  * code, but INIT is useful to know in a few places.
 427                  */
 428                 dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN;
 429                 dd->ipath_flags &=
 430                         ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED
 431                           | IPATH_NOCABLE);
 432                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
 433                                         | IPATH_STATUS_IB_READY);
 434                 dd->ipath_f_setextled(dd, lstate, ltstate);
 435         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) {
 436                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 437                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 438                 dd->ipath_flags |= IPATH_LINKARMED;
 439                 dd->ipath_flags &=
 440                         ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT |
 441                           IPATH_LINKACTIVE | IPATH_NOCABLE);
 442                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
 443                                         | IPATH_STATUS_IB_READY);
 444                 dd->ipath_f_setextled(dd, lstate, ltstate);
 445         } else {
 446                 if (!noprint)
 447                         ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
 448                                   dd->ipath_unit,
 449                                   ipath_ibcstatus_str[ltstate], ltstate);
 450         }
 451 skip_ibchange:
 452         dd->ipath_lastibcstat = val;
 453 }
 454
 455 static void handle_supp_msgs(struct ipath_devdata *dd,
 456                              unsigned supp_msgs, char *msg, int msgsz)
 457 {
 458         /*
 459          * Print the message unless it's ibc status change only, which
 460          * happens so often we never want to count it.
 461          */
 462         if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
 463                 int iserr;
 464                 iserr = ipath_decode_err(msg, msgsz,
 465                                          dd->ipath_lasterror &
 466                                          ~INFINIPATH_E_IBSTATUSCHANGED);
 467                 if (dd->ipath_lasterror &
 468                         ~(INFINIPATH_E_RRCVEGRFULL |
 469                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 470                         ipath_dev_err(dd, "Suppressed %u messages for "
 471                                       "fast-repeating errors (%s) (%llx)\n",
 472                                       supp_msgs, msg,
 473                                       (unsigned long long)
 474                                       dd->ipath_lasterror);
 475                 else {
 476                         /*
 477                          * rcvegrfull and rcvhdrqfull are "normal", for some
 478                          * types of processes (mostly benchmarks) that send
 479                          * huge numbers of messages, while not processing
 480                          * them. So only complain about these at debug
 481                          * level.
 482                          */
 483                         if (iserr)
 484                                 ipath_dbg("Suppressed %u messages for %s\n",
 485                                           supp_msgs, msg);
 486                         else
 487                                 ipath_cdbg(ERRPKT,
 488                                         "Suppressed %u messages for %s\n",
 489                                           supp_msgs, msg);
 490                 }
 491         }
 492 }
 493
 494 static unsigned handle_frequent_errors(struct ipath_devdata *dd,
 495                                        ipath_err_t errs, char *msg,
 496                                        int msgsz, int *noprint)
 497 {
 498         unsigned long nc;
 499         static unsigned long nextmsg_time;
 500         static unsigned nmsgs, supp_msgs;
 501
 502         /*
 503          * Throttle back "fast" messages to no more than 10 per 5 seconds.
 504          * This isn't perfect, but it's a reasonable heuristic. If we get
 505          * more than 10, give a 6x longer delay.
 506          */
 507         nc = jiffies;
 508         if (nmsgs > 10) {
 509                 if (time_before(nc, nextmsg_time)) {
 510                         *noprint = 1;
 511                         if (!supp_msgs++)
 512                                 nextmsg_time = nc + HZ * 3;
 513                 }
 514                 else if (supp_msgs) {
 515                         handle_supp_msgs(dd, supp_msgs, msg, msgsz);
 516                         supp_msgs = 0;
 517                         nmsgs = 0;
 518                 }
 519         }
 520         else if (!nmsgs++ || time_after(nc, nextmsg_time))
 521                 nextmsg_time = nc + HZ / 2;
 522
 523         return supp_msgs;
 524 }
 525
 526 static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
 527 {
 528         char msg[128];
 529         u64 ignore_this_time = 0;
 530         int i, iserr = 0;
 531         int chkerrpkts = 0, noprint = 0;
 532         unsigned supp_msgs;
 533         int log_idx;
 534
 535         supp_msgs = handle_frequent_errors(dd, errs, msg, sizeof msg, &noprint);
 536
 537         /* don't report errors that are masked */
 538         errs &= ~dd->ipath_maskederrs;
 539
 540         /* do these first, they are most important */
 541         if (errs & INFINIPATH_E_HARDWARE) {
 542                 /* reuse same msg buf */
 543                 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
 544         } else {
 545                 u64 mask;
 546                 for (log_idx = 0; log_idx < IPATH_EEP_LOG_CNT; ++log_idx) {
 547                         mask = dd->ipath_eep_st_masks[log_idx].errs_to_log;
 548                         if (errs & mask)
 549                                 ipath_inc_eeprom_err(dd, log_idx, 1);
 550                 }
 551         }
 552
 553         if (!noprint && (errs & ~dd->ipath_e_bitsextant))
 554                 ipath_dev_err(dd, "error interrupt with unknown errors "
 555                               "%llx set\n", (unsigned long long)
 556                               (errs & ~dd->ipath_e_bitsextant));
 557
 558         if (errs & E_SUM_ERRS)
 559                 ignore_this_time = handle_e_sum_errs(dd, errs);
 560         else if ((errs & E_SUM_LINK_PKTERRS) &&
 561             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 562                 /*
 563                  * This can happen when SMA is trying to bring the link
 564                  * up, but the IB link changes state at the "wrong" time.
 565                  * The IB logic then complains that the packet isn't
 566                  * valid.  We don't want to confuse people, so we just
 567                  * don't print them, except at debug
 568                  */
 569                 ipath_dbg("Ignoring packet errors %llx, because link not "
 570                           "ACTIVE\n", (unsigned long long) errs);
 571                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 572         }
 573
 574         if (supp_msgs == 250000) {
 575                 int s_iserr;
 576                 /*
 577                  * It's not entirely reasonable assuming that the errors set
 578                  * in the last clear period are all responsible for the
 579                  * problem, but the alternative is to assume it's the only
 580                  * ones on this particular interrupt, which also isn't great
 581                  */
 582                 dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
 583                 dd->ipath_errormask &= ~dd->ipath_maskederrs;
 584                 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 585                         dd->ipath_errormask);
 586                 s_iserr = ipath_decode_err(msg, sizeof msg,
 587                         dd->ipath_maskederrs);
 588
 589                 if (dd->ipath_maskederrs &
 590                         ~(INFINIPATH_E_RRCVEGRFULL |
 591                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 592                         ipath_dev_err(dd, "Temporarily disabling "
 593                             "error(s) %llx reporting; too frequent (%s)\n",
 594                                 (unsigned long long)dd->ipath_maskederrs,
 595                                 msg);
 596                 else {
 597                         /*
 598                          * rcvegrfull and rcvhdrqfull are "normal",
 599                          * for some types of processes (mostly benchmarks)
 600                          * that send huge numbers of messages, while not
 601                          * processing them.  So only complain about
 602                          * these at debug level.
 603                          */
 604                         if (s_iserr)
 605                                 ipath_dbg("Temporarily disabling reporting "
 606                                     "too frequent queue full errors (%s)\n",
 607                                     msg);
 608                         else
 609                                 ipath_cdbg(ERRPKT,
 610                                     "Temporarily disabling reporting too"
 611                                     " frequent packet errors (%s)\n",
 612                                     msg);
 613                 }
 614
 615                 /*
 616                  * Re-enable the masked errors after around 3 minutes.  in
 617                  * ipath_get_faststats().  If we have a series of fast
 618                  * repeating but different errors, the interval will keep
 619                  * stretching out, but that's OK, as that's pretty
 620                  * catastrophic.
 621                  */
 622                 dd->ipath_unmasktime = jiffies + HZ * 180;
 623         }
 624
 625         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
 626         if (ignore_this_time)
 627                 errs &= ~ignore_this_time;
 628         if (errs & ~dd->ipath_lasterror) {
 629                 errs &= ~dd->ipath_lasterror;
 630                 /* never suppress duplicate hwerrors or ibstatuschange */
 631                 dd->ipath_lasterror |= errs &
 632                         ~(INFINIPATH_E_HARDWARE |
 633                           INFINIPATH_E_IBSTATUSCHANGED);
 634         }
 635
 636         /* likely due to cancel, so suppress */
 637         if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) &&
 638                 dd->ipath_lastcancel > jiffies) {
 639                 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
 640                 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN);
 641         }
 642
 643         if (!errs)
 644                 return 0;
 645
 646         if (!noprint)
 647                 /*
 648                  * the ones we mask off are handled specially below or above
 649                  */
 650                 ipath_decode_err(msg, sizeof msg,
 651                                  errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
 652                                           INFINIPATH_E_RRCVEGRFULL |
 653                                           INFINIPATH_E_RRCVHDRFULL |
 654                                           INFINIPATH_E_HARDWARE));
 655         else
 656                 /* so we don't need if (!noprint) at strlcat's below */
 657                 *msg = 0;
 658
 659         if (errs & E_SUM_PKTERRS) {
 660                 ipath_stats.sps_pkterrs++;
 661                 chkerrpkts = 1;
 662         }
 663         if (errs & E_SUM_ERRS)
 664                 ipath_stats.sps_errs++;
 665
 666         if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
 667                 ipath_stats.sps_crcerrs++;
 668                 chkerrpkts = 1;
 669         }
 670         iserr = errs & ~(E_SUM_PKTERRS | INFINIPATH_E_PKTERRS);
 671
 672
 673         /*
 674          * We don't want to print these two as they happen, or we can make
 675          * the situation even worse, because it takes so long to print
 676          * messages to serial consoles.  Kernel ports get printed from
 677          * fast_stats, no more than every 5 seconds, user ports get printed
 678          * on close
 679          */
 680         if (errs & INFINIPATH_E_RRCVHDRFULL) {
 681                 u32 hd, tl;
 682                 ipath_stats.sps_hdrqfull++;
 683                 for (i = 0; i < dd->ipath_cfgports; i++) {
 684                         struct ipath_portdata *pd = dd->ipath_pd[i];
 685                         if (i == 0) {
 686                                 hd = pd->port_head;
 687                                 tl = (u32) le64_to_cpu(
 688                                         *dd->ipath_hdrqtailptr);
 689                         } else if (pd && pd->port_cnt &&
 690                                    pd->port_rcvhdrtail_kvaddr) {
 691                                 /*
 692                                  * don't report same point multiple times,
 693                                  * except kernel
 694                                  */
 695                                 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr;
 696                                 if (tl == pd->port_lastrcvhdrqtail)
 697                                         continue;
 698                                 hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
 699                                                        i);
 700                         } else
 701                                 continue;
 702                         if (hd == (tl + 1) ||
 703                             (!hd && tl == dd->ipath_hdrqlast)) {
 704                                 if (i == 0)
 705                                         chkerrpkts = 1;
 706                                 pd->port_lastrcvhdrqtail = tl;
 707                                 pd->port_hdrqfull++;
 708                                 /* flush hdrqfull so that poll() sees it */
 709                                 wmb();
 710                                 wake_up_interruptible(&pd->port_wait);
 711                         }
 712                 }
 713         }
 714         if (errs & INFINIPATH_E_RRCVEGRFULL) {
 715                 struct ipath_portdata *pd = dd->ipath_pd[0];
 716
 717                 /*
 718                  * since this is of less importance and not likely to
 719                  * happen without also getting hdrfull, only count
 720                  * occurrences; don't check each port (or even the kernel
 721                  * vs user)
 722                  */
 723                 ipath_stats.sps_etidfull++;
 724                 if (pd->port_head !=
 725                     (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
 726                         chkerrpkts = 1;
 727         }
 728
 729         /*
 730          * do this before IBSTATUSCHANGED, in case both bits set in a single
 731          * interrupt; we want the STATUSCHANGE to "win", so we do our
 732          * internal copy of state machine correctly
 733          */
 734         if (errs & INFINIPATH_E_RIBLOSTLINK) {
 735                 /*
 736                  * force through block below
 737                  */
 738                 errs |= INFINIPATH_E_IBSTATUSCHANGED;
 739                 ipath_stats.sps_iblink++;
 740                 dd->ipath_flags |= IPATH_LINKDOWN;
 741                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 742                                      | IPATH_LINKARMED | IPATH_LINKACTIVE);
 743                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 744                 if (!noprint) {
 745                         u64 st = ipath_read_kreg64(
 746                                 dd, dd->ipath_kregs->kr_ibcstatus);
 747
 748                         ipath_dbg("Lost link, link now down (%s)\n",
 749                                   ipath_ibcstatus_str[st & 0xf]);
 750                 }
 751         }
 752         if (errs & INFINIPATH_E_IBSTATUSCHANGED)
 753                 handle_e_ibstatuschanged(dd, errs, noprint);
 754
 755         if (errs & INFINIPATH_E_RESET) {
 756                 if (!noprint)
 757                         ipath_dev_err(dd, "Got reset, requires re-init "
 758                                       "(unload and reload driver)\n");
 759                 dd->ipath_flags &= ~IPATH_INITTED;      /* needs re-init */
 760                 /* mark as having had error */
 761                 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
 762                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
 763         }
 764
 765         if (!noprint && *msg) {
 766                 if (iserr)
 767                         ipath_dev_err(dd, "%s error\n", msg);
 768                 else
 769                         dev_info(&dd->pcidev->dev, "%s packet problems\n",
 770                                 msg);
 771         }
 772         if (dd->ipath_state_wanted & dd->ipath_flags) {
 773                 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, "
 774                            "waking\n", dd->ipath_state_wanted,
 775                            dd->ipath_flags);
 776                 wake_up_interruptible(&ipath_state_wait);
 777         }
 778
 779         return chkerrpkts;
 780 }
 781
 782
 783 /*
 784  * try to cleanup as much as possible for anything that might have gone
 785  * wrong while in freeze mode, such as pio buffers being written by user
 786  * processes (causing armlaunch), send errors due to going into freeze mode,
 787  * etc., and try to avoid causing extra interrupts while doing so.
 788  * Forcibly update the in-memory pioavail register copies after cleanup
 789  * because the chip won't do it for anything changing while in freeze mode
 790  * (we don't want to wait for the next pio buffer state change).
 791  * Make sure that we don't lose any important interrupts by using the chip
 792  * feature that says that writing 0 to a bit in *clear that is set in
 793  * *status will cause an interrupt to be generated again (if allowed by
 794  * the *mask value).
 795  */
 796 void ipath_clear_freeze(struct ipath_devdata *dd)
 797 {
 798         int i, im;
 799         __le64 val;
 800         unsigned long flags;
 801
 802         /* disable error interrupts, to avoid confusion */
 803         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL);
 804
 805         /* also disable interrupts; errormask is sometimes overwriten */
 806         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 807
 808         /*
 809          * clear all sends, because they have may been
 810          * completed by usercode while in freeze mode, and
 811          * therefore would not be sent, and eventually
 812          * might cause the process to run out of bufs
 813          */
 814         ipath_cancel_sends(dd, 0);
 815         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 816                          dd->ipath_control);
 817
 818         /* ensure pio avail updates continue */
 819         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 820         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 821                  dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
 822         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 823         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 824                          dd->ipath_sendctrl);
 825         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 826         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 827
 828         /*
 829          * We just enabled pioavailupdate, so dma copy is almost certainly
 830          * not yet right, so read the registers directly.  Similar to init
 831          */
 832         for (i = 0; i < dd->ipath_pioavregs; i++) {
 833                 /* deal with 6110 chip bug */
 834                 im = i > 3 ? i ^ 1 : i;
 835                 val = ipath_read_kreg64(dd, (0x1000 / sizeof(u64)) + im);
 836                 dd->ipath_pioavailregs_dma[i] = dd->ipath_pioavailshadow[i]
 837                         = le64_to_cpu(val);
 838         }
 839
 840         /*
 841          * force new interrupt if any hwerr, error or interrupt bits are
 842          * still set, and clear "safe" send packet errors related to freeze
 843          * and cancelling sends.  Re-enable error interrupts before possible
 844          * force of re-interrupt on pending interrupts.
 845          */
 846         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
 847         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
 848                 E_SPKT_ERRS_IGNORE);
 849         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 850                 dd->ipath_errormask);
 851         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, -1LL);
 852         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
 853 }
 854
 855
 856 /* this is separate to allow for better optimization of ipath_intr() */
 857
 858 static noinline void ipath_bad_intr(struct ipath_devdata *dd, u32 *unexpectp)
 859 {
 860         /*
 861          * sometimes happen during driver init and unload, don't want
 862          * to process any interrupts at that point
 863          */
 864
 865         /* this is just a bandaid, not a fix, if something goes badly
 866          * wrong */
 867         if (++*unexpectp > 100) {
 868                 if (++*unexpectp > 105) {
 869                         /*
 870                          * ok, we must be taking somebody else's interrupts,
 871                          * due to a messed up mptable and/or PIRQ table, so
 872                          * unregister the interrupt.  We've seen this during
 873                          * linuxbios development work, and it may happen in
 874                          * the future again.
 875                          */
 876                         if (dd->pcidev && dd->ipath_irq) {
 877                                 ipath_dev_err(dd, "Now %u unexpected "
 878                                               "interrupts, unregistering "
 879                                               "interrupt handler\n",
 880                                               *unexpectp);
 881                                 ipath_dbg("free_irq of irq %d\n",
 882                                           dd->ipath_irq);
 883                                 dd->ipath_f_free_irq(dd);
 884                         }
 885                 }
 886                 if (ipath_read_ireg(dd, dd->ipath_kregs->kr_intmask)) {
 887                         ipath_dev_err(dd, "%u unexpected interrupts, "
 888                                       "disabling interrupts completely\n",
 889                                       *unexpectp);
 890                         /*
 891                          * disable all interrupts, something is very wrong
 892                          */
 893                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 894                                          0ULL);
 895                 }
 896         } else if (*unexpectp > 1)
 897                 ipath_dbg("Interrupt when not ready, should not happen, "
 898                           "ignoring\n");
 899 }
 900
 901 static noinline void ipath_bad_regread(struct ipath_devdata *dd)
 902 {
 903         static int allbits;
 904
 905         /* separate routine, for better optimization of ipath_intr() */
 906
 907         /*
 908          * We print the message and disable interrupts, in hope of
 909          * having a better chance of debugging the problem.
 910          */
 911         ipath_dev_err(dd,
 912                       "Read of interrupt status failed (all bits set)\n");
 913         if (allbits++) {
 914                 /* disable all interrupts, something is very wrong */
 915                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 916                 if (allbits == 2) {
 917                         ipath_dev_err(dd, "Still bad interrupt status, "
 918                                       "unregistering interrupt\n");
 919                         dd->ipath_f_free_irq(dd);
 920                 } else if (allbits > 2) {
 921                         if ((allbits % 10000) == 0)
 922                                 printk(".");
 923                 } else
 924                         ipath_dev_err(dd, "Disabling interrupts, "
 925                                       "multiple errors\n");
 926         }
 927 }
 928
 929 static void handle_layer_pioavail(struct ipath_devdata *dd)
 930 {
 931         unsigned long flags;
 932         int ret;
 933
 934         ret = ipath_ib_piobufavail(dd->verbs_dev);
 935         if (ret > 0)
 936                 goto set;
 937
 938         return;
 939 set:
 940         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 941         dd->ipath_sendctrl |= INFINIPATH_S_PIOINTBUFAVAIL;
 942         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 943                          dd->ipath_sendctrl);
 944         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 945         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 946 }
 947
 948 /*
 949  * Handle receive interrupts for user ports; this means a user
 950  * process was waiting for a packet to arrive, and didn't want
 951  * to poll
 952  */
 953 static void handle_urcv(struct ipath_devdata *dd, u32 istat)
 954 {
 955         u64 portr;
 956         int i;
 957         int rcvdint = 0;
 958
 959         /*
 960          * test_and_clear_bit(IPATH_PORT_WAITING_RCV) and
 961          * test_and_clear_bit(IPATH_PORT_WAITING_URG) below
 962          * would both like timely updates of the bits so that
 963          * we don't pass them by unnecessarily.  the rmb()
 964          * here ensures that we see them promptly -- the
 965          * corresponding wmb()'s are in ipath_poll_urgent()
 966          * and ipath_poll_next()...
 967          */
 968         rmb();
 969         portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
 970                  dd->ipath_i_rcvavail_mask)
 971                 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
 972                    dd->ipath_i_rcvurg_mask);
 973         for (i = 1; i < dd->ipath_cfgports; i++) {
 974                 struct ipath_portdata *pd = dd->ipath_pd[i];
 975                 if (portr & (1 << i) && pd && pd->port_cnt) {
 976                         if (test_and_clear_bit(IPATH_PORT_WAITING_RCV,
 977                                                &pd->port_flag)) {
 978                                 clear_bit(i + dd->ipath_r_intravail_shift,
 979                                           &dd->ipath_rcvctrl);
 980                                 wake_up_interruptible(&pd->port_wait);
 981                                 rcvdint = 1;
 982                         } else if (test_and_clear_bit(IPATH_PORT_WAITING_URG,
 983                                                       &pd->port_flag)) {
 984                                 pd->port_urgent++;
 985                                 wake_up_interruptible(&pd->port_wait);
 986                         }
 987                 }
 988         }
 989         if (rcvdint) {
 990                 /* only want to take one interrupt, so turn off the rcv
 991                  * interrupt for all the ports that we did the wakeup on
 992                  * (but never for kernel port)
 993                  */
 994                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 995                                  dd->ipath_rcvctrl);
 996         }
 997 }
 998
 999 irqreturn_t ipath_intr(int irq, void *data)
1000 {
1001         struct ipath_devdata *dd = data;
1002         u32 istat, chk0rcv = 0;
1003         ipath_err_t estat = 0;
1004         irqreturn_t ret;
1005         static unsigned unexpected = 0;
1006         static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
1007                  (1U<<INFINIPATH_I_RCVURG_SHIFT);
1008
1009         ipath_stats.sps_ints++;
1010
1011         if (dd->ipath_int_counter != (u32) -1)
1012                 dd->ipath_int_counter++;
1013
1014         if (!(dd->ipath_flags & IPATH_PRESENT)) {
1015                 /*
1016                  * This return value is not great, but we do not want the
1017                  * interrupt core code to remove our interrupt handler
1018                  * because we don't appear to be handling an interrupt
1019                  * during a chip reset.
1020                  */
1021                 return IRQ_HANDLED;
1022         }
1023
1024         /*
1025          * this needs to be flags&initted, not statusp, so we keep
1026          * taking interrupts even after link goes down, etc.
1027          * Also, we *must* clear the interrupt at some point, or we won't
1028          * take it again, which can be real bad for errors, etc...
1029          */
1030
1031         if (!(dd->ipath_flags & IPATH_INITTED)) {
1032                 ipath_bad_intr(dd, &unexpected);
1033                 ret = IRQ_NONE;
1034                 goto bail;
1035         }
1036
1037         istat = ipath_read_ireg(dd, dd->ipath_kregs->kr_intstatus);
1038
1039         if (unlikely(!istat)) {
1040                 ipath_stats.sps_nullintr++;
1041                 ret = IRQ_NONE; /* not our interrupt, or already handled */
1042                 goto bail;
1043         }
1044         if (unlikely(istat == -1)) {
1045                 ipath_bad_regread(dd);
1046                 /* don't know if it was our interrupt or not */
1047                 ret = IRQ_NONE;
1048                 goto bail;
1049         }
1050
1051         if (unexpected)
1052                 unexpected = 0;
1053
1054         if (unlikely(istat & ~dd->ipath_i_bitsextant))
1055                 ipath_dev_err(dd,
1056                               "interrupt with unknown interrupts %x set\n",
1057                               istat & (u32) ~ dd->ipath_i_bitsextant);
1058         else
1059                 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
1060
1061         if (unlikely(istat & INFINIPATH_I_ERROR)) {
1062                 ipath_stats.sps_errints++;
1063                 estat = ipath_read_kreg64(dd,
1064                                           dd->ipath_kregs->kr_errorstatus);
1065                 if (!estat)
1066                         dev_info(&dd->pcidev->dev, "error interrupt (%x), "
1067                                  "but no error bits set!\n", istat);
1068                 else if (estat == -1LL)
1069                         /*
1070                          * should we try clearing all, or hope next read
1071                          * works?
1072                          */
1073                         ipath_dev_err(dd, "Read of error status failed "
1074                                       "(all bits set); ignoring\n");
1075                 else
1076                         if (handle_errors(dd, estat))
1077                                 /* force calling ipath_kreceive() */
1078                                 chk0rcv = 1;
1079         }
1080
1081         if (istat & INFINIPATH_I_GPIO) {
1082                 /*
1083                  * GPIO interrupts fall in two broad classes:
1084                  * GPIO_2 indicates (on some HT4xx boards) that a packet
1085                  *        has arrived for Port 0. Checking for this
1086                  *        is controlled by flag IPATH_GPIO_INTR.
1087                  * GPIO_3..5 on IBA6120 Rev2 and IBA6110 Rev4 chips indicate
1088                  *        errors that we need to count. Checking for this
1089                  *        is controlled by flag IPATH_GPIO_ERRINTRS.
1090                  */
1091                 u32 gpiostatus;
1092                 u32 to_clear = 0;
1093
1094                 gpiostatus = ipath_read_kreg32(
1095                         dd, dd->ipath_kregs->kr_gpio_status);
1096                 /* First the error-counter case.
1097                  */
1098                 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) &&
1099                     (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) {
1100                         /* want to clear the bits we see asserted. */
1101                         to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK);
1102
1103                         /*
1104                          * Count appropriately, clear bits out of our copy,
1105                          * as they have been "handled".
1106                          */
1107                         if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) {
1108                                 ipath_dbg("FlowCtl on UnsupVL\n");
1109                                 dd->ipath_rxfc_unsupvl_errs++;
1110                         }
1111                         if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) {
1112                                 ipath_dbg("Overrun Threshold exceeded\n");
1113                                 dd->ipath_overrun_thresh_errs++;
1114                         }
1115                         if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) {
1116                                 ipath_dbg("Local Link Integrity error\n");
1117                                 dd->ipath_lli_errs++;
1118                         }
1119                         gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK;
1120                 }
1121                 /* Now the Port0 Receive case */
1122                 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) &&
1123                     (dd->ipath_flags & IPATH_GPIO_INTR)) {
1124                         /*
1125                          * GPIO status bit 2 is set, and we expected it.
1126                          * clear it and indicate in p0bits.
1127                          * This probably only happens if a Port0 pkt
1128                          * arrives at _just_ the wrong time, and we
1129                          * handle that by seting chk0rcv;
1130                          */
1131                         to_clear |= (1 << IPATH_GPIO_PORT0_BIT);
1132                         gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
1133                         chk0rcv = 1;
1134                 }
1135                 if (gpiostatus) {
1136                         /*
1137                          * Some unexpected bits remain. If they could have
1138                          * caused the interrupt, complain and clear.
1139                          * To avoid repetition of this condition, also clear
1140                          * the mask. It is almost certainly due to error.
1141                          */
1142                         const u32 mask = (u32) dd->ipath_gpio_mask;
1143
1144                         if (mask & gpiostatus) {
1145                                 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1146                                   gpiostatus & mask);
1147                                 to_clear |= (gpiostatus & mask);
1148                                 dd->ipath_gpio_mask &= ~(gpiostatus & mask);
1149                                 ipath_write_kreg(dd,
1150                                         dd->ipath_kregs->kr_gpio_mask,
1151                                         dd->ipath_gpio_mask);
1152                         }
1153                 }
1154                 if (to_clear) {
1155                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
1156                                         (u64) to_clear);
1157                 }
1158         }
1159         chk0rcv |= istat & port0rbits;
1160
1161         /*
1162          * Clear the interrupt bits we found set, unless they are receive
1163          * related, in which case we already cleared them above, and don't
1164          * want to clear them again, because we might lose an interrupt.
1165          * Clear it early, so we "know" know the chip will have seen this by
1166          * the time we process the queue, and will re-interrupt if necessary.
1167          * The processor itself won't take the interrupt again until we return.
1168          */
1169         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
1170
1171         /*
1172          * handle port0 receive  before checking for pio buffers available,
1173          * since receives can overflow; piobuf waiters can afford a few
1174          * extra cycles, since they were waiting anyway, and user's waiting
1175          * for receive are at the bottom.
1176          */
1177         if (chk0rcv) {
1178                 ipath_kreceive(dd->ipath_pd[0]);
1179                 istat &= ~port0rbits;
1180         }
1181
1182         if (istat & ((dd->ipath_i_rcvavail_mask <<
1183                       INFINIPATH_I_RCVAVAIL_SHIFT)
1184                      | (dd->ipath_i_rcvurg_mask <<
1185                         INFINIPATH_I_RCVURG_SHIFT)))
1186                 handle_urcv(dd, istat);
1187
1188         if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
1189                 unsigned long flags;
1190
1191                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1192                 dd->ipath_sendctrl &= ~INFINIPATH_S_PIOINTBUFAVAIL;
1193                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1194                                  dd->ipath_sendctrl);
1195                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1196                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1197
1198                 handle_layer_pioavail(dd);
1199         }
1200
1201         ret = IRQ_HANDLED;
1202
1203 bail:
1204         return ret;
1205 }