drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276         resp->offset = queue->offset;
 277 }
 278
 279 /*
 280  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 281  */
 282 static inline int init_qp_queue(struct ehca_shca *shca,
 283                                 struct ehca_pd *pd,
 284                                 struct ehca_qp *my_qp,
 285                                 struct ipz_queue *queue,
 286                                 int q_type,
 287                                 u64 expected_hret,
 288                                 struct ehca_alloc_queue_parms *parms,
 289                                 int wqe_size)
 290 {
 291         int ret, cnt, ipz_rc, nr_q_pages;
 292         void *vpage;
 293         u64 rpage, h_ret;
 294         struct ib_device *ib_dev = &shca->ib_device;
 295         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 296
 297         if (!parms->queue_size)
 298                 return 0;
 299
 300         if (parms->is_small) {
 301                 nr_q_pages = 1;
 302                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 303                                         128 << parms->page_size,
 304                                         wqe_size, parms->act_nr_sges, 1);
 305         } else {
 306                 nr_q_pages = parms->queue_size;
 307                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 308                                         EHCA_PAGESIZE, wqe_size,
 309                                         parms->act_nr_sges, 0);
 310         }
 311
 312         if (!ipz_rc) {
 313                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
 314                          ipz_rc);
 315                 return -EBUSY;
 316         }
 317
 318         /* register queue pages */
 319         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 320                 vpage = ipz_qpageit_get_inc(queue);
 321                 if (!vpage) {
 322                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 323                                  "failed p_vpage= %p", vpage);
 324                         ret = -EINVAL;
 325                         goto init_qp_queue1;
 326                 }
 327                 rpage = virt_to_abs(vpage);
 328
 329                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 330                                                  my_qp->ipz_qp_handle,
 331                                                  NULL, 0, q_type,
 332                                                  rpage, parms->is_small ? 0 : 1,
 333                                                  my_qp->galpas.kernel);
 334                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 335                         if (h_ret != expected_hret) {
 336                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 337                                          "h_ret= %lx ", h_ret);
 338                                 ret = ehca2ib_return_code(h_ret);
 339                                 goto init_qp_queue1;
 340                         }
 341                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 342                         if (vpage) {
 343                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 344                                          "should not succeed vpage=%p", vpage);
 345                                 ret = -EINVAL;
 346                                 goto init_qp_queue1;
 347                         }
 348                 } else {
 349                         if (h_ret != H_PAGE_REGISTERED) {
 350                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 351                                          "h_ret= %lx ", h_ret);
 352                                 ret = ehca2ib_return_code(h_ret);
 353                                 goto init_qp_queue1;
 354                         }
 355                 }
 356         }
 357
 358         ipz_qeit_reset(queue);
 359
 360         return 0;
 361
 362 init_qp_queue1:
 363         ipz_queue_dtor(pd, queue);
 364         return ret;
 365 }
 366
 367 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
 368 {
 369         if (is_llqp)
 370                 return 128 << act_nr_sge;
 371         else
 372                 return offsetof(struct ehca_wqe,
 373                                 u.nud.sg_list[act_nr_sge]);
 374 }
 375
 376 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
 377                                        int req_nr_sge, int is_llqp)
 378 {
 379         u32 wqe_size, q_size;
 380         int act_nr_sge = req_nr_sge;
 381
 382         if (!is_llqp)
 383                 /* round up #SGEs so WQE size is a power of 2 */
 384                 for (act_nr_sge = 4; act_nr_sge <= 252;
 385                      act_nr_sge = 4 + 2 * act_nr_sge)
 386                         if (act_nr_sge >= req_nr_sge)
 387                                 break;
 388
 389         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
 390         q_size = wqe_size * (queue->max_wr + 1);
 391
 392         if (q_size <= 512)
 393                 queue->page_size = 2;
 394         else if (q_size <= 1024)
 395                 queue->page_size = 3;
 396         else
 397                 queue->page_size = 0;
 398
 399         queue->is_small = (queue->page_size != 0);
 400 }
 401
 402 /*
 403  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 404  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 405  * fields, the field out of init_attr is used.
 406  */
 407 static struct ehca_qp *internal_create_qp(
 408         struct ib_pd *pd,
 409         struct ib_qp_init_attr *init_attr,
 410         struct ib_srq_init_attr *srq_init_attr,
 411         struct ib_udata *udata, int is_srq)
 412 {
 413         struct ehca_qp *my_qp;
 414         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 415         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 416                                               ib_device);
 417         struct ib_ucontext *context = NULL;
 418         u64 h_ret;
 419         int is_llqp = 0, has_srq = 0;
 420         int qp_type, max_send_sge, max_recv_sge, ret;
 421
 422         /* h_call's out parameters */
 423         struct ehca_alloc_qp_parms parms;
 424         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 425         unsigned long flags;
 426
 427         memset(&parms, 0, sizeof(parms));
 428         qp_type = init_attr->qp_type;
 429
 430         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 431                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 432                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 433                          init_attr->sq_sig_type);
 434                 return ERR_PTR(-EINVAL);
 435         }
 436
 437         /* save LLQP info */
 438         if (qp_type & 0x80) {
 439                 is_llqp = 1;
 440                 parms.ext_type = EQPT_LLQP;
 441                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 442         }
 443         qp_type &= 0x1F;
 444         init_attr->qp_type &= 0x1F;
 445
 446         /* handle SRQ base QPs */
 447         if (init_attr->srq) {
 448                 struct ehca_qp *my_srq =
 449                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 450
 451                 has_srq = 1;
 452                 parms.ext_type = EQPT_SRQBASE;
 453                 parms.srq_qpn = my_srq->real_qp_num;
 454                 parms.srq_token = my_srq->token;
 455         }
 456
 457         if (is_llqp && has_srq) {
 458                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 459                 return ERR_PTR(-EINVAL);
 460         }
 461
 462         /* handle SRQs */
 463         if (is_srq) {
 464                 parms.ext_type = EQPT_SRQ;
 465                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 466                 if (init_attr->cap.max_recv_sge > 3) {
 467                         ehca_err(pd->device, "no more than three SGEs "
 468                                  "supported for SRQ  pd=%p  max_sge=%x",
 469                                  pd, init_attr->cap.max_recv_sge);
 470                         return ERR_PTR(-EINVAL);
 471                 }
 472         }
 473
 474         /* check QP type */
 475         if (qp_type != IB_QPT_UD &&
 476             qp_type != IB_QPT_UC &&
 477             qp_type != IB_QPT_RC &&
 478             qp_type != IB_QPT_SMI &&
 479             qp_type != IB_QPT_GSI) {
 480                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 481                 return ERR_PTR(-EINVAL);
 482         }
 483
 484         if (is_llqp) {
 485                 switch (qp_type) {
 486                 case IB_QPT_RC:
 487                         if ((init_attr->cap.max_send_wr > 255) ||
 488                             (init_attr->cap.max_recv_wr > 255)) {
 489                                 ehca_err(pd->device,
 490                                          "Invalid Number of max_sq_wr=%x "
 491                                          "or max_rq_wr=%x for RC LLQP",
 492                                          init_attr->cap.max_send_wr,
 493                                          init_attr->cap.max_recv_wr);
 494                                 return ERR_PTR(-EINVAL);
 495                         }
 496                         break;
 497                 case IB_QPT_UD:
 498                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 499                                 ehca_err(pd->device, "UD LLQP not supported "
 500                                          "by this adapter");
 501                                 return ERR_PTR(-ENOSYS);
 502                         }
 503                         if (!(init_attr->cap.max_send_sge <= 5
 504                             && init_attr->cap.max_send_sge >= 1
 505                             && init_attr->cap.max_recv_sge <= 5
 506                             && init_attr->cap.max_recv_sge >= 1)) {
 507                                 ehca_err(pd->device,
 508                                          "Invalid Number of max_send_sge=%x "
 509                                          "or max_recv_sge=%x for UD LLQP",
 510                                          init_attr->cap.max_send_sge,
 511                                          init_attr->cap.max_recv_sge);
 512                                 return ERR_PTR(-EINVAL);
 513                         } else if (init_attr->cap.max_send_wr > 255) {
 514                                 ehca_err(pd->device,
 515                                          "Invalid Number of "
 516                                          "ax_send_wr=%x for UD QP_TYPE=%x",
 517                                          init_attr->cap.max_send_wr, qp_type);
 518                                 return ERR_PTR(-EINVAL);
 519                         }
 520                         break;
 521                 default:
 522                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 523                                  qp_type);
 524                         return ERR_PTR(-EINVAL);
 525                         break;
 526                 }
 527         }
 528
 529         if (pd->uobject && udata)
 530                 context = pd->uobject->context;
 531
 532         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 533         if (!my_qp) {
 534                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 535                 return ERR_PTR(-ENOMEM);
 536         }
 537
 538         spin_lock_init(&my_qp->spinlock_s);
 539         spin_lock_init(&my_qp->spinlock_r);
 540         my_qp->qp_type = qp_type;
 541         my_qp->ext_type = parms.ext_type;
 542
 543         if (init_attr->recv_cq)
 544                 my_qp->recv_cq =
 545                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 546         if (init_attr->send_cq)
 547                 my_qp->send_cq =
 548                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 549
 550         do {
 551                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 552                         ret = -ENOMEM;
 553                         ehca_err(pd->device, "Can't reserve idr resources.");
 554                         goto create_qp_exit0;
 555                 }
 556
 557                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
 558                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 559                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 560
 561         } while (ret == -EAGAIN);
 562
 563         if (ret) {
 564                 ret = -ENOMEM;
 565                 ehca_err(pd->device, "Can't allocate new idr entry.");
 566                 goto create_qp_exit0;
 567         }
 568
 569         parms.servicetype = ibqptype2servicetype(qp_type);
 570         if (parms.servicetype < 0) {
 571                 ret = -EINVAL;
 572                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 573                 goto create_qp_exit0;
 574         }
 575
 576         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 577                 parms.sigtype = HCALL_SIGT_EVERY;
 578         else
 579                 parms.sigtype = HCALL_SIGT_BY_WQE;
 580
 581         /* UD_AV CIRCUMVENTION */
 582         max_send_sge = init_attr->cap.max_send_sge;
 583         max_recv_sge = init_attr->cap.max_recv_sge;
 584         if (parms.servicetype == ST_UD && !is_llqp) {
 585                 max_send_sge += 2;
 586                 max_recv_sge += 2;
 587         }
 588
 589         parms.token = my_qp->token;
 590         parms.eq_handle = shca->eq.ipz_eq_handle;
 591         parms.pd = my_pd->fw_pd;
 592         if (my_qp->send_cq)
 593                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 594         if (my_qp->recv_cq)
 595                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 596
 597         parms.squeue.max_wr = init_attr->cap.max_send_wr;
 598         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
 599         parms.squeue.max_sge = max_send_sge;
 600         parms.rqueue.max_sge = max_recv_sge;
 601
 602         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
 603                 if (HAS_SQ(my_qp))
 604                         ehca_determine_small_queue(
 605                                 &parms.squeue, max_send_sge, is_llqp);
 606                 if (HAS_RQ(my_qp))
 607                         ehca_determine_small_queue(
 608                                 &parms.rqueue, max_recv_sge, is_llqp);
 609                 parms.qp_storage =
 610                         (parms.squeue.is_small || parms.rqueue.is_small);
 611         }
 612
 613         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 614         if (h_ret != H_SUCCESS) {
 615                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
 616                          h_ret);
 617                 ret = ehca2ib_return_code(h_ret);
 618                 goto create_qp_exit1;
 619         }
 620
 621         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 622         my_qp->ipz_qp_handle = parms.qp_handle;
 623         my_qp->galpas = parms.galpas;
 624
 625         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
 626         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
 627
 628         switch (qp_type) {
 629         case IB_QPT_RC:
 630                 if (is_llqp) {
 631                         parms.squeue.act_nr_sges = 1;
 632                         parms.rqueue.act_nr_sges = 1;
 633                 }
 634                 break;
 635         case IB_QPT_UD:
 636         case IB_QPT_GSI:
 637         case IB_QPT_SMI:
 638                 /* UD circumvention */
 639                 if (is_llqp) {
 640                         parms.squeue.act_nr_sges = 1;
 641                         parms.rqueue.act_nr_sges = 1;
 642                 } else {
 643                         parms.squeue.act_nr_sges -= 2;
 644                         parms.rqueue.act_nr_sges -= 2;
 645                 }
 646
 647                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 648                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
 649                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
 650                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
 651                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
 652                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 653                 }
 654
 655                 break;
 656
 657         default:
 658                 break;
 659         }
 660
 661         /* initialize r/squeue and register queue pages */
 662         if (HAS_SQ(my_qp)) {
 663                 ret = init_qp_queue(
 664                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
 665                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 666                         &parms.squeue, swqe_size);
 667                 if (ret) {
 668                         ehca_err(pd->device, "Couldn't initialize squeue "
 669                                  "and pages  ret=%x", ret);
 670                         goto create_qp_exit2;
 671                 }
 672         }
 673
 674         if (HAS_RQ(my_qp)) {
 675                 ret = init_qp_queue(
 676                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
 677                         H_SUCCESS, &parms.rqueue, rwqe_size);
 678                 if (ret) {
 679                         ehca_err(pd->device, "Couldn't initialize rqueue "
 680                                  "and pages ret=%x", ret);
 681                         goto create_qp_exit3;
 682                 }
 683         }
 684
 685         if (is_srq) {
 686                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 687                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 688
 689                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 690                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 691         } else {
 692                 my_qp->ib_qp.qp_num = ib_qp_num;
 693                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 694                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 695
 696                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 697                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 698
 699                 my_qp->ib_qp.qp_type = qp_type;
 700                 my_qp->ib_qp.srq = init_attr->srq;
 701
 702                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 703                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 704         }
 705
 706         init_attr->cap.max_inline_data = 0; /* not supported yet */
 707         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
 708         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
 709         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
 710         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
 711         my_qp->init_attr = *init_attr;
 712
 713         /* NOTE: define_apq0() not supported yet */
 714         if (qp_type == IB_QPT_GSI) {
 715                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 716                 if (h_ret != H_SUCCESS) {
 717                         ret = ehca2ib_return_code(h_ret);
 718                         goto create_qp_exit4;
 719                 }
 720         }
 721
 722         if (my_qp->send_cq) {
 723                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 724                 if (ret) {
 725                         ehca_err(pd->device,
 726                                  "Couldn't assign qp to send_cq ret=%x", ret);
 727                         goto create_qp_exit4;
 728                 }
 729         }
 730
 731         /* copy queues, galpa data to user space */
 732         if (context && udata) {
 733                 struct ehca_create_qp_resp resp;
 734                 memset(&resp, 0, sizeof(resp));
 735
 736                 resp.qp_num = my_qp->real_qp_num;
 737                 resp.token = my_qp->token;
 738                 resp.qp_type = my_qp->qp_type;
 739                 resp.ext_type = my_qp->ext_type;
 740                 resp.qkey = my_qp->qkey;
 741                 resp.real_qp_num = my_qp->real_qp_num;
 742
 743                 if (HAS_SQ(my_qp))
 744                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 745                 if (HAS_RQ(my_qp))
 746                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 747
 748                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 749                         ehca_err(pd->device, "Copy to udata failed");
 750                         ret = -EINVAL;
 751                         goto create_qp_exit4;
 752                 }
 753         }
 754
 755         return my_qp;
 756
 757 create_qp_exit4:
 758         if (HAS_RQ(my_qp))
 759                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
 760
 761 create_qp_exit3:
 762         if (HAS_SQ(my_qp))
 763                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
 764
 765 create_qp_exit2:
 766         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 767
 768 create_qp_exit1:
 769         write_lock_irqsave(&ehca_qp_idr_lock, flags);
 770         idr_remove(&ehca_qp_idr, my_qp->token);
 771         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 772
 773 create_qp_exit0:
 774         kmem_cache_free(qp_cache, my_qp);
 775         return ERR_PTR(ret);
 776 }
 777
 778 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 779                              struct ib_qp_init_attr *qp_init_attr,
 780                              struct ib_udata *udata)
 781 {
 782         struct ehca_qp *ret;
 783
 784         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 785         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
 786 }
 787
 788 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 789                                struct ib_uobject *uobject);
 790
 791 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 792                                struct ib_srq_init_attr *srq_init_attr,
 793                                struct ib_udata *udata)
 794 {
 795         struct ib_qp_init_attr qp_init_attr;
 796         struct ehca_qp *my_qp;
 797         struct ib_srq *ret;
 798         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 799                                               ib_device);
 800         struct hcp_modify_qp_control_block *mqpcb;
 801         u64 hret, update_mask;
 802
 803         /* For common attributes, internal_create_qp() takes its info
 804          * out of qp_init_attr, so copy all common attrs there.
 805          */
 806         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 807         qp_init_attr.event_handler = srq_init_attr->event_handler;
 808         qp_init_attr.qp_context = srq_init_attr->srq_context;
 809         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 810         qp_init_attr.qp_type = IB_QPT_RC;
 811         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 812         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 813
 814         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 815         if (IS_ERR(my_qp))
 816                 return (struct ib_srq *)my_qp;
 817
 818         /* copy back return values */
 819         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 820         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 821
 822         /* drive SRQ into RTR state */
 823         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 824         if (!mqpcb) {
 825                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 826                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 827                 ret = ERR_PTR(-ENOMEM);
 828                 goto create_srq1;
 829         }
 830
 831         mqpcb->qp_state = EHCA_QPS_INIT;
 832         mqpcb->prim_phys_port = 1;
 833         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 834         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 835                                 my_qp->ipz_qp_handle,
 836                                 &my_qp->pf,
 837                                 update_mask,
 838                                 mqpcb, my_qp->galpas.kernel);
 839         if (hret != H_SUCCESS) {
 840                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 841                          "ehca_qp=%p qp_num=%x hret=%lx",
 842                          my_qp, my_qp->real_qp_num, hret);
 843                 goto create_srq2;
 844         }
 845
 846         mqpcb->qp_enable = 1;
 847         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 848         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 849                                 my_qp->ipz_qp_handle,
 850                                 &my_qp->pf,
 851                                 update_mask,
 852                                 mqpcb, my_qp->galpas.kernel);
 853         if (hret != H_SUCCESS) {
 854                 ehca_err(pd->device, "Could not enable SRQ"
 855                          "ehca_qp=%p qp_num=%x hret=%lx",
 856                          my_qp, my_qp->real_qp_num, hret);
 857                 goto create_srq2;
 858         }
 859
 860         mqpcb->qp_state  = EHCA_QPS_RTR;
 861         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 862         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 863                                 my_qp->ipz_qp_handle,
 864                                 &my_qp->pf,
 865                                 update_mask,
 866                                 mqpcb, my_qp->galpas.kernel);
 867         if (hret != H_SUCCESS) {
 868                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 869                          "ehca_qp=%p qp_num=%x hret=%lx",
 870                          my_qp, my_qp->real_qp_num, hret);
 871                 goto create_srq2;
 872         }
 873
 874         return &my_qp->ib_srq;
 875
 876 create_srq2:
 877         ret = ERR_PTR(ehca2ib_return_code(hret));
 878         ehca_free_fw_ctrlblock(mqpcb);
 879
 880 create_srq1:
 881         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 882
 883         return ret;
 884 }
 885
 886 /*
 887  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 888  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 889  * returns total number of bad wqes in bad_wqe_cnt
 890  */
 891 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 892                            int *bad_wqe_cnt)
 893 {
 894         u64 h_ret;
 895         struct ipz_queue *squeue;
 896         void *bad_send_wqe_p, *bad_send_wqe_v;
 897         u64 q_ofs;
 898         struct ehca_wqe *wqe;
 899         int qp_num = my_qp->ib_qp.qp_num;
 900
 901         /* get send wqe pointer */
 902         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 903                                            my_qp->ipz_qp_handle, &my_qp->pf,
 904                                            &bad_send_wqe_p, NULL, 2);
 905         if (h_ret != H_SUCCESS) {
 906                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 907                          " ehca_qp=%p qp_num=%x h_ret=%lx",
 908                          my_qp, qp_num, h_ret);
 909                 return ehca2ib_return_code(h_ret);
 910         }
 911         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
 912         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 913                  qp_num, bad_send_wqe_p);
 914         /* convert wqe pointer to vadr */
 915         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 916         if (ehca_debug_level)
 917                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 918         squeue = &my_qp->ipz_squeue;
 919         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 920                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 921                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 922                 return -EFAULT;
 923         }
 924
 925         /* loop sets wqe's purge bit */
 926         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 927         *bad_wqe_cnt = 0;
 928         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 929                 if (ehca_debug_level)
 930                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 931                 wqe->nr_of_data_seg = 0; /* suppress data access */
 932                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 933                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 934                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 935                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 936         }
 937         /*
 938          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 939          *  i.e. nr of wqes with flush error status is one less
 940          */
 941         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 942                  qp_num, (*bad_wqe_cnt)-1);
 943         wqe->wqef = 0;
 944
 945         return 0;
 946 }
 947
 948 /*
 949  * internal_modify_qp with circumvention to handle aqp0 properly
 950  * smi_reset2init indicates if this is an internal reset-to-init-call for
 951  * smi. This flag must always be zero if called from ehca_modify_qp()!
 952  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 953  */
 954 static int internal_modify_qp(struct ib_qp *ibqp,
 955                               struct ib_qp_attr *attr,
 956                               int attr_mask, int smi_reset2init)
 957 {
 958         enum ib_qp_state qp_cur_state, qp_new_state;
 959         int cnt, qp_attr_idx, ret = 0;
 960         enum ib_qp_statetrans statetrans;
 961         struct hcp_modify_qp_control_block *mqpcb;
 962         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 963         struct ehca_shca *shca =
 964                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 965         u64 update_mask;
 966         u64 h_ret;
 967         int bad_wqe_cnt = 0;
 968         int squeue_locked = 0;
 969         unsigned long flags = 0;
 970
 971         /* do query_qp to obtain current attr values */
 972         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 973         if (!mqpcb) {
 974                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 975                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 976                 return -ENOMEM;
 977         }
 978
 979         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 980                                 my_qp->ipz_qp_handle,
 981                                 &my_qp->pf,
 982                                 mqpcb, my_qp->galpas.kernel);
 983         if (h_ret != H_SUCCESS) {
 984                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
 985                          "ehca_qp=%p qp_num=%x h_ret=%lx",
 986                          my_qp, ibqp->qp_num, h_ret);
 987                 ret = ehca2ib_return_code(h_ret);
 988                 goto modify_qp_exit1;
 989         }
 990
 991         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
 992
 993         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
 994                 ret = -EINVAL;
 995                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
 996                          "ehca_qp=%p qp_num=%x",
 997                          mqpcb->qp_state, my_qp, ibqp->qp_num);
 998                 goto modify_qp_exit1;
 999         }
1000         /*
1001          * circumvention to set aqp0 initial state to init
1002          * as expected by IB spec
1003          */
1004         if (smi_reset2init == 0 &&
1005             ibqp->qp_type == IB_QPT_SMI &&
1006             qp_cur_state == IB_QPS_RESET &&
1007             (attr_mask & IB_QP_STATE) &&
1008             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1009                 struct ib_qp_attr smiqp_attr = {
1010                         .qp_state = IB_QPS_INIT,
1011                         .port_num = my_qp->init_attr.port_num,
1012                         .pkey_index = 0,
1013                         .qkey = 0
1014                 };
1015                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1016                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1017                 int smirc = internal_modify_qp(
1018                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1019                 if (smirc) {
1020                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1021                                  "ehca_modify_qp() rc=%x", smirc);
1022                         ret = H_PARAMETER;
1023                         goto modify_qp_exit1;
1024                 }
1025                 qp_cur_state = IB_QPS_INIT;
1026                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1027         }
1028         /* is transmitted current state  equal to "real" current state */
1029         if ((attr_mask & IB_QP_CUR_STATE) &&
1030             qp_cur_state != attr->cur_qp_state) {
1031                 ret = -EINVAL;
1032                 ehca_err(ibqp->device,
1033                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1034                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1035                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1036                 goto modify_qp_exit1;
1037         }
1038
1039         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1040                  "new qp_state=%x attribute_mask=%x",
1041                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1042
1043         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1044         if (!smi_reset2init &&
1045             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1046                                 attr_mask)) {
1047                 ret = -EINVAL;
1048                 ehca_err(ibqp->device,
1049                          "Invalid qp transition new_state=%x cur_state=%x "
1050                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1051                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1052                 goto modify_qp_exit1;
1053         }
1054
1055         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1056         if (mqpcb->qp_state)
1057                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1058         else {
1059                 ret = -EINVAL;
1060                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1061                          "ehca_qp=%p qp_num=%x",
1062                          qp_new_state, my_qp, ibqp->qp_num);
1063                 goto modify_qp_exit1;
1064         }
1065
1066         /* retrieve state transition struct to get req and opt attrs */
1067         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1068         if (statetrans < 0) {
1069                 ret = -EINVAL;
1070                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1071                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1072                          "qp_num=%x", qp_cur_state, qp_new_state,
1073                          statetrans, my_qp, ibqp->qp_num);
1074                 goto modify_qp_exit1;
1075         }
1076
1077         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1078
1079         if (qp_attr_idx < 0) {
1080                 ret = qp_attr_idx;
1081                 ehca_err(ibqp->device,
1082                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1083                          ibqp->qp_type, my_qp, ibqp->qp_num);
1084                 goto modify_qp_exit1;
1085         }
1086
1087         ehca_dbg(ibqp->device,
1088                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1089                  my_qp, ibqp->qp_num, statetrans);
1090
1091         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1092          * in non-LL UD QPs.
1093          */
1094         if ((my_qp->qp_type == IB_QPT_UD) &&
1095             (my_qp->ext_type != EQPT_LLQP) &&
1096             (statetrans == IB_QPST_INIT2RTR) &&
1097             (shca->hw_level >= 0x22)) {
1098                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1099                 mqpcb->send_grh_flag = 1;
1100         }
1101
1102         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1103         if ((my_qp->qp_type == IB_QPT_UD ||
1104              my_qp->qp_type == IB_QPT_GSI ||
1105              my_qp->qp_type == IB_QPT_SMI) &&
1106             statetrans == IB_QPST_SQE2RTS) {
1107                 /* mark next free wqe if kernel */
1108                 if (!ibqp->uobject) {
1109                         struct ehca_wqe *wqe;
1110                         /* lock send queue */
1111                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1112                         squeue_locked = 1;
1113                         /* mark next free wqe */
1114                         wqe = (struct ehca_wqe *)
1115                                 ipz_qeit_get(&my_qp->ipz_squeue);
1116                         wqe->optype = wqe->wqef = 0xff;
1117                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1118                                  ibqp->qp_num, wqe);
1119                 }
1120                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1121                 if (ret) {
1122                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1123                                  "ehca_qp=%p qp_num=%x ret=%x",
1124                                  my_qp, ibqp->qp_num, ret);
1125                         goto modify_qp_exit2;
1126                 }
1127         }
1128
1129         /*
1130          * enable RDMA_Atomic_Control if reset->init und reliable con
1131          * this is necessary since gen2 does not provide that flag,
1132          * but pHyp requires it
1133          */
1134         if (statetrans == IB_QPST_RESET2INIT &&
1135             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1136                 mqpcb->rdma_atomic_ctrl = 3;
1137                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1138         }
1139         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1140         if (statetrans == IB_QPST_INIT2RTR &&
1141             (ibqp->qp_type == IB_QPT_UC) &&
1142             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1143                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1144                 update_mask |=
1145                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1146         }
1147
1148         if (attr_mask & IB_QP_PKEY_INDEX) {
1149                 mqpcb->prim_p_key_idx = attr->pkey_index;
1150                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1151         }
1152         if (attr_mask & IB_QP_PORT) {
1153                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1154                         ret = -EINVAL;
1155                         ehca_err(ibqp->device, "Invalid port=%x. "
1156                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1157                                  attr->port_num, my_qp, ibqp->qp_num,
1158                                  shca->num_ports);
1159                         goto modify_qp_exit2;
1160                 }
1161                 mqpcb->prim_phys_port = attr->port_num;
1162                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1163         }
1164         if (attr_mask & IB_QP_QKEY) {
1165                 mqpcb->qkey = attr->qkey;
1166                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1167         }
1168         if (attr_mask & IB_QP_AV) {
1169                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1170                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1171                                                 init_attr.port_num].rate);
1172
1173                 mqpcb->dlid = attr->ah_attr.dlid;
1174                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1175                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1176                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1177                 mqpcb->service_level = attr->ah_attr.sl;
1178                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1179
1180                 if (ah_mult < ehca_mult)
1181                         mqpcb->max_static_rate = (ah_mult > 0) ?
1182                         ((ehca_mult - 1) / ah_mult) : 0;
1183                 else
1184                         mqpcb->max_static_rate = 0;
1185                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1186
1187                 /*
1188                  * Always supply the GRH flag, even if it's zero, to give the
1189                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1190                  */
1191                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1192
1193                 /*
1194                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1195                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1196                  */
1197                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1198                         mqpcb->send_grh_flag = 1;
1199
1200                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1201                         update_mask |=
1202                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1203
1204                         for (cnt = 0; cnt < 16; cnt++)
1205                                 mqpcb->dest_gid.byte[cnt] =
1206                                         attr->ah_attr.grh.dgid.raw[cnt];
1207
1208                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1209                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1210                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1211                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1212                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1213                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1214                         update_mask |=
1215                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1216                 }
1217         }
1218
1219         if (attr_mask & IB_QP_PATH_MTU) {
1220                 mqpcb->path_mtu = attr->path_mtu;
1221                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1222         }
1223         if (attr_mask & IB_QP_TIMEOUT) {
1224                 mqpcb->timeout = attr->timeout;
1225                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1226         }
1227         if (attr_mask & IB_QP_RETRY_CNT) {
1228                 mqpcb->retry_count = attr->retry_cnt;
1229                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1230         }
1231         if (attr_mask & IB_QP_RNR_RETRY) {
1232                 mqpcb->rnr_retry_count = attr->rnr_retry;
1233                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1234         }
1235         if (attr_mask & IB_QP_RQ_PSN) {
1236                 mqpcb->receive_psn = attr->rq_psn;
1237                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1238         }
1239         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1240                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1241                         attr->max_dest_rd_atomic : 2;
1242                 update_mask |=
1243                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1244         }
1245         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1246                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1247                         attr->max_rd_atomic : 2;
1248                 update_mask |=
1249                         EHCA_BMASK_SET
1250                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1251         }
1252         if (attr_mask & IB_QP_ALT_PATH) {
1253                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1254                 int ehca_mult = ib_rate_to_mult(
1255                         shca->sport[my_qp->init_attr.port_num].rate);
1256
1257                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1258                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1259                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1260                 update_mask |=
1261                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1262                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1263                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1264
1265                 if (ah_mult < ehca_mult)
1266                         mqpcb->max_static_rate = (ah_mult > 0) ?
1267                         ((ehca_mult - 1) / ah_mult) : 0;
1268                 else
1269                         mqpcb->max_static_rate_al = 0;
1270
1271                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1272
1273                 /*
1274                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1275                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1276                  */
1277                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1278                         mqpcb->send_grh_flag_al = 1 << 31;
1279                         update_mask |=
1280                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1281                         mqpcb->source_gid_idx_al =
1282                                 attr->alt_ah_attr.grh.sgid_index;
1283                         update_mask |=
1284                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1285
1286                         for (cnt = 0; cnt < 16; cnt++)
1287                                 mqpcb->dest_gid_al.byte[cnt] =
1288                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1289
1290                         update_mask |=
1291                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1292                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1293                         update_mask |=
1294                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1295                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1296                         update_mask |=
1297                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1298                         mqpcb->traffic_class_al =
1299                                 attr->alt_ah_attr.grh.traffic_class;
1300                         update_mask |=
1301                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1302                 }
1303         }
1304
1305         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1306                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1307                 update_mask |=
1308                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1309         }
1310
1311         if (attr_mask & IB_QP_SQ_PSN) {
1312                 mqpcb->send_psn = attr->sq_psn;
1313                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1314         }
1315
1316         if (attr_mask & IB_QP_DEST_QPN) {
1317                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1318                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1319         }
1320
1321         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1322                 mqpcb->path_migration_state = attr->path_mig_state;
1323                 update_mask |=
1324                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1325         }
1326
1327         if (attr_mask & IB_QP_CAP) {
1328                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1329                 update_mask |=
1330                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1331                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1332                 update_mask |=
1333                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1334                 /* no support for max_send/recv_sge yet */
1335         }
1336
1337         if (ehca_debug_level)
1338                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1339
1340         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1341                                  my_qp->ipz_qp_handle,
1342                                  &my_qp->pf,
1343                                  update_mask,
1344                                  mqpcb, my_qp->galpas.kernel);
1345
1346         if (h_ret != H_SUCCESS) {
1347                 ret = ehca2ib_return_code(h_ret);
1348                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1349                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1350                 goto modify_qp_exit2;
1351         }
1352
1353         if ((my_qp->qp_type == IB_QPT_UD ||
1354              my_qp->qp_type == IB_QPT_GSI ||
1355              my_qp->qp_type == IB_QPT_SMI) &&
1356             statetrans == IB_QPST_SQE2RTS) {
1357                 /* doorbell to reprocessing wqes */
1358                 iosync(); /* serialize GAL register access */
1359                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1360                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1361         }
1362
1363         if (statetrans == IB_QPST_RESET2INIT ||
1364             statetrans == IB_QPST_INIT2INIT) {
1365                 mqpcb->qp_enable = 1;
1366                 mqpcb->qp_state = EHCA_QPS_INIT;
1367                 update_mask = 0;
1368                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1369
1370                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1371                                          my_qp->ipz_qp_handle,
1372                                          &my_qp->pf,
1373                                          update_mask,
1374                                          mqpcb,
1375                                          my_qp->galpas.kernel);
1376
1377                 if (h_ret != H_SUCCESS) {
1378                         ret = ehca2ib_return_code(h_ret);
1379                         ehca_err(ibqp->device, "ENABLE in context of "
1380                                  "RESET_2_INIT failed! Maybe you didn't get "
1381                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1382                                  h_ret, my_qp, ibqp->qp_num);
1383                         goto modify_qp_exit2;
1384                 }
1385         }
1386
1387         if (statetrans == IB_QPST_ANY2RESET) {
1388                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1389                 ipz_qeit_reset(&my_qp->ipz_squeue);
1390         }
1391
1392         if (attr_mask & IB_QP_QKEY)
1393                 my_qp->qkey = attr->qkey;
1394
1395 modify_qp_exit2:
1396         if (squeue_locked) { /* this means: sqe -> rts */
1397                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1398                 my_qp->sqerr_purgeflag = 1;
1399         }
1400
1401 modify_qp_exit1:
1402         ehca_free_fw_ctrlblock(mqpcb);
1403
1404         return ret;
1405 }
1406
1407 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1408                    struct ib_udata *udata)
1409 {
1410         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1411         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1412                                              ib_pd);
1413         u32 cur_pid = current->tgid;
1414
1415         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1416             my_pd->ownpid != cur_pid) {
1417                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1418                          cur_pid, my_pd->ownpid);
1419                 return -EINVAL;
1420         }
1421
1422         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1423 }
1424
1425 int ehca_query_qp(struct ib_qp *qp,
1426                   struct ib_qp_attr *qp_attr,
1427                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1428 {
1429         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1430         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1431                                              ib_pd);
1432         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1433                                               ib_device);
1434         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1435         struct hcp_modify_qp_control_block *qpcb;
1436         u32 cur_pid = current->tgid;
1437         int cnt, ret = 0;
1438         u64 h_ret;
1439
1440         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1441             my_pd->ownpid != cur_pid) {
1442                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1443                          cur_pid, my_pd->ownpid);
1444                 return -EINVAL;
1445         }
1446
1447         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1448                 ehca_err(qp->device, "Invalid attribute mask "
1449                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1450                          my_qp, qp->qp_num, qp_attr_mask);
1451                 return -EINVAL;
1452         }
1453
1454         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1455         if (!qpcb) {
1456                 ehca_err(qp->device, "Out of memory for qpcb "
1457                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1458                 return -ENOMEM;
1459         }
1460
1461         h_ret = hipz_h_query_qp(adapter_handle,
1462                                 my_qp->ipz_qp_handle,
1463                                 &my_qp->pf,
1464                                 qpcb, my_qp->galpas.kernel);
1465
1466         if (h_ret != H_SUCCESS) {
1467                 ret = ehca2ib_return_code(h_ret);
1468                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1469                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1470                          my_qp, qp->qp_num, h_ret);
1471                 goto query_qp_exit1;
1472         }
1473
1474         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1475         qp_attr->qp_state = qp_attr->cur_qp_state;
1476
1477         if (qp_attr->cur_qp_state == -EINVAL) {
1478                 ret = -EINVAL;
1479                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1480                          "ehca_qp=%p qp_num=%x",
1481                          qpcb->qp_state, my_qp, qp->qp_num);
1482                 goto query_qp_exit1;
1483         }
1484
1485         if (qp_attr->qp_state == IB_QPS_SQD)
1486                 qp_attr->sq_draining = 1;
1487
1488         qp_attr->qkey = qpcb->qkey;
1489         qp_attr->path_mtu = qpcb->path_mtu;
1490         qp_attr->path_mig_state = qpcb->path_migration_state;
1491         qp_attr->rq_psn = qpcb->receive_psn;
1492         qp_attr->sq_psn = qpcb->send_psn;
1493         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1494         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1495         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1496         /* UD_AV CIRCUMVENTION */
1497         if (my_qp->qp_type == IB_QPT_UD) {
1498                 qp_attr->cap.max_send_sge =
1499                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1500                 qp_attr->cap.max_recv_sge =
1501                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1502         } else {
1503                 qp_attr->cap.max_send_sge =
1504                         qpcb->actual_nr_sges_in_sq_wqe;
1505                 qp_attr->cap.max_recv_sge =
1506                         qpcb->actual_nr_sges_in_rq_wqe;
1507         }
1508
1509         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1510         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1511
1512         qp_attr->pkey_index =
1513                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1514
1515         qp_attr->port_num =
1516                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1517
1518         qp_attr->timeout = qpcb->timeout;
1519         qp_attr->retry_cnt = qpcb->retry_count;
1520         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1521
1522         qp_attr->alt_pkey_index =
1523                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1524
1525         qp_attr->alt_port_num = qpcb->alt_phys_port;
1526         qp_attr->alt_timeout = qpcb->timeout_al;
1527
1528         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1529         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1530
1531         /* primary av */
1532         qp_attr->ah_attr.sl = qpcb->service_level;
1533
1534         if (qpcb->send_grh_flag) {
1535                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1536         }
1537
1538         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1539         qp_attr->ah_attr.dlid = qpcb->dlid;
1540         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1541         qp_attr->ah_attr.port_num = qp_attr->port_num;
1542
1543         /* primary GRH */
1544         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1545         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1546         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1547         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1548
1549         for (cnt = 0; cnt < 16; cnt++)
1550                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1551                         qpcb->dest_gid.byte[cnt];
1552
1553         /* alternate AV */
1554         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1555         if (qpcb->send_grh_flag_al) {
1556                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1557         }
1558
1559         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1560         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1561         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1562
1563         /* alternate GRH */
1564         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1565         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1566         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1567         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1568
1569         for (cnt = 0; cnt < 16; cnt++)
1570                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1571                         qpcb->dest_gid_al.byte[cnt];
1572
1573         /* return init attributes given in ehca_create_qp */
1574         if (qp_init_attr)
1575                 *qp_init_attr = my_qp->init_attr;
1576
1577         if (ehca_debug_level)
1578                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1579
1580 query_qp_exit1:
1581         ehca_free_fw_ctrlblock(qpcb);
1582
1583         return ret;
1584 }
1585
1586 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1587                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1588 {
1589         struct ehca_qp *my_qp =
1590                 container_of(ibsrq, struct ehca_qp, ib_srq);
1591         struct ehca_pd *my_pd =
1592                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1593         struct ehca_shca *shca =
1594                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1595         struct hcp_modify_qp_control_block *mqpcb;
1596         u64 update_mask;
1597         u64 h_ret;
1598         int ret = 0;
1599
1600         u32 cur_pid = current->tgid;
1601         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1602             my_pd->ownpid != cur_pid) {
1603                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1604                          cur_pid, my_pd->ownpid);
1605                 return -EINVAL;
1606         }
1607
1608         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1609         if (!mqpcb) {
1610                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1611                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1612                 return -ENOMEM;
1613         }
1614
1615         update_mask = 0;
1616         if (attr_mask & IB_SRQ_LIMIT) {
1617                 attr_mask &= ~IB_SRQ_LIMIT;
1618                 update_mask |=
1619                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1620                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1621                 mqpcb->curr_srq_limit =
1622                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1623                 mqpcb->qp_aff_asyn_ev_log_reg =
1624                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1625         }
1626
1627         /* by now, all bits in attr_mask should have been cleared */
1628         if (attr_mask) {
1629                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1630                          "attr_mask=%x", attr_mask);
1631                 ret = -EINVAL;
1632                 goto modify_srq_exit0;
1633         }
1634
1635         if (ehca_debug_level)
1636                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1637
1638         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1639                                  NULL, update_mask, mqpcb,
1640                                  my_qp->galpas.kernel);
1641
1642         if (h_ret != H_SUCCESS) {
1643                 ret = ehca2ib_return_code(h_ret);
1644                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1645                          "ehca_qp=%p qp_num=%x",
1646                          h_ret, my_qp, my_qp->real_qp_num);
1647         }
1648
1649 modify_srq_exit0:
1650         ehca_free_fw_ctrlblock(mqpcb);
1651
1652         return ret;
1653 }
1654
1655 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1656 {
1657         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1658         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1659         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1660                                               ib_device);
1661         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1662         struct hcp_modify_qp_control_block *qpcb;
1663         u32 cur_pid = current->tgid;
1664         int ret = 0;
1665         u64 h_ret;
1666
1667         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1668             my_pd->ownpid != cur_pid) {
1669                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1670                          cur_pid, my_pd->ownpid);
1671                 return -EINVAL;
1672         }
1673
1674         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1675         if (!qpcb) {
1676                 ehca_err(srq->device, "Out of memory for qpcb "
1677                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1678                 return -ENOMEM;
1679         }
1680
1681         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1682                                 NULL, qpcb, my_qp->galpas.kernel);
1683
1684         if (h_ret != H_SUCCESS) {
1685                 ret = ehca2ib_return_code(h_ret);
1686                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1687                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1688                          my_qp, my_qp->real_qp_num, h_ret);
1689                 goto query_srq_exit1;
1690         }
1691
1692         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1693         srq_attr->srq_limit = EHCA_BMASK_GET(
1694                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1695
1696         if (ehca_debug_level)
1697                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1698
1699 query_srq_exit1:
1700         ehca_free_fw_ctrlblock(qpcb);
1701
1702         return ret;
1703 }
1704
1705 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1706                                struct ib_uobject *uobject)
1707 {
1708         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1709         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1710                                              ib_pd);
1711         u32 cur_pid = current->tgid;
1712         u32 qp_num = my_qp->real_qp_num;
1713         int ret;
1714         u64 h_ret;
1715         u8 port_num;
1716         enum ib_qp_type qp_type;
1717         unsigned long flags;
1718
1719         if (uobject) {
1720                 if (my_qp->mm_count_galpa ||
1721                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1722                         ehca_err(dev, "Resources still referenced in "
1723                                  "user space qp_num=%x", qp_num);
1724                         return -EINVAL;
1725                 }
1726                 if (my_pd->ownpid != cur_pid) {
1727                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1728                                  cur_pid, my_pd->ownpid);
1729                         return -EINVAL;
1730                 }
1731         }
1732
1733         if (my_qp->send_cq) {
1734                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1735                 if (ret) {
1736                         ehca_err(dev, "Couldn't unassign qp from "
1737                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1738                                  qp_num, my_qp->send_cq->cq_number);
1739                         return ret;
1740                 }
1741         }
1742
1743         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1744         idr_remove(&ehca_qp_idr, my_qp->token);
1745         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1746
1747         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1748         if (h_ret != H_SUCCESS) {
1749                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1750                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1751                 return ehca2ib_return_code(h_ret);
1752         }
1753
1754         port_num = my_qp->init_attr.port_num;
1755         qp_type  = my_qp->init_attr.qp_type;
1756
1757         /* no support for IB_QPT_SMI yet */
1758         if (qp_type == IB_QPT_GSI) {
1759                 struct ib_event event;
1760                 ehca_info(dev, "device %s: port %x is inactive.",
1761                           shca->ib_device.name, port_num);
1762                 event.device = &shca->ib_device;
1763                 event.event = IB_EVENT_PORT_ERR;
1764                 event.element.port_num = port_num;
1765                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1766                 ib_dispatch_event(&event);
1767         }
1768
1769         if (HAS_RQ(my_qp))
1770                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1771         if (HAS_SQ(my_qp))
1772                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1773         kmem_cache_free(qp_cache, my_qp);
1774         return 0;
1775 }
1776
1777 int ehca_destroy_qp(struct ib_qp *qp)
1778 {
1779         return internal_destroy_qp(qp->device,
1780                                    container_of(qp, struct ehca_qp, ib_qp),
1781                                    qp->uobject);
1782 }
1783
1784 int ehca_destroy_srq(struct ib_srq *srq)
1785 {
1786         return internal_destroy_qp(srq->device,
1787                                    container_of(srq, struct ehca_qp, ib_srq),
1788                                    srq->uobject);
1789 }
1790
1791 int ehca_init_qp_cache(void)
1792 {
1793         qp_cache = kmem_cache_create("ehca_cache_qp",
1794                                      sizeof(struct ehca_qp), 0,
1795                                      SLAB_HWCACHE_ALIGN,
1796                                      NULL);
1797         if (!qp_cache)
1798                 return -ENOMEM;
1799         return 0;
1800 }
1801
1802 void ehca_cleanup_qp_cache(void)
1803 {
1804         if (qp_cache)
1805                 kmem_cache_destroy(qp_cache);
1806 }