drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Waleri Fomin <fomin@de.ibm.com>
   7  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
   8  *           Reinhard Ernst <rernst@de.ibm.com>
   9  *           Heiko J Schick <schickhj@de.ibm.com>
  10  *
  11  *  Copyright (c) 2005 IBM Corporation
  12  *
  13  *  All rights reserved.
  14  *
  15  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  16  *  BSD.
  17  *
  18  * OpenIB BSD License
  19  *
  20  * Redistribution and use in source and binary forms, with or without
  21  * modification, are permitted provided that the following conditions are met:
  22  *
  23  * Redistributions of source code must retain the above copyright notice, this
  24  * list of conditions and the following disclaimer.
  25  *
  26  * Redistributions in binary form must reproduce the above copyright notice,
  27  * this list of conditions and the following disclaimer in the documentation
  28  * and/or other materials
  29  * provided with the distribution.
  30  *
  31  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  32  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  33  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  34  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  35  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  36  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  37  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  38  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  39  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  40  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  41  * POSSIBILITY OF SUCH DAMAGE.
  42  */
  43
  44
  45 #include <asm/current.h>
  46
  47 #include "ehca_classes.h"
  48 #include "ehca_tools.h"
  49 #include "ehca_qes.h"
  50 #include "ehca_iverbs.h"
  51 #include "hcp_if.h"
  52 #include "hipz_fns.h"
  53
  54 static struct kmem_cache *qp_cache;
  55
  56 /*
  57  * attributes not supported by query qp
  58  */
  59 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  60                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  61                                      IB_QP_ACCESS_FLAGS       | \
  62                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  63
  64 /*
  65  * ehca (internal) qp state values
  66  */
  67 enum ehca_qp_state {
  68         EHCA_QPS_RESET = 1,
  69         EHCA_QPS_INIT = 2,
  70         EHCA_QPS_RTR = 3,
  71         EHCA_QPS_RTS = 5,
  72         EHCA_QPS_SQD = 6,
  73         EHCA_QPS_SQE = 8,
  74         EHCA_QPS_ERR = 128
  75 };
  76
  77 /*
  78  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  79  */
  80 enum ib_qp_statetrans {
  81         IB_QPST_ANY2RESET,
  82         IB_QPST_ANY2ERR,
  83         IB_QPST_RESET2INIT,
  84         IB_QPST_INIT2RTR,
  85         IB_QPST_INIT2INIT,
  86         IB_QPST_RTR2RTS,
  87         IB_QPST_RTS2SQD,
  88         IB_QPST_RTS2RTS,
  89         IB_QPST_SQD2RTS,
  90         IB_QPST_SQE2RTS,
  91         IB_QPST_SQD2SQD,
  92         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  93 };
  94
  95 /*
  96  * ib2ehca_qp_state maps IB to ehca qp_state
  97  * returns ehca qp state corresponding to given ib qp state
  98  */
  99 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 100 {
 101         switch (ib_qp_state) {
 102         case IB_QPS_RESET:
 103                 return EHCA_QPS_RESET;
 104         case IB_QPS_INIT:
 105                 return EHCA_QPS_INIT;
 106         case IB_QPS_RTR:
 107                 return EHCA_QPS_RTR;
 108         case IB_QPS_RTS:
 109                 return EHCA_QPS_RTS;
 110         case IB_QPS_SQD:
 111                 return EHCA_QPS_SQD;
 112         case IB_QPS_SQE:
 113                 return EHCA_QPS_SQE;
 114         case IB_QPS_ERR:
 115                 return EHCA_QPS_ERR;
 116         default:
 117                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 118                 return -EINVAL;
 119         }
 120 }
 121
 122 /*
 123  * ehca2ib_qp_state maps ehca to IB qp_state
 124  * returns ib qp state corresponding to given ehca qp state
 125  */
 126 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 127                                                 ehca_qp_state)
 128 {
 129         switch (ehca_qp_state) {
 130         case EHCA_QPS_RESET:
 131                 return IB_QPS_RESET;
 132         case EHCA_QPS_INIT:
 133                 return IB_QPS_INIT;
 134         case EHCA_QPS_RTR:
 135                 return IB_QPS_RTR;
 136         case EHCA_QPS_RTS:
 137                 return IB_QPS_RTS;
 138         case EHCA_QPS_SQD:
 139                 return IB_QPS_SQD;
 140         case EHCA_QPS_SQE:
 141                 return IB_QPS_SQE;
 142         case EHCA_QPS_ERR:
 143                 return IB_QPS_ERR;
 144         default:
 145                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 146                 return -EINVAL;
 147         }
 148 }
 149
 150 /*
 151  * ehca_qp_type used as index for req_attr and opt_attr of
 152  * struct ehca_modqp_statetrans
 153  */
 154 enum ehca_qp_type {
 155         QPT_RC = 0,
 156         QPT_UC = 1,
 157         QPT_UD = 2,
 158         QPT_SQP = 3,
 159         QPT_MAX
 160 };
 161
 162 /*
 163  * ib2ehcaqptype maps Ib to ehca qp_type
 164  * returns ehca qp type corresponding to ib qp type
 165  */
 166 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 167 {
 168         switch (ibqptype) {
 169         case IB_QPT_SMI:
 170         case IB_QPT_GSI:
 171                 return QPT_SQP;
 172         case IB_QPT_RC:
 173                 return QPT_RC;
 174         case IB_QPT_UC:
 175                 return QPT_UC;
 176         case IB_QPT_UD:
 177                 return QPT_UD;
 178         default:
 179                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 180                 return -EINVAL;
 181         }
 182 }
 183
 184 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 185                                                          int ib_tostate)
 186 {
 187         int index = -EINVAL;
 188         switch (ib_tostate) {
 189         case IB_QPS_RESET:
 190                 index = IB_QPST_ANY2RESET;
 191                 break;
 192         case IB_QPS_INIT:
 193                 switch (ib_fromstate) {
 194                 case IB_QPS_RESET:
 195                         index = IB_QPST_RESET2INIT;
 196                         break;
 197                 case IB_QPS_INIT:
 198                         index = IB_QPST_INIT2INIT;
 199                         break;
 200                 }
 201                 break;
 202         case IB_QPS_RTR:
 203                 if (ib_fromstate == IB_QPS_INIT)
 204                         index = IB_QPST_INIT2RTR;
 205                 break;
 206         case IB_QPS_RTS:
 207                 switch (ib_fromstate) {
 208                 case IB_QPS_RTR:
 209                         index = IB_QPST_RTR2RTS;
 210                         break;
 211                 case IB_QPS_RTS:
 212                         index = IB_QPST_RTS2RTS;
 213                         break;
 214                 case IB_QPS_SQD:
 215                         index = IB_QPST_SQD2RTS;
 216                         break;
 217                 case IB_QPS_SQE:
 218                         index = IB_QPST_SQE2RTS;
 219                         break;
 220                 }
 221                 break;
 222         case IB_QPS_SQD:
 223                 if (ib_fromstate == IB_QPS_RTS)
 224                         index = IB_QPST_RTS2SQD;
 225                 break;
 226         case IB_QPS_SQE:
 227                 break;
 228         case IB_QPS_ERR:
 229                 index = IB_QPST_ANY2ERR;
 230                 break;
 231         default:
 232                 break;
 233         }
 234         return index;
 235 }
 236
 237 /*
 238  * ibqptype2servicetype returns hcp service type corresponding to given
 239  * ib qp type used by create_qp()
 240  */
 241 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 242 {
 243         switch (ibqptype) {
 244         case IB_QPT_SMI:
 245         case IB_QPT_GSI:
 246                 return ST_UD;
 247         case IB_QPT_RC:
 248                 return ST_RC;
 249         case IB_QPT_UC:
 250                 return ST_UC;
 251         case IB_QPT_UD:
 252                 return ST_UD;
 253         case IB_QPT_RAW_IPV6:
 254                 return -EINVAL;
 255         case IB_QPT_RAW_ETY:
 256                 return -EINVAL;
 257         default:
 258                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 259                 return -EINVAL;
 260         }
 261 }
 262
 263 /*
 264  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 265  */
 266 static inline int init_qp_queue(struct ehca_shca *shca,
 267                                 struct ehca_qp *my_qp,
 268                                 struct ipz_queue *queue,
 269                                 int q_type,
 270                                 u64 expected_hret,
 271                                 int nr_q_pages,
 272                                 int wqe_size,
 273                                 int nr_sges)
 274 {
 275         int ret, cnt, ipz_rc;
 276         void *vpage;
 277         u64 rpage, h_ret;
 278         struct ib_device *ib_dev = &shca->ib_device;
 279         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 280
 281         if (!nr_q_pages)
 282                 return 0;
 283
 284         ipz_rc = ipz_queue_ctor(queue, nr_q_pages, EHCA_PAGESIZE,
 285                                 wqe_size, nr_sges);
 286         if (!ipz_rc) {
 287                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
 288                          ipz_rc);
 289                 return -EBUSY;
 290         }
 291
 292         /* register queue pages */
 293         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 294                 vpage = ipz_qpageit_get_inc(queue);
 295                 if (!vpage) {
 296                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 297                                  "failed p_vpage= %p", vpage);
 298                         ret = -EINVAL;
 299                         goto init_qp_queue1;
 300                 }
 301                 rpage = virt_to_abs(vpage);
 302
 303                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 304                                                  my_qp->ipz_qp_handle,
 305                                                  NULL, 0, q_type,
 306                                                  rpage, 1,
 307                                                  my_qp->galpas.kernel);
 308                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 309                         if (h_ret != expected_hret) {
 310                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 311                                          "h_ret= %lx ", h_ret);
 312                                 ret = ehca2ib_return_code(h_ret);
 313                                 goto init_qp_queue1;
 314                         }
 315                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 316                         if (vpage) {
 317                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 318                                          "should not succeed vpage=%p", vpage);
 319                                 ret = -EINVAL;
 320                                 goto init_qp_queue1;
 321                         }
 322                 } else {
 323                         if (h_ret != H_PAGE_REGISTERED) {
 324                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 325                                          "h_ret= %lx ", h_ret);
 326                                 ret = ehca2ib_return_code(h_ret);
 327                                 goto init_qp_queue1;
 328                         }
 329                 }
 330         }
 331
 332         ipz_qeit_reset(queue);
 333
 334         return 0;
 335
 336 init_qp_queue1:
 337         ipz_queue_dtor(queue);
 338         return ret;
 339 }
 340
 341 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 342                              struct ib_qp_init_attr *init_attr,
 343                              struct ib_udata *udata)
 344 {
 345         static int da_rc_msg_size[]={ 128, 256, 512, 1024, 2048, 4096 };
 346         static int da_ud_sq_msg_size[]={ 128, 384, 896, 1920, 3968 };
 347         struct ehca_qp *my_qp;
 348         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 349         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 350                                               ib_device);
 351         struct ib_ucontext *context = NULL;
 352         u64 h_ret;
 353         int is_llqp = 0, has_srq = 0;
 354         int qp_type, max_send_sge, max_recv_sge, ret;
 355
 356         /* h_call's out parameters */
 357         struct ehca_alloc_qp_parms parms;
 358         u32 swqe_size = 0, rwqe_size = 0;
 359         unsigned long flags;
 360
 361         memset(&parms, 0, sizeof(parms));
 362         qp_type = init_attr->qp_type;
 363
 364         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 365                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 366                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 367                          init_attr->sq_sig_type);
 368                 return ERR_PTR(-EINVAL);
 369         }
 370
 371         /* save LLQP info */
 372         if (qp_type & 0x80) {
 373                 is_llqp = 1;
 374                 parms.ext_type = EQPT_LLQP;
 375                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 376         }
 377         qp_type &= 0x1F;
 378
 379         /* check for SRQ */
 380         has_srq = !!(init_attr->srq);
 381         if (is_llqp && has_srq) {
 382                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 383                 return ERR_PTR(-EINVAL);
 384         }
 385
 386         /* check QP type */
 387         if (qp_type != IB_QPT_UD &&
 388             qp_type != IB_QPT_UC &&
 389             qp_type != IB_QPT_RC &&
 390             qp_type != IB_QPT_SMI &&
 391             qp_type != IB_QPT_GSI) {
 392                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 393                 return ERR_PTR(-EINVAL);
 394         }
 395
 396         if (is_llqp && (qp_type != IB_QPT_RC && qp_type != IB_QPT_UD)) {
 397                 ehca_err(pd->device, "unsupported LL QP Type=%x", qp_type);
 398                 return ERR_PTR(-EINVAL);
 399         } else if (is_llqp && qp_type == IB_QPT_RC &&
 400                    (init_attr->cap.max_send_wr > 255 ||
 401                     init_attr->cap.max_recv_wr > 255 )) {
 402                 ehca_err(pd->device, "Invalid Number of max_sq_wr=%x "
 403                          "or max_rq_wr=%x for RC LLQP",
 404                          init_attr->cap.max_send_wr,
 405                          init_attr->cap.max_recv_wr);
 406                 return ERR_PTR(-EINVAL);
 407         } else if (is_llqp && qp_type == IB_QPT_UD &&
 408                  init_attr->cap.max_send_wr > 255) {
 409                 ehca_err(pd->device,
 410                          "Invalid Number of max_send_wr=%x for UD QP_TYPE=%x",
 411                          init_attr->cap.max_send_wr, qp_type);
 412                 return ERR_PTR(-EINVAL);
 413         }
 414
 415         if (pd->uobject && udata)
 416                 context = pd->uobject->context;
 417
 418         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 419         if (!my_qp) {
 420                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 421                 return ERR_PTR(-ENOMEM);
 422         }
 423
 424         spin_lock_init(&my_qp->spinlock_s);
 425         spin_lock_init(&my_qp->spinlock_r);
 426
 427         my_qp->recv_cq =
 428                 container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 429         my_qp->send_cq =
 430                 container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 431
 432         do {
 433                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 434                         ret = -ENOMEM;
 435                         ehca_err(pd->device, "Can't reserve idr resources.");
 436                         goto create_qp_exit0;
 437                 }
 438
 439                 spin_lock_irqsave(&ehca_qp_idr_lock, flags);
 440                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 441                 spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 442
 443         } while (ret == -EAGAIN);
 444
 445         if (ret) {
 446                 ret = -ENOMEM;
 447                 ehca_err(pd->device, "Can't allocate new idr entry.");
 448                 goto create_qp_exit0;
 449         }
 450
 451         parms.servicetype = ibqptype2servicetype(qp_type);
 452         if (parms.servicetype < 0) {
 453                 ret = -EINVAL;
 454                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 455                 goto create_qp_exit0;
 456         }
 457
 458         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 459                 parms.sigtype = HCALL_SIGT_EVERY;
 460         else
 461                 parms.sigtype = HCALL_SIGT_BY_WQE;
 462
 463         /* UD_AV CIRCUMVENTION */
 464         max_send_sge = init_attr->cap.max_send_sge;
 465         max_recv_sge = init_attr->cap.max_recv_sge;
 466         if (parms.servicetype == ST_UD) {
 467                 max_send_sge += 2;
 468                 max_recv_sge += 2;
 469         }
 470
 471         parms.token = my_qp->token;
 472         parms.eq_handle = shca->eq.ipz_eq_handle;
 473         parms.pd = my_pd->fw_pd;
 474         parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 475         parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 476
 477         parms.max_send_wr = init_attr->cap.max_send_wr;
 478         parms.max_recv_wr = init_attr->cap.max_recv_wr;
 479         parms.max_send_sge = max_send_sge;
 480         parms.max_recv_sge = max_recv_sge;
 481
 482         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 483         if (h_ret != H_SUCCESS) {
 484                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
 485                          h_ret);
 486                 ret = ehca2ib_return_code(h_ret);
 487                 goto create_qp_exit1;
 488         }
 489
 490         my_qp->ib_qp.qp_num = my_qp->real_qp_num = parms.real_qp_num;
 491         my_qp->ipz_qp_handle = parms.qp_handle;
 492         my_qp->galpas = parms.galpas;
 493
 494         switch (qp_type) {
 495         case IB_QPT_RC:
 496                 if (!is_llqp) {
 497                         swqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 498                                              (parms.act_nr_send_sges)]);
 499                         rwqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 500                                              (parms.act_nr_recv_sges)]);
 501                 } else { /* for LLQP we need to use msg size, not wqe size */
 502                         swqe_size = da_rc_msg_size[max_send_sge];
 503                         rwqe_size = da_rc_msg_size[max_recv_sge];
 504                         parms.act_nr_send_sges = 1;
 505                         parms.act_nr_recv_sges = 1;
 506                 }
 507                 break;
 508         case IB_QPT_UC:
 509                 swqe_size = offsetof(struct ehca_wqe,
 510                                      u.nud.sg_list[parms.act_nr_send_sges]);
 511                 rwqe_size = offsetof(struct ehca_wqe,
 512                                      u.nud.sg_list[parms.act_nr_recv_sges]);
 513                 break;
 514
 515         case IB_QPT_UD:
 516         case IB_QPT_GSI:
 517         case IB_QPT_SMI:
 518                 /* UD circumvention */
 519                 parms.act_nr_recv_sges -= 2;
 520                 parms.act_nr_send_sges -= 2;
 521                 if (is_llqp) {
 522                         swqe_size = da_ud_sq_msg_size[max_send_sge];
 523                         rwqe_size = da_rc_msg_size[max_recv_sge];
 524                         parms.act_nr_send_sges = 1;
 525                         parms.act_nr_recv_sges = 1;
 526                 } else {
 527                         swqe_size = offsetof(struct ehca_wqe,
 528                                              u.ud_av.sg_list[parms.act_nr_send_sges]);
 529                         rwqe_size = offsetof(struct ehca_wqe,
 530                                              u.ud_av.sg_list[parms.act_nr_recv_sges]);
 531                 }
 532
 533                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 534                         parms.act_nr_send_wqes = init_attr->cap.max_send_wr;
 535                         parms.act_nr_recv_wqes = init_attr->cap.max_recv_wr;
 536                         parms.act_nr_send_sges = init_attr->cap.max_send_sge;
 537                         parms.act_nr_recv_sges = init_attr->cap.max_recv_sge;
 538                         my_qp->ib_qp.qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 539                 }
 540
 541                 break;
 542
 543         default:
 544                 break;
 545         }
 546
 547         /* initialize r/squeue and register queue pages */
 548         ret = init_qp_queue(shca, my_qp, &my_qp->ipz_squeue, 0,
 549                             has_srq ? H_SUCCESS : H_PAGE_REGISTERED,
 550                             parms.nr_sq_pages, swqe_size,
 551                             parms.act_nr_send_sges);
 552         if (ret) {
 553                 ehca_err(pd->device,
 554                          "Couldn't initialize squeue and pages ret=%x", ret);
 555                 goto create_qp_exit2;
 556         }
 557
 558         ret = init_qp_queue(shca, my_qp, &my_qp->ipz_rqueue, 1, H_SUCCESS,
 559                             parms.nr_rq_pages, rwqe_size,
 560                             parms.act_nr_recv_sges);
 561         if (ret) {
 562                 ehca_err(pd->device,
 563                          "Couldn't initialize rqueue and pages ret=%x", ret);
 564                 goto create_qp_exit3;
 565         }
 566
 567         my_qp->ib_qp.pd = &my_pd->ib_pd;
 568         my_qp->ib_qp.device = my_pd->ib_pd.device;
 569
 570         my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 571         my_qp->ib_qp.send_cq = init_attr->send_cq;
 572
 573         my_qp->ib_qp.qp_type = my_qp->qp_type = qp_type;
 574         my_qp->ib_qp.srq = init_attr->srq;
 575
 576         my_qp->ib_qp.qp_context = init_attr->qp_context;
 577         my_qp->ib_qp.event_handler = init_attr->event_handler;
 578
 579         init_attr->cap.max_inline_data = 0; /* not supported yet */
 580         init_attr->cap.max_recv_sge = parms.act_nr_recv_sges;
 581         init_attr->cap.max_recv_wr = parms.act_nr_recv_wqes;
 582         init_attr->cap.max_send_sge = parms.act_nr_send_sges;
 583         init_attr->cap.max_send_wr = parms.act_nr_send_wqes;
 584         my_qp->init_attr = *init_attr;
 585
 586         /* NOTE: define_apq0() not supported yet */
 587         if (qp_type == IB_QPT_GSI) {
 588                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 589                 if (h_ret != H_SUCCESS) {
 590                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
 591                                  h_ret);
 592                         ret = ehca2ib_return_code(h_ret);
 593                         goto create_qp_exit4;
 594                 }
 595         }
 596         if (init_attr->send_cq) {
 597                 struct ehca_cq *cq = container_of(init_attr->send_cq,
 598                                                   struct ehca_cq, ib_cq);
 599                 ret = ehca_cq_assign_qp(cq, my_qp);
 600                 if (ret) {
 601                         ehca_err(pd->device, "Couldn't assign qp to send_cq ret=%x",
 602                                  ret);
 603                         goto create_qp_exit4;
 604                 }
 605                 my_qp->send_cq = cq;
 606         }
 607         /* copy queues, galpa data to user space */
 608         if (context && udata) {
 609                 struct ipz_queue *ipz_rqueue = &my_qp->ipz_rqueue;
 610                 struct ipz_queue *ipz_squeue = &my_qp->ipz_squeue;
 611                 struct ehca_create_qp_resp resp;
 612                 memset(&resp, 0, sizeof(resp));
 613
 614                 resp.qp_num = my_qp->real_qp_num;
 615                 resp.token = my_qp->token;
 616                 resp.qp_type = my_qp->qp_type;
 617                 resp.qkey = my_qp->qkey;
 618                 resp.real_qp_num = my_qp->real_qp_num;
 619                 /* rqueue properties */
 620                 resp.ipz_rqueue.qe_size = ipz_rqueue->qe_size;
 621                 resp.ipz_rqueue.act_nr_of_sg = ipz_rqueue->act_nr_of_sg;
 622                 resp.ipz_rqueue.queue_length = ipz_rqueue->queue_length;
 623                 resp.ipz_rqueue.pagesize = ipz_rqueue->pagesize;
 624                 resp.ipz_rqueue.toggle_state = ipz_rqueue->toggle_state;
 625                 /* squeue properties */
 626                 resp.ipz_squeue.qe_size = ipz_squeue->qe_size;
 627                 resp.ipz_squeue.act_nr_of_sg = ipz_squeue->act_nr_of_sg;
 628                 resp.ipz_squeue.queue_length = ipz_squeue->queue_length;
 629                 resp.ipz_squeue.pagesize = ipz_squeue->pagesize;
 630                 resp.ipz_squeue.toggle_state = ipz_squeue->toggle_state;
 631                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 632                         ehca_err(pd->device, "Copy to udata failed");
 633                         ret = -EINVAL;
 634                         goto create_qp_exit4;
 635                 }
 636         }
 637
 638         return &my_qp->ib_qp;
 639
 640 create_qp_exit4:
 641         ipz_queue_dtor(&my_qp->ipz_rqueue);
 642
 643 create_qp_exit3:
 644         ipz_queue_dtor(&my_qp->ipz_squeue);
 645
 646 create_qp_exit2:
 647         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 648
 649 create_qp_exit1:
 650         spin_lock_irqsave(&ehca_qp_idr_lock, flags);
 651         idr_remove(&ehca_qp_idr, my_qp->token);
 652         spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 653
 654 create_qp_exit0:
 655         kmem_cache_free(qp_cache, my_qp);
 656         return ERR_PTR(ret);
 657 }
 658
 659 /*
 660  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 661  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 662  * returns total number of bad wqes in bad_wqe_cnt
 663  */
 664 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 665                            int *bad_wqe_cnt)
 666 {
 667         u64 h_ret;
 668         struct ipz_queue *squeue;
 669         void *bad_send_wqe_p, *bad_send_wqe_v;
 670         u64 q_ofs;
 671         struct ehca_wqe *wqe;
 672         int qp_num = my_qp->ib_qp.qp_num;
 673
 674         /* get send wqe pointer */
 675         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 676                                            my_qp->ipz_qp_handle, &my_qp->pf,
 677                                            &bad_send_wqe_p, NULL, 2);
 678         if (h_ret != H_SUCCESS) {
 679                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 680                          " ehca_qp=%p qp_num=%x h_ret=%lx",
 681                          my_qp, qp_num, h_ret);
 682                 return ehca2ib_return_code(h_ret);
 683         }
 684         bad_send_wqe_p = (void*)((u64)bad_send_wqe_p & (~(1L<<63)));
 685         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 686                  qp_num, bad_send_wqe_p);
 687         /* convert wqe pointer to vadr */
 688         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 689         if (ehca_debug_level)
 690                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 691         squeue = &my_qp->ipz_squeue;
 692         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 693                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 694                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 695                 return -EFAULT;
 696         }
 697
 698         /* loop sets wqe's purge bit */
 699         wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs);
 700         *bad_wqe_cnt = 0;
 701         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 702                 if (ehca_debug_level)
 703                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 704                 wqe->nr_of_data_seg = 0; /* suppress data access */
 705                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 706                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 707                 wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs);
 708                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 709         }
 710         /*
 711          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 712          *  i.e. nr of wqes with flush error status is one less
 713          */
 714         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 715                  qp_num, (*bad_wqe_cnt)-1);
 716         wqe->wqef = 0;
 717
 718         return 0;
 719 }
 720
 721 /*
 722  * internal_modify_qp with circumvention to handle aqp0 properly
 723  * smi_reset2init indicates if this is an internal reset-to-init-call for
 724  * smi. This flag must always be zero if called from ehca_modify_qp()!
 725  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 726  */
 727 static int internal_modify_qp(struct ib_qp *ibqp,
 728                               struct ib_qp_attr *attr,
 729                               int attr_mask, int smi_reset2init)
 730 {
 731         enum ib_qp_state qp_cur_state, qp_new_state;
 732         int cnt, qp_attr_idx, ret = 0;
 733         enum ib_qp_statetrans statetrans;
 734         struct hcp_modify_qp_control_block *mqpcb;
 735         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 736         struct ehca_shca *shca =
 737                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 738         u64 update_mask;
 739         u64 h_ret;
 740         int bad_wqe_cnt = 0;
 741         int squeue_locked = 0;
 742         unsigned long spl_flags = 0;
 743
 744         /* do query_qp to obtain current attr values */
 745         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 746         if (!mqpcb) {
 747                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 748                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 749                 return -ENOMEM;
 750         }
 751
 752         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 753                                 my_qp->ipz_qp_handle,
 754                                 &my_qp->pf,
 755                                 mqpcb, my_qp->galpas.kernel);
 756         if (h_ret != H_SUCCESS) {
 757                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
 758                          "ehca_qp=%p qp_num=%x h_ret=%lx",
 759                          my_qp, ibqp->qp_num, h_ret);
 760                 ret = ehca2ib_return_code(h_ret);
 761                 goto modify_qp_exit1;
 762         }
 763
 764         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
 765
 766         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
 767                 ret = -EINVAL;
 768                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
 769                          "ehca_qp=%p qp_num=%x",
 770                          mqpcb->qp_state, my_qp, ibqp->qp_num);
 771                 goto modify_qp_exit1;
 772         }
 773         /*
 774          * circumvention to set aqp0 initial state to init
 775          * as expected by IB spec
 776          */
 777         if (smi_reset2init == 0 &&
 778             ibqp->qp_type == IB_QPT_SMI &&
 779             qp_cur_state == IB_QPS_RESET &&
 780             (attr_mask & IB_QP_STATE) &&
 781             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
 782                 struct ib_qp_attr smiqp_attr = {
 783                         .qp_state = IB_QPS_INIT,
 784                         .port_num = my_qp->init_attr.port_num,
 785                         .pkey_index = 0,
 786                         .qkey = 0
 787                 };
 788                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
 789                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
 790                 int smirc = internal_modify_qp(
 791                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
 792                 if (smirc) {
 793                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
 794                                  "ehca_modify_qp() rc=%x", smirc);
 795                         ret = H_PARAMETER;
 796                         goto modify_qp_exit1;
 797                 }
 798                 qp_cur_state = IB_QPS_INIT;
 799                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
 800         }
 801         /* is transmitted current state  equal to "real" current state */
 802         if ((attr_mask & IB_QP_CUR_STATE) &&
 803             qp_cur_state != attr->cur_qp_state) {
 804                 ret = -EINVAL;
 805                 ehca_err(ibqp->device,
 806                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
 807                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
 808                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
 809                 goto modify_qp_exit1;
 810         }
 811
 812         ehca_dbg(ibqp->device,"ehca_qp=%p qp_num=%x current qp_state=%x "
 813                  "new qp_state=%x attribute_mask=%x",
 814                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
 815
 816         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
 817         if (!smi_reset2init &&
 818             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
 819                                 attr_mask)) {
 820                 ret = -EINVAL;
 821                 ehca_err(ibqp->device,
 822                          "Invalid qp transition new_state=%x cur_state=%x "
 823                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
 824                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
 825                 goto modify_qp_exit1;
 826         }
 827
 828         if ((mqpcb->qp_state = ib2ehca_qp_state(qp_new_state)))
 829                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 830         else {
 831                 ret = -EINVAL;
 832                 ehca_err(ibqp->device, "Invalid new qp state=%x "
 833                          "ehca_qp=%p qp_num=%x",
 834                          qp_new_state, my_qp, ibqp->qp_num);
 835                 goto modify_qp_exit1;
 836         }
 837
 838         /* retrieve state transition struct to get req and opt attrs */
 839         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
 840         if (statetrans < 0) {
 841                 ret = -EINVAL;
 842                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
 843                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
 844                          "qp_num=%x", qp_cur_state, qp_new_state,
 845                          statetrans, my_qp, ibqp->qp_num);
 846                 goto modify_qp_exit1;
 847         }
 848
 849         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
 850
 851         if (qp_attr_idx < 0) {
 852                 ret = qp_attr_idx;
 853                 ehca_err(ibqp->device,
 854                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
 855                          ibqp->qp_type, my_qp, ibqp->qp_num);
 856                 goto modify_qp_exit1;
 857         }
 858
 859         ehca_dbg(ibqp->device,
 860                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
 861                  my_qp, ibqp->qp_num, statetrans);
 862
 863         /* sqe -> rts: set purge bit of bad wqe before actual trans */
 864         if ((my_qp->qp_type == IB_QPT_UD ||
 865              my_qp->qp_type == IB_QPT_GSI ||
 866              my_qp->qp_type == IB_QPT_SMI) &&
 867             statetrans == IB_QPST_SQE2RTS) {
 868                 /* mark next free wqe if kernel */
 869                 if (!ibqp->uobject) {
 870                         struct ehca_wqe *wqe;
 871                         /* lock send queue */
 872                         spin_lock_irqsave(&my_qp->spinlock_s, spl_flags);
 873                         squeue_locked = 1;
 874                         /* mark next free wqe */
 875                         wqe = (struct ehca_wqe*)
 876                                 ipz_qeit_get(&my_qp->ipz_squeue);
 877                         wqe->optype = wqe->wqef = 0xff;
 878                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
 879                                  ibqp->qp_num, wqe);
 880                 }
 881                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
 882                 if (ret) {
 883                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
 884                                  "ehca_qp=%p qp_num=%x ret=%x",
 885                                  my_qp, ibqp->qp_num, ret);
 886                         goto modify_qp_exit2;
 887                 }
 888         }
 889
 890         /*
 891          * enable RDMA_Atomic_Control if reset->init und reliable con
 892          * this is necessary since gen2 does not provide that flag,
 893          * but pHyp requires it
 894          */
 895         if (statetrans == IB_QPST_RESET2INIT &&
 896             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
 897                 mqpcb->rdma_atomic_ctrl = 3;
 898                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
 899         }
 900         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
 901         if (statetrans == IB_QPST_INIT2RTR &&
 902             (ibqp->qp_type == IB_QPT_UC) &&
 903             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
 904                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
 905                 update_mask |=
 906                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
 907         }
 908
 909         if (attr_mask & IB_QP_PKEY_INDEX) {
 910                 mqpcb->prim_p_key_idx = attr->pkey_index;
 911                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
 912         }
 913         if (attr_mask & IB_QP_PORT) {
 914                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
 915                         ret = -EINVAL;
 916                         ehca_err(ibqp->device, "Invalid port=%x. "
 917                                  "ehca_qp=%p qp_num=%x num_ports=%x",
 918                                  attr->port_num, my_qp, ibqp->qp_num,
 919                                  shca->num_ports);
 920                         goto modify_qp_exit2;
 921                 }
 922                 mqpcb->prim_phys_port = attr->port_num;
 923                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
 924         }
 925         if (attr_mask & IB_QP_QKEY) {
 926                 mqpcb->qkey = attr->qkey;
 927                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
 928         }
 929         if (attr_mask & IB_QP_AV) {
 930                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
 931                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
 932                                                 init_attr.port_num].rate);
 933
 934                 mqpcb->dlid = attr->ah_attr.dlid;
 935                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
 936                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
 937                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
 938                 mqpcb->service_level = attr->ah_attr.sl;
 939                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
 940
 941                 if (ah_mult < ehca_mult)
 942                         mqpcb->max_static_rate = (ah_mult > 0) ?
 943                         ((ehca_mult - 1) / ah_mult) : 0;
 944                 else
 945                         mqpcb->max_static_rate = 0;
 946                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
 947
 948                 /*
 949                  * Always supply the GRH flag, even if it's zero, to give the
 950                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
 951                  */
 952                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
 953
 954                 /*
 955                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
 956                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
 957                  */
 958                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
 959                         mqpcb->send_grh_flag = 1;
 960
 961                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
 962                         update_mask |=
 963                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
 964
 965                         for (cnt = 0; cnt < 16; cnt++)
 966                                 mqpcb->dest_gid.byte[cnt] =
 967                                         attr->ah_attr.grh.dgid.raw[cnt];
 968
 969                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
 970                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
 971                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
 972                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
 973                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
 974                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
 975                         update_mask |=
 976                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
 977                 }
 978         }
 979
 980         if (attr_mask & IB_QP_PATH_MTU) {
 981                 mqpcb->path_mtu = attr->path_mtu;
 982                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
 983         }
 984         if (attr_mask & IB_QP_TIMEOUT) {
 985                 mqpcb->timeout = attr->timeout;
 986                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
 987         }
 988         if (attr_mask & IB_QP_RETRY_CNT) {
 989                 mqpcb->retry_count = attr->retry_cnt;
 990                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
 991         }
 992         if (attr_mask & IB_QP_RNR_RETRY) {
 993                 mqpcb->rnr_retry_count = attr->rnr_retry;
 994                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
 995         }
 996         if (attr_mask & IB_QP_RQ_PSN) {
 997                 mqpcb->receive_psn = attr->rq_psn;
 998                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
 999         }
1000         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1001                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1002                         attr->max_dest_rd_atomic : 2;
1003                 update_mask |=
1004                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1005         }
1006         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1007                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1008                         attr->max_rd_atomic : 2;
1009                 update_mask |=
1010                         EHCA_BMASK_SET
1011                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1012         }
1013         if (attr_mask & IB_QP_ALT_PATH) {
1014                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1015                 int ehca_mult = ib_rate_to_mult(
1016                         shca->sport[my_qp->init_attr.port_num].rate);
1017
1018                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1019                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1020                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1021                 update_mask |=
1022                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1023                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1024                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1025
1026                 if (ah_mult < ehca_mult)
1027                         mqpcb->max_static_rate = (ah_mult > 0) ?
1028                         ((ehca_mult - 1) / ah_mult) : 0;
1029                 else
1030                         mqpcb->max_static_rate_al = 0;
1031
1032                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1033
1034                 /*
1035                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1036                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1037                  */
1038                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1039                         mqpcb->send_grh_flag_al = 1 << 31;
1040                         update_mask |=
1041                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1042                         mqpcb->source_gid_idx_al =
1043                                 attr->alt_ah_attr.grh.sgid_index;
1044                         update_mask |=
1045                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1046
1047                         for (cnt = 0; cnt < 16; cnt++)
1048                                 mqpcb->dest_gid_al.byte[cnt] =
1049                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1050
1051                         update_mask |=
1052                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1053                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1054                         update_mask |=
1055                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1056                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1057                         update_mask |=
1058                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1059                         mqpcb->traffic_class_al =
1060                                 attr->alt_ah_attr.grh.traffic_class;
1061                         update_mask |=
1062                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1063                 }
1064         }
1065
1066         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1067                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1068                 update_mask |=
1069                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1070         }
1071
1072         if (attr_mask & IB_QP_SQ_PSN) {
1073                 mqpcb->send_psn = attr->sq_psn;
1074                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1075         }
1076
1077         if (attr_mask & IB_QP_DEST_QPN) {
1078                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1079                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1080         }
1081
1082         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1083                 mqpcb->path_migration_state = attr->path_mig_state;
1084                 update_mask |=
1085                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1086         }
1087
1088         if (attr_mask & IB_QP_CAP) {
1089                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1090                 update_mask |=
1091                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1092                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1093                 update_mask |=
1094                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1095                 /* no support for max_send/recv_sge yet */
1096         }
1097
1098         if (ehca_debug_level)
1099                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1100
1101         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1102                                  my_qp->ipz_qp_handle,
1103                                  &my_qp->pf,
1104                                  update_mask,
1105                                  mqpcb, my_qp->galpas.kernel);
1106
1107         if (h_ret != H_SUCCESS) {
1108                 ret = ehca2ib_return_code(h_ret);
1109                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1110                          "ehca_qp=%p qp_num=%x",h_ret, my_qp, ibqp->qp_num);
1111                 goto modify_qp_exit2;
1112         }
1113
1114         if ((my_qp->qp_type == IB_QPT_UD ||
1115              my_qp->qp_type == IB_QPT_GSI ||
1116              my_qp->qp_type == IB_QPT_SMI) &&
1117             statetrans == IB_QPST_SQE2RTS) {
1118                 /* doorbell to reprocessing wqes */
1119                 iosync(); /* serialize GAL register access */
1120                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1121                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1122         }
1123
1124         if (statetrans == IB_QPST_RESET2INIT ||
1125             statetrans == IB_QPST_INIT2INIT) {
1126                 mqpcb->qp_enable = 1;
1127                 mqpcb->qp_state = EHCA_QPS_INIT;
1128                 update_mask = 0;
1129                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1130
1131                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1132                                          my_qp->ipz_qp_handle,
1133                                          &my_qp->pf,
1134                                          update_mask,
1135                                          mqpcb,
1136                                          my_qp->galpas.kernel);
1137
1138                 if (h_ret != H_SUCCESS) {
1139                         ret = ehca2ib_return_code(h_ret);
1140                         ehca_err(ibqp->device, "ENABLE in context of "
1141                                  "RESET_2_INIT failed! Maybe you didn't get "
1142                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1143                                  h_ret, my_qp, ibqp->qp_num);
1144                         goto modify_qp_exit2;
1145                 }
1146         }
1147
1148         if (statetrans == IB_QPST_ANY2RESET) {
1149                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1150                 ipz_qeit_reset(&my_qp->ipz_squeue);
1151         }
1152
1153         if (attr_mask & IB_QP_QKEY)
1154                 my_qp->qkey = attr->qkey;
1155
1156 modify_qp_exit2:
1157         if (squeue_locked) { /* this means: sqe -> rts */
1158                 spin_unlock_irqrestore(&my_qp->spinlock_s, spl_flags);
1159                 my_qp->sqerr_purgeflag = 1;
1160         }
1161
1162 modify_qp_exit1:
1163         ehca_free_fw_ctrlblock(mqpcb);
1164
1165         return ret;
1166 }
1167
1168 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1169                    struct ib_udata *udata)
1170 {
1171         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1172         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1173                                              ib_pd);
1174         u32 cur_pid = current->tgid;
1175
1176         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1177             my_pd->ownpid != cur_pid) {
1178                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1179                          cur_pid, my_pd->ownpid);
1180                 return -EINVAL;
1181         }
1182
1183         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1184 }
1185
1186 int ehca_query_qp(struct ib_qp *qp,
1187                   struct ib_qp_attr *qp_attr,
1188                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1189 {
1190         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1191         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1192                                              ib_pd);
1193         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1194                                               ib_device);
1195         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1196         struct hcp_modify_qp_control_block *qpcb;
1197         u32 cur_pid = current->tgid;
1198         int cnt, ret = 0;
1199         u64 h_ret;
1200
1201         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1202             my_pd->ownpid != cur_pid) {
1203                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1204                          cur_pid, my_pd->ownpid);
1205                 return -EINVAL;
1206         }
1207
1208         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1209                 ehca_err(qp->device,"Invalid attribute mask "
1210                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1211                          my_qp, qp->qp_num, qp_attr_mask);
1212                 return -EINVAL;
1213         }
1214
1215         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1216         if (!qpcb) {
1217                 ehca_err(qp->device,"Out of memory for qpcb "
1218                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1219                 return -ENOMEM;
1220         }
1221
1222         h_ret = hipz_h_query_qp(adapter_handle,
1223                                 my_qp->ipz_qp_handle,
1224                                 &my_qp->pf,
1225                                 qpcb, my_qp->galpas.kernel);
1226
1227         if (h_ret != H_SUCCESS) {
1228                 ret = ehca2ib_return_code(h_ret);
1229                 ehca_err(qp->device,"hipz_h_query_qp() failed "
1230                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1231                          my_qp, qp->qp_num, h_ret);
1232                 goto query_qp_exit1;
1233         }
1234
1235         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1236         qp_attr->qp_state = qp_attr->cur_qp_state;
1237
1238         if (qp_attr->cur_qp_state == -EINVAL) {
1239                 ret = -EINVAL;
1240                 ehca_err(qp->device,"Got invalid ehca_qp_state=%x "
1241                          "ehca_qp=%p qp_num=%x",
1242                          qpcb->qp_state, my_qp, qp->qp_num);
1243                 goto query_qp_exit1;
1244         }
1245
1246         if (qp_attr->qp_state == IB_QPS_SQD)
1247                 qp_attr->sq_draining = 1;
1248
1249         qp_attr->qkey = qpcb->qkey;
1250         qp_attr->path_mtu = qpcb->path_mtu;
1251         qp_attr->path_mig_state = qpcb->path_migration_state;
1252         qp_attr->rq_psn = qpcb->receive_psn;
1253         qp_attr->sq_psn = qpcb->send_psn;
1254         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1255         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1256         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1257         /* UD_AV CIRCUMVENTION */
1258         if (my_qp->qp_type == IB_QPT_UD) {
1259                 qp_attr->cap.max_send_sge =
1260                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1261                 qp_attr->cap.max_recv_sge =
1262                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1263         } else {
1264                 qp_attr->cap.max_send_sge =
1265                         qpcb->actual_nr_sges_in_sq_wqe;
1266                 qp_attr->cap.max_recv_sge =
1267                         qpcb->actual_nr_sges_in_rq_wqe;
1268         }
1269
1270         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1271         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1272
1273         qp_attr->pkey_index =
1274                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1275
1276         qp_attr->port_num =
1277                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1278
1279         qp_attr->timeout = qpcb->timeout;
1280         qp_attr->retry_cnt = qpcb->retry_count;
1281         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1282
1283         qp_attr->alt_pkey_index =
1284                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1285
1286         qp_attr->alt_port_num = qpcb->alt_phys_port;
1287         qp_attr->alt_timeout = qpcb->timeout_al;
1288
1289         /* primary av */
1290         qp_attr->ah_attr.sl = qpcb->service_level;
1291
1292         if (qpcb->send_grh_flag) {
1293                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1294         }
1295
1296         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1297         qp_attr->ah_attr.dlid = qpcb->dlid;
1298         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1299         qp_attr->ah_attr.port_num = qp_attr->port_num;
1300
1301         /* primary GRH */
1302         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1303         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1304         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1305         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1306
1307         for (cnt = 0; cnt < 16; cnt++)
1308                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1309                         qpcb->dest_gid.byte[cnt];
1310
1311         /* alternate AV */
1312         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1313         if (qpcb->send_grh_flag_al) {
1314                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1315         }
1316
1317         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1318         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1319         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1320
1321         /* alternate GRH */
1322         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1323         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1324         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1325         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1326
1327         for (cnt = 0; cnt < 16; cnt++)
1328                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1329                         qpcb->dest_gid_al.byte[cnt];
1330
1331         /* return init attributes given in ehca_create_qp */
1332         if (qp_init_attr)
1333                 *qp_init_attr = my_qp->init_attr;
1334
1335         if (ehca_debug_level)
1336                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1337
1338 query_qp_exit1:
1339         ehca_free_fw_ctrlblock(qpcb);
1340
1341         return ret;
1342 }
1343
1344 int ehca_destroy_qp(struct ib_qp *ibqp)
1345 {
1346         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1347         struct ehca_shca *shca = container_of(ibqp->device, struct ehca_shca,
1348                                               ib_device);
1349         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1350                                              ib_pd);
1351         u32 cur_pid = current->tgid;
1352         u32 qp_num = ibqp->qp_num;
1353         int ret;
1354         u64 h_ret;
1355         u8 port_num;
1356         enum ib_qp_type qp_type;
1357         unsigned long flags;
1358
1359         if (ibqp->uobject) {
1360                 if (my_qp->mm_count_galpa ||
1361                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1362                         ehca_err(ibqp->device, "Resources still referenced in "
1363                                  "user space qp_num=%x", ibqp->qp_num);
1364                         return -EINVAL;
1365                 }
1366                 if (my_pd->ownpid != cur_pid) {
1367                         ehca_err(ibqp->device, "Invalid caller pid=%x ownpid=%x",
1368                                  cur_pid, my_pd->ownpid);
1369                         return -EINVAL;
1370                 }
1371         }
1372
1373         if (my_qp->send_cq) {
1374                 ret = ehca_cq_unassign_qp(my_qp->send_cq,
1375                                               my_qp->real_qp_num);
1376                 if (ret) {
1377                         ehca_err(ibqp->device, "Couldn't unassign qp from "
1378                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1379                                  my_qp->ib_qp.qp_num, my_qp->send_cq->cq_number);
1380                         return ret;
1381                 }
1382         }
1383
1384         spin_lock_irqsave(&ehca_qp_idr_lock, flags);
1385         idr_remove(&ehca_qp_idr, my_qp->token);
1386         spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1387
1388         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1389         if (h_ret != H_SUCCESS) {
1390                 ehca_err(ibqp->device, "hipz_h_destroy_qp() failed rc=%lx "
1391                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1392                 return ehca2ib_return_code(h_ret);
1393         }
1394
1395         port_num = my_qp->init_attr.port_num;
1396         qp_type  = my_qp->init_attr.qp_type;
1397
1398         /* no support for IB_QPT_SMI yet */
1399         if (qp_type == IB_QPT_GSI) {
1400                 struct ib_event event;
1401                 ehca_info(ibqp->device, "device %s: port %x is inactive.",
1402                           shca->ib_device.name, port_num);
1403                 event.device = &shca->ib_device;
1404                 event.event = IB_EVENT_PORT_ERR;
1405                 event.element.port_num = port_num;
1406                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1407                 ib_dispatch_event(&event);
1408         }
1409
1410         ipz_queue_dtor(&my_qp->ipz_rqueue);
1411         ipz_queue_dtor(&my_qp->ipz_squeue);
1412         kmem_cache_free(qp_cache, my_qp);
1413         return 0;
1414 }
1415
1416 int ehca_init_qp_cache(void)
1417 {
1418         qp_cache = kmem_cache_create("ehca_cache_qp",
1419                                      sizeof(struct ehca_qp), 0,
1420                                      SLAB_HWCACHE_ALIGN,
1421                                      NULL, NULL);
1422         if (!qp_cache)
1423                 return -ENOMEM;
1424         return 0;
1425 }
1426
1427 void ehca_cleanup_qp_cache(void)
1428 {
1429         if (qp_cache)
1430                 kmem_cache_destroy(qp_cache);
1431 }