2 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (c) 1995-1998 Mark Lord
5 * May be copied or modified under the terms of the GNU General Public License
8 #include <linux/module.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/init.h>
13 #include <linux/timer.h>
15 #include <linux/interrupt.h>
16 #include <linux/ide.h>
17 #include <linux/dma-mapping.h>
24 * ide_match_hwif - match a PCI IDE against an ide_hwif
25 * @io_base: I/O base of device
26 * @bootable: set if its bootable
27 * @name: name of device
29 * Match a PCI IDE port against an entry in ide_hwifs[],
30 * based on io_base port if possible. Return the matching hwif,
31 * or a new hwif. If we find an error (clashing, out of devices, etc)
34 * FIXME: we need to handle mmio matches here too
37 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
43 * Look for a hwif with matching io_base specified using
44 * parameters to ide_setup().
46 for (h = 0; h < MAX_HWIFS; ++h) {
48 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
49 if (hwif->chipset == ide_forced)
50 return hwif; /* a perfect match */
54 * Look for a hwif with matching io_base default value.
55 * If chipset is "ide_unknown", then claim that hwif slot.
56 * Otherwise, some other chipset has already claimed it.. :(
58 for (h = 0; h < MAX_HWIFS; ++h) {
60 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
61 if (hwif->chipset == ide_unknown)
62 return hwif; /* match */
63 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
64 name, io_base, hwif->name);
65 return NULL; /* already claimed */
69 * Okay, there is no hwif matching our io_base,
70 * so we'll just claim an unassigned slot.
71 * Give preference to claiming other slots before claiming ide0/ide1,
72 * just in case there's another interface yet-to-be-scanned
73 * which uses ports 1f0/170 (the ide0/ide1 defaults).
75 * Unless there is a bootable card that does not use the standard
76 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
79 for (h = 0; h < MAX_HWIFS; ++h) {
81 if (hwif->chipset == ide_unknown)
82 return hwif; /* pick an unused entry */
85 for (h = 2; h < MAX_HWIFS; ++h) {
87 if (hwif->chipset == ide_unknown)
88 return hwif; /* pick an unused entry */
91 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
93 if (hwif->chipset == ide_unknown)
94 return hwif; /* pick an unused entry */
96 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
101 * ide_setup_pci_baseregs - place a PCI IDE controller native
102 * @dev: PCI device of interface to switch native
103 * @name: Name of interface
105 * We attempt to place the PCI interface into PCI native mode. If
106 * we succeed the BARs are ok and the controller is in PCI mode.
107 * Returns 0 on success or an errno code.
109 * FIXME: if we program the interface and then fail to set the BARS
110 * we don't switch it back to legacy mode. Do we actually care ??
113 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
118 * Place both IDE interfaces into PCI "native" mode:
120 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
122 if ((progif & 0xa) != 0xa) {
123 printk(KERN_INFO "%s: device not capable of full "
124 "native PCI mode\n", name);
127 printk("%s: placing both ports into native PCI mode\n", name);
128 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
129 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
131 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
132 "0x%04x, got 0x%04x\n",
133 name, progif|5, progif);
140 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
141 static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
143 u8 dma_stat = inb(dma_base + 2);
145 outb(dma_stat & 0x60, dma_base + 2);
146 dma_stat = inb(dma_base + 2);
148 printk(KERN_INFO "%s: simplex device: DMA forced\n", name);
152 * ide_get_or_set_dma_base - setup BMIBA
154 * @hwif: IDE interface
156 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
157 * Where a device has a partner that is already in DMA mode we check
158 * and enforce IDE simplex rules.
161 static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
163 struct pci_dev *dev = to_pci_dev(hwif->dev);
164 unsigned long dma_base = 0;
168 return hwif->dma_base;
170 if (hwif->mate && hwif->mate->dma_base) {
171 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
173 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
175 dma_base = pci_resource_start(dev, baridx);
178 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
186 if (d->host_flags & IDE_HFLAG_CS5520)
189 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
190 ide_pci_clear_simplex(dma_base, d->name);
195 * If the device claims "simplex" DMA, this means that only one of
196 * the two interfaces can be trusted with DMA at any point in time
197 * (so we should enable DMA only on one of the two interfaces).
199 * FIXME: At this point we haven't probed the drives so we can't make
200 * the appropriate decision. Really we should defer this problem until
201 * we tune the drive then try to grab DMA ownership if we want to be
202 * the DMA end. This has to be become dynamic to handle hot-plug.
204 dma_stat = hwif->INB(dma_base + 2);
205 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
206 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name);
212 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
214 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
216 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
217 " PCI slot %s\n", d->name, dev->vendor, dev->device,
218 dev->revision, pci_name(dev));
221 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
225 * ide_pci_enable - do PCI enables
229 * Enable the IDE PCI device. We attempt to enable the device in full
230 * but if that fails then we only need BAR4 so we will enable that.
232 * Returns zero on success or an error code
235 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
239 if (pci_enable_device(dev)) {
240 ret = pci_enable_device_bars(dev, 1 << 4);
242 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
243 "Could not enable device.\n", d->name);
246 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
250 * assume all devices can do 32-bit DMA for now, we can add
251 * a DMA mask field to the struct ide_port_info if we need it
252 * (or let lower level driver set the DMA mask)
254 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
256 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
260 /* FIXME: Temporary - until we put in the hotplug interface logic
261 Check that the bits we want are not in use by someone else. */
262 ret = pci_request_region(dev, 4, "ide_tmp");
266 pci_release_region(dev, 4);
272 * ide_pci_configure - configure an unconfigured device
276 * Enable and configure the PCI device we have been passed.
277 * Returns zero on success or an error code.
280 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
284 * PnP BIOS was *supposed* to have setup this device, but we
285 * can do it ourselves, so long as the BIOS has assigned an IRQ
286 * (or possibly the device is using a "legacy header" for IRQs).
287 * Maybe the user deliberately *disabled* the device,
288 * but we'll eventually ignore it again if no drives respond.
290 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
292 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
295 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
296 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
299 if (!(pcicmd & PCI_COMMAND_IO)) {
300 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
307 * ide_pci_check_iomem - check a register is I/O
312 * Checks if a BAR is configured and points to MMIO space. If so
313 * print an error and return an error code. Otherwise return 0
316 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
318 ulong flags = pci_resource_flags(dev, bar);
321 if (!flags || pci_resource_len(dev, bar) == 0)
325 if(flags & PCI_BASE_ADDRESS_IO_MASK)
329 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
331 "<andre@linux-ide.org>.\n", d->name);
336 * ide_hwif_configure - configure an IDE interface
337 * @dev: PCI device holding interface
339 * @mate: Paired interface if any
341 * Perform the initial set up for the hardware interface structure. This
342 * is done per interface port rather than per PCI device. There may be
343 * more than one port per device.
345 * Returns the new hardware interface structure, or NULL on a failure
348 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq)
350 unsigned long ctl = 0, base = 0;
352 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
356 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
357 /* Possibly we should fail if these checks report true */
358 ide_pci_check_iomem(dev, d, 2*port);
359 ide_pci_check_iomem(dev, d, 2*port+1);
361 ctl = pci_resource_start(dev, 2*port+1);
362 base = pci_resource_start(dev, 2*port);
363 if ((ctl && !base) || (base && !ctl)) {
364 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
365 "for port %d, skipping\n", d->name, port);
371 /* Use default values */
372 ctl = port ? 0x374 : 0x3f4;
373 base = port ? 0x170 : 0x1f0;
375 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
376 return NULL; /* no room in ide_hwifs[] */
378 memset(&hw, 0, sizeof(hw));
379 hw.irq = hwif->irq ? hwif->irq : irq;
381 hw.chipset = d->chipset ? d->chipset : ide_pci;
382 ide_std_init_ports(&hw, base, ctl | 2);
384 if (hwif->io_ports[IDE_DATA_OFFSET] == base &&
385 hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2))
386 oldnoprobe = hwif->noprobe;
388 ide_init_port_hw(hwif, &hw);
390 hwif->noprobe = oldnoprobe;
392 hwif->dev = &dev->dev;
394 hwif->channel = port;
404 * ide_hwif_setup_dma - configure DMA interface
407 * @hwif: IDE interface
409 * Set up the DMA base for the interface. Enable the master bits as
410 * necessary and attempt to bring the device DMA into a ready to use
414 static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif)
416 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
419 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
421 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
422 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
423 (dev->class & 0x80))) {
424 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
425 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
427 * Set up BM-DMA capability
428 * (PnP BIOS should have done this)
431 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
432 printk(KERN_ERR "%s: %s error updating PCICMD\n",
433 hwif->name, d->name);
439 d->init_dma(hwif, dma_base);
441 ide_setup_dma(hwif, dma_base);
444 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
445 "(BIOS)\n", hwif->name, d->name);
448 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
452 * ide_setup_pci_controller - set up IDE PCI
455 * @noisy: verbose flag
456 * @config: returned as 1 if we configured the hardware
458 * Set up the PCI and controller side of the IDE interface. This brings
459 * up the PCI side of the device, checks that the device is enabled
460 * and enables it if need be
463 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
469 ide_setup_pci_noise(dev, d);
471 ret = ide_pci_enable(dev, d);
475 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
477 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
480 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
481 ret = ide_pci_configure(dev, d);
485 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
493 * ide_pci_setup_ports - configure ports/devices on PCI IDE
497 * @idx: ATA index table to update
499 * Scan the interfaces attached to this device and do any
500 * necessary per port setup. Attach the devices and ask the
501 * generic DMA layer to do its work for us.
503 * Normally called automaticall from do_ide_pci_setup_device,
504 * but is also used directly as a helper function by some controllers
505 * where the chipset setup is not the default PCI IDE one.
508 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
510 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
511 ide_hwif_t *hwif, *mate = NULL;
515 * Set up the IDE ports
518 for (port = 0; port < channels; ++port) {
519 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
521 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
522 (tmp & e->mask) != e->val)) {
523 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
524 continue; /* port not enabled */
527 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
530 *(idx + port) = hwif->index;
535 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
536 ide_hwif_setup_dma(dev, d, hwif);
538 if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) ||
539 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
540 hwif->irq = port ? 15 : 14;
542 hwif->host_flags = d->host_flags;
543 hwif->pio_mask = d->pio_mask;
545 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
546 hwif->mate->serialized = hwif->serialized = 1;
548 if (d->host_flags & IDE_HFLAG_IO_32BIT) {
549 hwif->drives[0].io_32bit = 1;
550 hwif->drives[1].io_32bit = 1;
553 if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) {
554 hwif->drives[0].unmask = 1;
555 hwif->drives[1].unmask = 1;
558 if (hwif->dma_base) {
559 hwif->swdma_mask = d->swdma_mask;
560 hwif->mwdma_mask = d->mwdma_mask;
561 hwif->ultra_mask = d->udma_mask;
564 hwif->drives[0].autotune = 1;
565 hwif->drives[1].autotune = 1;
567 if (d->host_flags & IDE_HFLAG_RQSIZE_256)
571 /* Call chipset-specific routine
572 * for each enabled hwif
580 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
583 * ide_setup_pci_device() looks at the primary/secondary interfaces
584 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
585 * for use with them. This generic code works for most PCI chipsets.
587 * One thing that is not standardized is the location of the
588 * primary/secondary interface "enable/disable" bits. For chipsets that
589 * we "know" about, this information is in the struct ide_port_info;
590 * for all other chipsets, we just assume both interfaces are enabled.
592 static int do_ide_setup_pci_device(struct pci_dev *dev,
593 const struct ide_port_info *d,
596 int tried_config = 0;
599 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
604 * Can we trust the reported IRQ?
608 /* Is it an "IDE storage" device in non-PCI mode? */
609 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
611 printk(KERN_INFO "%s: not 100%% native mode: "
612 "will probe irqs later\n", d->name);
614 * This allows offboard ide-pci cards the enable a BIOS,
615 * verify interrupt settings of split-mirror pci-config
616 * space, place chipset into init-mode, and/or preserve
617 * an interrupt if the card is not native ide support.
619 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
623 } else if (tried_config) {
625 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
627 } else if (!pciirq) {
629 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
633 if (d->init_chipset) {
634 ret = d->init_chipset(dev, d->name);
639 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
643 /* FIXME: silent failure can happen */
645 ide_pci_setup_ports(dev, d, pciirq, idx);
650 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
652 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
655 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
663 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
665 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
666 const struct ide_port_info *d)
668 struct pci_dev *pdev[] = { dev1, dev2 };
670 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
672 for (i = 0; i < 2; i++) {
673 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
675 * FIXME: Mom, mom, they stole me the helper function to undo
676 * do_ide_setup_pci_device() on the first device!
687 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);