drivers/ide/ide-generic.c

   1 /*
   2  * generic/default IDE host driver
   3  *
   4  * Copyright (C) 2004, 2008 Bartlomiej Zolnierkiewicz
   5  * This code was split off from ide.c.  See it for original copyrights.
   6  *
   7  * May be copied or modified under the terms of the GNU General Public License.
   8  */
   9
  10 /*
  11  * For special cases new interfaces may be added using sysfs, i.e.
  12  *
  13  *      echo -n "0x168:0x36e:10" > /sys/class/ide_generic/add
  14  *
  15  * will add an interface using I/O ports 0x168-0x16f/0x36e and IRQ 10.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21 #include <linux/ide.h>
  22 #include <linux/pci_ids.h>
  23
  24 /* FIXME: convert m32r to use ide_platform host driver */
  25 #ifdef CONFIG_M32R
  26 #include <asm/m32r.h>
  27 #endif
  28
  29 #define DRV_NAME        "ide_generic"
  30
  31 static int probe_mask;
  32 module_param(probe_mask, int, 0);
  33 MODULE_PARM_DESC(probe_mask, "probe mask for legacy ISA IDE ports");
  34
  35 static const struct ide_port_info ide_generic_port_info = {
  36         .host_flags             = IDE_HFLAG_NO_DMA,
  37 };
  38
  39 static ssize_t store_add(struct class *cls, const char *buf, size_t n)
  40 {
  41         unsigned int base, ctl;
  42         int irq, rc;
  43         hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
  44
  45         if (sscanf(buf, "%x:%x:%d", &base, &ctl, &irq) != 3)
  46                 return -EINVAL;
  47
  48         memset(&hw, 0, sizeof(hw));
  49         ide_std_init_ports(&hw, base, ctl);
  50         hw.irq = irq;
  51         hw.chipset = ide_generic;
  52
  53         rc = ide_host_add(&ide_generic_port_info, hws, NULL);
  54         if (rc)
  55                 return rc;
  56
  57         return n;
  58 };
  59
  60 static struct class_attribute ide_generic_class_attrs[] = {
  61         __ATTR(add, S_IWUSR, NULL, store_add),
  62         __ATTR_NULL
  63 };
  64
  65 static void ide_generic_class_release(struct class *cls)
  66 {
  67         kfree(cls);
  68 }
  69
  70 static int __init ide_generic_sysfs_init(void)
  71 {
  72         struct class *cls;
  73         int rc;
  74
  75         cls = kzalloc(sizeof(*cls), GFP_KERNEL);
  76         if (!cls)
  77                 return -ENOMEM;
  78
  79         cls->name = DRV_NAME;
  80         cls->owner = THIS_MODULE;
  81         cls->class_release = ide_generic_class_release;
  82         cls->class_attrs = ide_generic_class_attrs;
  83
  84         rc = class_register(cls);
  85         if (rc) {
  86                 kfree(cls);
  87                 return rc;
  88         }
  89
  90         return 0;
  91 }
  92
  93 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) \
  94         || defined(CONFIG_PLAT_OPSPUT)
  95 static const u16 legacy_bases[] = { 0x1f0 };
  96 static const int legacy_irqs[]  = { PLD_IRQ_CFIREQ };
  97 #elif defined(CONFIG_PLAT_MAPPI3)
  98 static const u16 legacy_bases[] = { 0x1f0, 0x170 };
  99 static const int legacy_irqs[]  = { PLD_IRQ_CFIREQ, PLD_IRQ_IDEIREQ };
 100 #elif defined(CONFIG_ALPHA)
 101 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 };
 102 static const int legacy_irqs[]  = { 14, 15, 11, 10 };
 103 #else
 104 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
 105 static const int legacy_irqs[]  = { 14, 15, 11, 10, 8, 12 };
 106 #endif
 107
 108 static void ide_generic_check_pci_legacy_iobases(int *primary, int *secondary)
 109 {
 110         struct pci_dev *p = NULL;
 111         u16 val;
 112
 113         for_each_pci_dev(p) {
 114
 115                 if (pci_resource_start(p, 0) == 0x1f0)
 116                         *primary = 1;
 117                 if (pci_resource_start(p, 2) == 0x170)
 118                         *secondary = 1;
 119
 120                 /* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */
 121                 if (p->vendor == PCI_VENDOR_ID_CYRIX &&
 122                     (p->device == PCI_DEVICE_ID_CYRIX_5510 ||
 123                      p->device == PCI_DEVICE_ID_CYRIX_5520))
 124                         *primary = *secondary = 1;
 125
 126                 /* Intel MPIIX - PIO ATA on non PCI side of bridge */
 127                 if (p->vendor == PCI_VENDOR_ID_INTEL &&
 128                     p->device == PCI_DEVICE_ID_INTEL_82371MX) {
 129
 130                         pci_read_config_word(p, 0x6C, &val);
 131                         if (val & 0x8000) {
 132                                 /* ATA port enabled */
 133                                 if (val & 0x4000)
 134                                         *secondary = 1;
 135                                 else
 136                                         *primary = 1;
 137                         }
 138                 }
 139         }
 140 }
 141
 142 static int __init ide_generic_init(void)
 143 {
 144         hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
 145         unsigned long io_addr;
 146         int i, rc = 0, primary = 0, secondary = 0;
 147
 148         ide_generic_check_pci_legacy_iobases(&primary, &secondary);
 149
 150         if (!probe_mask) {
 151                 printk(KERN_INFO DRV_NAME ": please use \"probe_mask=0x3f\" "
 152                      "module parameter for probing all legacy ISA IDE ports\n");
 153
 154                 if (primary == 0)
 155                         probe_mask |= 0x1;
 156
 157                 if (secondary == 0)
 158                         probe_mask |= 0x2;
 159         } else
 160                 printk(KERN_INFO DRV_NAME ": enforcing probing of I/O ports "
 161                         "upon user request\n");
 162
 163         for (i = 0; i < ARRAY_SIZE(legacy_bases); i++) {
 164                 io_addr = legacy_bases[i];
 165
 166                 if ((probe_mask & (1 << i)) && io_addr) {
 167                         if (!request_region(io_addr, 8, DRV_NAME)) {
 168                                 printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX "
 169                                                 "not free.\n",
 170                                                 DRV_NAME, io_addr, io_addr + 7);
 171                                 continue;
 172                         }
 173
 174                         if (!request_region(io_addr + 0x206, 1, DRV_NAME)) {
 175                                 printk(KERN_ERR "%s: I/O resource 0x%lX "
 176                                                 "not free.\n",
 177                                                 DRV_NAME, io_addr + 0x206);
 178                                 release_region(io_addr, 8);
 179                                 continue;
 180                         }
 181
 182                         memset(&hw, 0, sizeof(hw));
 183                         ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
 184 #ifdef CONFIG_IA64
 185                         hw.irq = isa_irq_to_vector(legacy_irqs[i]);
 186 #else
 187                         hw.irq = legacy_irqs[i];
 188 #endif
 189                         hw.chipset = ide_generic;
 190
 191                         rc = ide_host_add(&ide_generic_port_info, hws, NULL);
 192                         if (rc) {
 193                                 release_region(io_addr + 0x206, 1);
 194                                 release_region(io_addr, 8);
 195                         }
 196                 }
 197         }
 198
 199         if (ide_generic_sysfs_init())
 200                 printk(KERN_ERR DRV_NAME ": failed to create ide_generic "
 201                                          "class\n");
 202
 203         return rc;
 204 }
 205
 206 module_init(ide_generic_init);
 207
 208 MODULE_LICENSE("GPL");