2 * IDE DMA support (including IDE PCI BM-DMA).
4 * Copyright (C) 1995-1998 Mark Lord
5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
8 * May be copied or modified under the terms of the GNU General Public License
10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
14 * Special Thanks to Mark for his Six years of work.
18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19 * fixing the problem with the BIOS on some Acer motherboards.
21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25 * at generic DMA -- his patches were referred to when preparing this code.
27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28 * for supplying a Promise UDMA board & WD UDMA drive for this work!
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/ide.h>
34 #include <linux/scatterlist.h>
35 #include <linux/dma-mapping.h>
39 static const struct drive_list_entry drive_whitelist [] = {
41 { "Micropolis 2112A" , NULL },
42 { "CONNER CTMA 4000" , NULL },
43 { "CONNER CTT8000-A" , NULL },
44 { "ST34342A" , NULL },
48 static const struct drive_list_entry drive_blacklist [] = {
50 { "WDC AC11000H" , NULL },
51 { "WDC AC22100H" , NULL },
52 { "WDC AC32500H" , NULL },
53 { "WDC AC33100H" , NULL },
54 { "WDC AC31600H" , NULL },
55 { "WDC AC32100H" , "24.09P07" },
56 { "WDC AC23200L" , "21.10N21" },
57 { "Compaq CRD-8241B" , NULL },
58 { "CRD-8400B" , NULL },
59 { "CRD-8480B", NULL },
60 { "CRD-8482B", NULL },
62 { "SanDisk SDP3B" , NULL },
63 { "SanDisk SDP3B-64" , NULL },
64 { "SANYO CD-ROM CRD" , NULL },
65 { "HITACHI CDR-8" , NULL },
66 { "HITACHI CDR-8335" , NULL },
67 { "HITACHI CDR-8435" , NULL },
68 { "Toshiba CD-ROM XM-6202B" , NULL },
69 { "TOSHIBA CD-ROM XM-1702BC", NULL },
70 { "CD-532E-A" , NULL },
71 { "E-IDE CD-ROM CR-840", NULL },
72 { "CD-ROM Drive/F5A", NULL },
73 { "WPI CDD-820", NULL },
74 { "SAMSUNG CD-ROM SC-148C", NULL },
75 { "SAMSUNG CD-ROM SC", NULL },
76 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
77 { "_NEC DV5800A", NULL },
78 { "SAMSUNG CD-ROM SN-124", "N001" },
79 { "Seagate STT20000A", NULL },
80 { "CD-ROM CDR_U200", "1.09" },
86 * ide_dma_intr - IDE DMA interrupt handler
87 * @drive: the drive the interrupt is for
89 * Handle an interrupt completing a read/write DMA transfer on an
93 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
95 ide_hwif_t *hwif = drive->hwif;
96 u8 stat = 0, dma_stat = 0;
98 dma_stat = hwif->dma_ops->dma_end(drive);
99 stat = hwif->tp_ops->read_status(hwif);
101 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
103 struct request *rq = HWGROUP(drive)->rq;
105 task_end_request(drive, rq, stat);
108 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
109 drive->name, dma_stat);
111 return ide_error(drive, "dma_intr", stat);
114 EXPORT_SYMBOL_GPL(ide_dma_intr);
116 static int ide_dma_good_drive(ide_drive_t *drive)
118 return ide_in_drive_list(drive->id, drive_whitelist);
122 * ide_build_sglist - map IDE scatter gather for DMA I/O
123 * @drive: the drive to build the DMA table for
124 * @rq: the request holding the sg list
126 * Perform the DMA mapping magic necessary to access the source or
127 * target buffers of a request via DMA. The lower layers of the
128 * kernel provide the necessary cache management so that we can
129 * operate in a portable fashion.
132 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
134 ide_hwif_t *hwif = HWIF(drive);
135 struct scatterlist *sg = hwif->sg_table;
137 ide_map_sg(drive, rq);
139 if (rq_data_dir(rq) == READ)
140 hwif->sg_dma_direction = DMA_FROM_DEVICE;
142 hwif->sg_dma_direction = DMA_TO_DEVICE;
144 return dma_map_sg(hwif->dev, sg, hwif->sg_nents,
145 hwif->sg_dma_direction);
148 EXPORT_SYMBOL_GPL(ide_build_sglist);
150 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
152 * ide_build_dmatable - build IDE DMA table
154 * ide_build_dmatable() prepares a dma request. We map the command
155 * to get the pci bus addresses of the buffers and then build up
156 * the PRD table that the IDE layer wants to be fed. The code
157 * knows about the 64K wrap bug in the CS5530.
159 * Returns the number of built PRD entries if all went okay,
160 * returns 0 otherwise.
162 * May also be invoked from trm290.c
165 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
167 ide_hwif_t *hwif = HWIF(drive);
168 __le32 *table = (__le32 *)hwif->dmatable_cpu;
169 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
170 unsigned int count = 0;
172 struct scatterlist *sg;
174 hwif->sg_nents = i = ide_build_sglist(drive, rq);
184 cur_addr = sg_dma_address(sg);
185 cur_len = sg_dma_len(sg);
188 * Fill in the dma table, without crossing any 64kB boundaries.
189 * Most hardware requires 16-bit alignment of all blocks,
190 * but the trm290 requires 32-bit alignment.
194 if (count++ >= PRD_ENTRIES) {
195 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
196 goto use_pio_instead;
198 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
200 if (bcount > cur_len)
202 *table++ = cpu_to_le32(cur_addr);
203 xcount = bcount & 0xffff;
205 xcount = ((xcount >> 2) - 1) << 16;
206 else if (xcount == 0x0000) {
208 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
209 * but at least one (e.g. CS5530) misinterprets it as zero (!).
210 * So here we break the 64KB entry into two 32KB entries instead.
212 if (count++ >= PRD_ENTRIES) {
213 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
214 goto use_pio_instead;
216 *table++ = cpu_to_le32(0x8000);
217 *table++ = cpu_to_le32(cur_addr + 0x8000);
220 *table++ = cpu_to_le32(xcount);
232 *--table |= cpu_to_le32(0x80000000);
236 printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
239 ide_destroy_dmatable(drive);
241 return 0; /* revert to PIO for this request */
244 EXPORT_SYMBOL_GPL(ide_build_dmatable);
248 * ide_destroy_dmatable - clean up DMA mapping
249 * @drive: The drive to unmap
251 * Teardown mappings after DMA has completed. This must be called
252 * after the completion of each use of ide_build_dmatable and before
253 * the next use of ide_build_dmatable. Failure to do so will cause
254 * an oops as only one mapping can be live for each target at a given
258 void ide_destroy_dmatable (ide_drive_t *drive)
260 ide_hwif_t *hwif = drive->hwif;
262 dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents,
263 hwif->sg_dma_direction);
266 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
268 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
270 * config_drive_for_dma - attempt to activate IDE DMA
271 * @drive: the drive to place in DMA mode
273 * If the drive supports at least mode 2 DMA or UDMA of any kind
274 * then attempt to place it into DMA mode. Drives that are known to
275 * support DMA but predate the DMA properties or that are known
276 * to have DMA handling bugs are also set up appropriately based
277 * on the good/bad drive lists.
280 static int config_drive_for_dma (ide_drive_t *drive)
282 ide_hwif_t *hwif = drive->hwif;
285 if (drive->media != ide_disk) {
286 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
291 * Enable DMA on any drive that has
292 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
294 if ((id[ATA_ID_FIELD_VALID] & 4) &&
295 ((id[ATA_ID_UDMA_MODES] >> 8) & 0x7f))
299 * Enable DMA on any drive that has mode2 DMA
300 * (multi or single) enabled
302 if (id[ATA_ID_FIELD_VALID] & 2) /* regular DMA */
303 if ((id[ATA_ID_MWDMA_MODES] & 0x404) == 0x404 ||
304 (id[ATA_ID_SWDMA_MODES] & 0x404) == 0x404)
307 /* Consult the list of known "good" drives */
308 if (ide_dma_good_drive(drive))
315 * dma_timer_expiry - handle a DMA timeout
316 * @drive: Drive that timed out
318 * An IDE DMA transfer timed out. In the event of an error we ask
319 * the driver to resolve the problem, if a DMA transfer is still
320 * in progress we continue to wait (arguably we need to add a
321 * secondary 'I don't care what the drive thinks' timeout here)
322 * Finally if we have an interrupt we let it complete the I/O.
323 * But only one time - we clear expiry and if it's still not
324 * completed after WAIT_CMD, we error and retry in PIO.
325 * This can occur if an interrupt is lost or due to hang or bugs.
328 static int dma_timer_expiry (ide_drive_t *drive)
330 ide_hwif_t *hwif = HWIF(drive);
331 u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
333 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
334 drive->name, dma_stat);
336 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
339 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
341 /* 1 dmaing, 2 error, 4 intr */
342 if (dma_stat & 2) /* ERROR */
345 if (dma_stat & 1) /* DMAing */
348 if (dma_stat & 4) /* Got an Interrupt */
351 return 0; /* Status is unknown -- reset the bus */
355 * ide_dma_host_set - Enable/disable DMA on a host
356 * @drive: drive to control
358 * Enable/disable DMA on an IDE controller following generic
359 * bus-mastering IDE controller behaviour.
362 void ide_dma_host_set(ide_drive_t *drive, int on)
364 ide_hwif_t *hwif = HWIF(drive);
365 u8 unit = drive->dn & 1;
366 u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
369 dma_stat |= (1 << (5 + unit));
371 dma_stat &= ~(1 << (5 + unit));
373 if (hwif->host_flags & IDE_HFLAG_MMIO)
375 (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
377 outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS);
380 EXPORT_SYMBOL_GPL(ide_dma_host_set);
381 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
384 * ide_dma_off_quietly - Generic DMA kill
385 * @drive: drive to control
387 * Turn off the current DMA on this IDE controller.
390 void ide_dma_off_quietly(ide_drive_t *drive)
392 drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
393 ide_toggle_bounce(drive, 0);
395 drive->hwif->dma_ops->dma_host_set(drive, 0);
398 EXPORT_SYMBOL(ide_dma_off_quietly);
401 * ide_dma_off - disable DMA on a device
402 * @drive: drive to disable DMA on
404 * Disable IDE DMA for a device on this IDE controller.
405 * Inform the user that DMA has been disabled.
408 void ide_dma_off(ide_drive_t *drive)
410 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
411 ide_dma_off_quietly(drive);
414 EXPORT_SYMBOL(ide_dma_off);
417 * ide_dma_on - Enable DMA on a device
418 * @drive: drive to enable DMA on
420 * Enable IDE DMA for a device on this IDE controller.
423 void ide_dma_on(ide_drive_t *drive)
425 drive->dev_flags |= IDE_DFLAG_USING_DMA;
426 ide_toggle_bounce(drive, 1);
428 drive->hwif->dma_ops->dma_host_set(drive, 1);
431 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
433 * ide_dma_setup - begin a DMA phase
434 * @drive: target device
436 * Build an IDE DMA PRD (IDE speak for scatter gather table)
437 * and then set up the DMA transfer registers for a device
438 * that follows generic IDE PCI DMA behaviour. Controllers can
439 * override this function if they need to
441 * Returns 0 on success. If a PIO fallback is required then 1
445 int ide_dma_setup(ide_drive_t *drive)
447 ide_hwif_t *hwif = drive->hwif;
448 struct request *rq = HWGROUP(drive)->rq;
449 unsigned int reading;
450 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
458 /* fall back to pio! */
459 if (!ide_build_dmatable(drive, rq)) {
460 ide_map_sg(drive, rq);
465 if (hwif->host_flags & IDE_HFLAG_MMIO)
466 writel(hwif->dmatable_dma,
467 (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS));
469 outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS);
473 writeb(reading, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
475 outb(reading, hwif->dma_base + ATA_DMA_CMD);
477 /* read DMA status for INTR & ERROR flags */
478 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
480 /* clear INTR & ERROR flags */
483 (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
485 outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
487 drive->waiting_for_dma = 1;
491 EXPORT_SYMBOL_GPL(ide_dma_setup);
493 void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
495 /* issue cmd to drive */
496 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
498 EXPORT_SYMBOL_GPL(ide_dma_exec_cmd);
500 void ide_dma_start(ide_drive_t *drive)
502 ide_hwif_t *hwif = drive->hwif;
505 /* Note that this is done *after* the cmd has
506 * been issued to the drive, as per the BM-IDE spec.
507 * The Promise Ultra33 doesn't work correctly when
508 * we do this part before issuing the drive cmd.
510 if (hwif->host_flags & IDE_HFLAG_MMIO) {
511 dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
514 (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
516 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
517 outb(dma_cmd | 1, hwif->dma_base + ATA_DMA_CMD);
523 EXPORT_SYMBOL_GPL(ide_dma_start);
525 /* returns 1 on error, 0 otherwise */
526 int ide_dma_end(ide_drive_t *drive)
528 ide_hwif_t *hwif = drive->hwif;
529 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
530 u8 dma_stat = 0, dma_cmd = 0;
532 drive->waiting_for_dma = 0;
535 /* get DMA command mode */
536 dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
539 (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
541 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
542 outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
546 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
549 /* clear the INTR & ERROR bits */
551 (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
553 outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
555 /* purge DMA mappings */
556 ide_destroy_dmatable(drive);
557 /* verify good DMA status */
559 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
561 EXPORT_SYMBOL_GPL(ide_dma_end);
563 /* returns 1 if dma irq issued, 0 otherwise */
564 int ide_dma_test_irq(ide_drive_t *drive)
566 ide_hwif_t *hwif = HWIF(drive);
567 u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
569 /* return 1 if INTR asserted */
570 if ((dma_stat & 4) == 4)
575 EXPORT_SYMBOL_GPL(ide_dma_test_irq);
577 static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
578 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
580 int __ide_dma_bad_drive (ide_drive_t *drive)
584 int blacklist = ide_in_drive_list(id, drive_blacklist);
586 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
587 drive->name, (char *)&id[ATA_ID_PROD]);
593 EXPORT_SYMBOL(__ide_dma_bad_drive);
595 static const u8 xfer_mode_bases[] = {
601 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
604 ide_hwif_t *hwif = drive->hwif;
605 const struct ide_port_ops *port_ops = hwif->port_ops;
606 unsigned int mask = 0;
610 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
613 if (port_ops && port_ops->udma_filter)
614 mask = port_ops->udma_filter(drive);
616 mask = hwif->ultra_mask;
617 mask &= id[ATA_ID_UDMA_MODES];
620 * avoid false cable warning from eighty_ninty_three()
622 if (req_mode > XFER_UDMA_2) {
623 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
628 if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
630 if (port_ops && port_ops->mdma_filter)
631 mask = port_ops->mdma_filter(drive);
633 mask = hwif->mwdma_mask;
634 mask &= id[ATA_ID_MWDMA_MODES];
637 if (id[ATA_ID_FIELD_VALID] & 2) {
638 mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
639 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
640 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
643 * if the mode is valid convert it to the mask
644 * (the maximum allowed mode is XFER_SW_DMA_2)
647 mask = ((2 << mode) - 1) & hwif->swdma_mask;
659 * ide_find_dma_mode - compute DMA speed
661 * @req_mode: requested mode
663 * Checks the drive/host capabilities and finds the speed to use for
664 * the DMA transfer. The speed is then limited by the requested mode.
666 * Returns 0 if the drive/host combination is incapable of DMA transfers
667 * or if the requested mode is not a DMA mode.
670 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
672 ide_hwif_t *hwif = drive->hwif;
677 if (drive->media != ide_disk) {
678 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
682 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
683 if (req_mode < xfer_mode_bases[i])
685 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
688 mode = xfer_mode_bases[i] + x;
693 if (hwif->chipset == ide_acorn && mode == 0) {
697 if (ide_dma_good_drive(drive) &&
698 drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
699 mode = XFER_MW_DMA_1;
702 mode = min(mode, req_mode);
704 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
705 mode ? ide_xfer_verbose(mode) : "no DMA");
710 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
712 static int ide_tune_dma(ide_drive_t *drive)
714 ide_hwif_t *hwif = drive->hwif;
717 if (ata_id_has_dma(drive->id) == 0 ||
718 (drive->dev_flags & IDE_DFLAG_NODMA))
721 /* consult the list of known "bad" drives */
722 if (__ide_dma_bad_drive(drive))
725 if (ide_id_dma_bug(drive))
728 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
729 return config_drive_for_dma(drive);
731 speed = ide_max_dma_mode(drive);
736 if (ide_set_dma_mode(drive, speed))
742 static int ide_dma_check(ide_drive_t *drive)
744 ide_hwif_t *hwif = drive->hwif;
746 if (ide_tune_dma(drive))
749 /* TODO: always do PIO fallback */
750 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
753 ide_set_max_pio(drive);
758 int ide_id_dma_bug(ide_drive_t *drive)
762 if (id[ATA_ID_FIELD_VALID] & 4) {
763 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
764 (id[ATA_ID_MWDMA_MODES] >> 8))
766 } else if (id[ATA_ID_FIELD_VALID] & 2) {
767 if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
768 (id[ATA_ID_SWDMA_MODES] >> 8))
773 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
777 int ide_set_dma(ide_drive_t *drive)
782 * Force DMAing for the beginning of the check.
783 * Some chipsets appear to do interesting
784 * things, if not checked and cleared.
787 ide_dma_off_quietly(drive);
789 rc = ide_dma_check(drive);
798 void ide_check_dma_crc(ide_drive_t *drive)
802 ide_dma_off_quietly(drive);
803 drive->crc_count = 0;
804 mode = drive->current_speed;
806 * Don't try non Ultra-DMA modes without iCRC's. Force the
807 * device to PIO and make the user enable SWDMA/MWDMA modes.
809 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
813 ide_set_xfer_rate(drive, mode);
814 if (drive->current_speed >= XFER_SW_DMA_0)
818 void ide_dma_lost_irq(ide_drive_t *drive)
820 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
822 EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
824 void ide_dma_timeout(ide_drive_t *drive)
826 ide_hwif_t *hwif = HWIF(drive);
828 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
830 if (hwif->dma_ops->dma_test_irq(drive))
833 ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
835 hwif->dma_ops->dma_end(drive);
837 EXPORT_SYMBOL_GPL(ide_dma_timeout);
839 void ide_release_dma_engine(ide_hwif_t *hwif)
841 if (hwif->dmatable_cpu) {
842 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
844 dma_free_coherent(hwif->dev, prd_size,
845 hwif->dmatable_cpu, hwif->dmatable_dma);
846 hwif->dmatable_cpu = NULL;
849 EXPORT_SYMBOL_GPL(ide_release_dma_engine);
851 int ide_allocate_dma_engine(ide_hwif_t *hwif)
855 if (hwif->prd_max_nents == 0)
856 hwif->prd_max_nents = PRD_ENTRIES;
857 if (hwif->prd_ent_size == 0)
858 hwif->prd_ent_size = PRD_BYTES;
860 prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
862 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
865 if (hwif->dmatable_cpu == NULL) {
866 printk(KERN_ERR "%s: unable to allocate PRD table\n",
873 EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
875 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
876 const struct ide_dma_ops sff_dma_ops = {
877 .dma_host_set = ide_dma_host_set,
878 .dma_setup = ide_dma_setup,
879 .dma_exec_cmd = ide_dma_exec_cmd,
880 .dma_start = ide_dma_start,
881 .dma_end = ide_dma_end,
882 .dma_test_irq = ide_dma_test_irq,
883 .dma_timeout = ide_dma_timeout,
884 .dma_lost_irq = ide_dma_lost_irq,
886 EXPORT_SYMBOL_GPL(sff_dma_ops);
887 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */