2 * IDE DMA support (including IDE PCI BM-DMA).
4 * Copyright (C) 1995-1998 Mark Lord
5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
8 * May be copied or modified under the terms of the GNU General Public License
10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
14 * Special Thanks to Mark for his Six years of work.
18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19 * fixing the problem with the BIOS on some Acer motherboards.
21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25 * at generic DMA -- his patches were referred to when preparing this code.
27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28 * for supplying a Promise UDMA board & WD UDMA drive for this work!
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/ide.h>
34 #include <linux/scatterlist.h>
35 #include <linux/dma-mapping.h>
38 static const struct drive_list_entry drive_whitelist[] = {
39 { "Micropolis 2112A" , NULL },
40 { "CONNER CTMA 4000" , NULL },
41 { "CONNER CTT8000-A" , NULL },
42 { "ST34342A" , NULL },
46 static const struct drive_list_entry drive_blacklist[] = {
47 { "WDC AC11000H" , NULL },
48 { "WDC AC22100H" , NULL },
49 { "WDC AC32500H" , NULL },
50 { "WDC AC33100H" , NULL },
51 { "WDC AC31600H" , NULL },
52 { "WDC AC32100H" , "24.09P07" },
53 { "WDC AC23200L" , "21.10N21" },
54 { "Compaq CRD-8241B" , NULL },
55 { "CRD-8400B" , NULL },
56 { "CRD-8480B", NULL },
57 { "CRD-8482B", NULL },
59 { "SanDisk SDP3B" , NULL },
60 { "SanDisk SDP3B-64" , NULL },
61 { "SANYO CD-ROM CRD" , NULL },
62 { "HITACHI CDR-8" , NULL },
63 { "HITACHI CDR-8335" , NULL },
64 { "HITACHI CDR-8435" , NULL },
65 { "Toshiba CD-ROM XM-6202B" , NULL },
66 { "TOSHIBA CD-ROM XM-1702BC", NULL },
67 { "CD-532E-A" , NULL },
68 { "E-IDE CD-ROM CR-840", NULL },
69 { "CD-ROM Drive/F5A", NULL },
70 { "WPI CDD-820", NULL },
71 { "SAMSUNG CD-ROM SC-148C", NULL },
72 { "SAMSUNG CD-ROM SC", NULL },
73 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
74 { "_NEC DV5800A", NULL },
75 { "SAMSUNG CD-ROM SN-124", "N001" },
76 { "Seagate STT20000A", NULL },
77 { "CD-ROM CDR_U200", "1.09" },
83 * ide_dma_intr - IDE DMA interrupt handler
84 * @drive: the drive the interrupt is for
86 * Handle an interrupt completing a read/write DMA transfer on an
90 ide_startstop_t ide_dma_intr(ide_drive_t *drive)
92 ide_hwif_t *hwif = drive->hwif;
93 u8 stat = 0, dma_stat = 0;
95 dma_stat = hwif->dma_ops->dma_end(drive);
96 stat = hwif->tp_ops->read_status(hwif);
98 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
100 struct request *rq = hwif->hwgroup->rq;
102 task_end_request(drive, rq, stat);
105 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
106 drive->name, __func__, dma_stat);
108 return ide_error(drive, "dma_intr", stat);
110 EXPORT_SYMBOL_GPL(ide_dma_intr);
112 static int ide_dma_good_drive(ide_drive_t *drive)
114 return ide_in_drive_list(drive->id, drive_whitelist);
118 * ide_build_sglist - map IDE scatter gather for DMA I/O
119 * @drive: the drive to build the DMA table for
120 * @rq: the request holding the sg list
122 * Perform the DMA mapping magic necessary to access the source or
123 * target buffers of a request via DMA. The lower layers of the
124 * kernel provide the necessary cache management so that we can
125 * operate in a portable fashion.
128 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
130 ide_hwif_t *hwif = drive->hwif;
131 struct scatterlist *sg = hwif->sg_table;
133 ide_map_sg(drive, rq);
135 if (rq_data_dir(rq) == READ)
136 hwif->sg_dma_direction = DMA_FROM_DEVICE;
138 hwif->sg_dma_direction = DMA_TO_DEVICE;
140 return dma_map_sg(hwif->dev, sg, hwif->sg_nents,
141 hwif->sg_dma_direction);
143 EXPORT_SYMBOL_GPL(ide_build_sglist);
145 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
147 * ide_build_dmatable - build IDE DMA table
149 * ide_build_dmatable() prepares a dma request. We map the command
150 * to get the pci bus addresses of the buffers and then build up
151 * the PRD table that the IDE layer wants to be fed.
153 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
154 * but at least one (e.g. CS5530) misinterprets it as zero (!).
155 * So we break the 64KB entry into two 32KB entries instead.
157 * Returns the number of built PRD entries if all went okay,
158 * returns 0 otherwise.
160 * May also be invoked from trm290.c
163 int ide_build_dmatable(ide_drive_t *drive, struct request *rq)
165 ide_hwif_t *hwif = drive->hwif;
166 __le32 *table = (__le32 *)hwif->dmatable_cpu;
167 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
168 unsigned int count = 0;
170 struct scatterlist *sg;
172 hwif->sg_nents = ide_build_sglist(drive, rq);
173 if (hwif->sg_nents == 0)
176 for_each_sg(hwif->sg_table, sg, hwif->sg_nents, i) {
177 u32 cur_addr, cur_len, xcount, bcount;
179 cur_addr = sg_dma_address(sg);
180 cur_len = sg_dma_len(sg);
183 * Fill in the dma table, without crossing any 64kB boundaries.
184 * Most hardware requires 16-bit alignment of all blocks,
185 * but the trm290 requires 32-bit alignment.
189 if (count++ >= PRD_ENTRIES)
190 goto use_pio_instead;
192 bcount = 0x10000 - (cur_addr & 0xffff);
193 if (bcount > cur_len)
195 *table++ = cpu_to_le32(cur_addr);
196 xcount = bcount & 0xffff;
198 xcount = ((xcount >> 2) - 1) << 16;
199 if (xcount == 0x0000) {
200 if (count++ >= PRD_ENTRIES)
201 goto use_pio_instead;
202 *table++ = cpu_to_le32(0x8000);
203 *table++ = cpu_to_le32(cur_addr + 0x8000);
206 *table++ = cpu_to_le32(xcount);
214 *--table |= cpu_to_le32(0x80000000);
219 printk(KERN_ERR "%s: %s\n", drive->name,
220 count ? "DMA table too small" : "empty DMA table?");
222 ide_destroy_dmatable(drive);
224 return 0; /* revert to PIO for this request */
226 EXPORT_SYMBOL_GPL(ide_build_dmatable);
230 * ide_destroy_dmatable - clean up DMA mapping
231 * @drive: The drive to unmap
233 * Teardown mappings after DMA has completed. This must be called
234 * after the completion of each use of ide_build_dmatable and before
235 * the next use of ide_build_dmatable. Failure to do so will cause
236 * an oops as only one mapping can be live for each target at a given
240 void ide_destroy_dmatable(ide_drive_t *drive)
242 ide_hwif_t *hwif = drive->hwif;
244 dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents,
245 hwif->sg_dma_direction);
247 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
249 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
251 * config_drive_for_dma - attempt to activate IDE DMA
252 * @drive: the drive to place in DMA mode
254 * If the drive supports at least mode 2 DMA or UDMA of any kind
255 * then attempt to place it into DMA mode. Drives that are known to
256 * support DMA but predate the DMA properties or that are known
257 * to have DMA handling bugs are also set up appropriately based
258 * on the good/bad drive lists.
261 static int config_drive_for_dma(ide_drive_t *drive)
263 ide_hwif_t *hwif = drive->hwif;
266 if (drive->media != ide_disk) {
267 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
272 * Enable DMA on any drive that has
273 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
275 if ((id[ATA_ID_FIELD_VALID] & 4) &&
276 ((id[ATA_ID_UDMA_MODES] >> 8) & 0x7f))
280 * Enable DMA on any drive that has mode2 DMA
281 * (multi or single) enabled
283 if (id[ATA_ID_FIELD_VALID] & 2) /* regular DMA */
284 if ((id[ATA_ID_MWDMA_MODES] & 0x404) == 0x404 ||
285 (id[ATA_ID_SWDMA_MODES] & 0x404) == 0x404)
288 /* Consult the list of known "good" drives */
289 if (ide_dma_good_drive(drive))
296 * dma_timer_expiry - handle a DMA timeout
297 * @drive: Drive that timed out
299 * An IDE DMA transfer timed out. In the event of an error we ask
300 * the driver to resolve the problem, if a DMA transfer is still
301 * in progress we continue to wait (arguably we need to add a
302 * secondary 'I don't care what the drive thinks' timeout here)
303 * Finally if we have an interrupt we let it complete the I/O.
304 * But only one time - we clear expiry and if it's still not
305 * completed after WAIT_CMD, we error and retry in PIO.
306 * This can occur if an interrupt is lost or due to hang or bugs.
309 static int dma_timer_expiry(ide_drive_t *drive)
311 ide_hwif_t *hwif = drive->hwif;
312 u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
314 printk(KERN_WARNING "%s: %s: DMA status (0x%02x)\n",
315 drive->name, __func__, dma_stat);
317 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
320 hwif->hwgroup->expiry = NULL; /* one free ride for now */
322 /* 1 dmaing, 2 error, 4 intr */
323 if (dma_stat & 2) /* ERROR */
326 if (dma_stat & 1) /* DMAing */
329 if (dma_stat & 4) /* Got an Interrupt */
332 return 0; /* Status is unknown -- reset the bus */
336 * ide_dma_host_set - Enable/disable DMA on a host
337 * @drive: drive to control
339 * Enable/disable DMA on an IDE controller following generic
340 * bus-mastering IDE controller behaviour.
343 void ide_dma_host_set(ide_drive_t *drive, int on)
345 ide_hwif_t *hwif = drive->hwif;
346 u8 unit = drive->dn & 1;
347 u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
350 dma_stat |= (1 << (5 + unit));
352 dma_stat &= ~(1 << (5 + unit));
354 if (hwif->host_flags & IDE_HFLAG_MMIO)
356 (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
358 outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS);
360 EXPORT_SYMBOL_GPL(ide_dma_host_set);
361 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
364 * ide_dma_off_quietly - Generic DMA kill
365 * @drive: drive to control
367 * Turn off the current DMA on this IDE controller.
370 void ide_dma_off_quietly(ide_drive_t *drive)
372 drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
373 ide_toggle_bounce(drive, 0);
375 drive->hwif->dma_ops->dma_host_set(drive, 0);
377 EXPORT_SYMBOL(ide_dma_off_quietly);
380 * ide_dma_off - disable DMA on a device
381 * @drive: drive to disable DMA on
383 * Disable IDE DMA for a device on this IDE controller.
384 * Inform the user that DMA has been disabled.
387 void ide_dma_off(ide_drive_t *drive)
389 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
390 ide_dma_off_quietly(drive);
392 EXPORT_SYMBOL(ide_dma_off);
395 * ide_dma_on - Enable DMA on a device
396 * @drive: drive to enable DMA on
398 * Enable IDE DMA for a device on this IDE controller.
401 void ide_dma_on(ide_drive_t *drive)
403 drive->dev_flags |= IDE_DFLAG_USING_DMA;
404 ide_toggle_bounce(drive, 1);
406 drive->hwif->dma_ops->dma_host_set(drive, 1);
409 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
411 * ide_dma_setup - begin a DMA phase
412 * @drive: target device
414 * Build an IDE DMA PRD (IDE speak for scatter gather table)
415 * and then set up the DMA transfer registers for a device
416 * that follows generic IDE PCI DMA behaviour. Controllers can
417 * override this function if they need to
419 * Returns 0 on success. If a PIO fallback is required then 1
423 int ide_dma_setup(ide_drive_t *drive)
425 ide_hwif_t *hwif = drive->hwif;
426 struct request *rq = hwif->hwgroup->rq;
427 unsigned int reading;
428 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
436 /* fall back to pio! */
437 if (!ide_build_dmatable(drive, rq)) {
438 ide_map_sg(drive, rq);
443 if (hwif->host_flags & IDE_HFLAG_MMIO)
444 writel(hwif->dmatable_dma,
445 (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS));
447 outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS);
451 writeb(reading, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
453 outb(reading, hwif->dma_base + ATA_DMA_CMD);
455 /* read DMA status for INTR & ERROR flags */
456 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
458 /* clear INTR & ERROR flags */
461 (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
463 outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
465 drive->waiting_for_dma = 1;
468 EXPORT_SYMBOL_GPL(ide_dma_setup);
470 void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
472 /* issue cmd to drive */
473 ide_execute_command(drive, command, &ide_dma_intr, 2 * WAIT_CMD,
476 EXPORT_SYMBOL_GPL(ide_dma_exec_cmd);
478 void ide_dma_start(ide_drive_t *drive)
480 ide_hwif_t *hwif = drive->hwif;
483 /* Note that this is done *after* the cmd has
484 * been issued to the drive, as per the BM-IDE spec.
485 * The Promise Ultra33 doesn't work correctly when
486 * we do this part before issuing the drive cmd.
488 if (hwif->host_flags & IDE_HFLAG_MMIO) {
489 dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
492 (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
494 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
495 outb(dma_cmd | 1, hwif->dma_base + ATA_DMA_CMD);
500 EXPORT_SYMBOL_GPL(ide_dma_start);
502 /* returns 1 on error, 0 otherwise */
503 int ide_dma_end(ide_drive_t *drive)
505 ide_hwif_t *hwif = drive->hwif;
506 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
507 u8 dma_stat = 0, dma_cmd = 0;
509 drive->waiting_for_dma = 0;
512 /* get DMA command mode */
513 dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
516 (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
518 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
519 outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
523 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
526 /* clear the INTR & ERROR bits */
528 (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
530 outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
532 /* purge DMA mappings */
533 ide_destroy_dmatable(drive);
534 /* verify good DMA status */
536 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
538 EXPORT_SYMBOL_GPL(ide_dma_end);
540 /* returns 1 if dma irq issued, 0 otherwise */
541 int ide_dma_test_irq(ide_drive_t *drive)
543 ide_hwif_t *hwif = drive->hwif;
544 u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
546 /* return 1 if INTR asserted */
547 if ((dma_stat & 4) == 4)
552 EXPORT_SYMBOL_GPL(ide_dma_test_irq);
554 static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
555 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
557 int __ide_dma_bad_drive(ide_drive_t *drive)
561 int blacklist = ide_in_drive_list(id, drive_blacklist);
563 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
564 drive->name, (char *)&id[ATA_ID_PROD]);
569 EXPORT_SYMBOL(__ide_dma_bad_drive);
571 static const u8 xfer_mode_bases[] = {
577 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
580 ide_hwif_t *hwif = drive->hwif;
581 const struct ide_port_ops *port_ops = hwif->port_ops;
582 unsigned int mask = 0;
586 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
589 if (port_ops && port_ops->udma_filter)
590 mask = port_ops->udma_filter(drive);
592 mask = hwif->ultra_mask;
593 mask &= id[ATA_ID_UDMA_MODES];
596 * avoid false cable warning from eighty_ninty_three()
598 if (req_mode > XFER_UDMA_2) {
599 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
604 if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
606 if (port_ops && port_ops->mdma_filter)
607 mask = port_ops->mdma_filter(drive);
609 mask = hwif->mwdma_mask;
610 mask &= id[ATA_ID_MWDMA_MODES];
613 if (id[ATA_ID_FIELD_VALID] & 2) {
614 mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
615 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
616 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
619 * if the mode is valid convert it to the mask
620 * (the maximum allowed mode is XFER_SW_DMA_2)
623 mask = ((2 << mode) - 1) & hwif->swdma_mask;
635 * ide_find_dma_mode - compute DMA speed
637 * @req_mode: requested mode
639 * Checks the drive/host capabilities and finds the speed to use for
640 * the DMA transfer. The speed is then limited by the requested mode.
642 * Returns 0 if the drive/host combination is incapable of DMA transfers
643 * or if the requested mode is not a DMA mode.
646 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
648 ide_hwif_t *hwif = drive->hwif;
653 if (drive->media != ide_disk) {
654 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
658 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
659 if (req_mode < xfer_mode_bases[i])
661 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
664 mode = xfer_mode_bases[i] + x;
669 if (hwif->chipset == ide_acorn && mode == 0) {
673 if (ide_dma_good_drive(drive) &&
674 drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
675 mode = XFER_MW_DMA_1;
678 mode = min(mode, req_mode);
680 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
681 mode ? ide_xfer_verbose(mode) : "no DMA");
685 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
687 static int ide_tune_dma(ide_drive_t *drive)
689 ide_hwif_t *hwif = drive->hwif;
692 if (ata_id_has_dma(drive->id) == 0 ||
693 (drive->dev_flags & IDE_DFLAG_NODMA))
696 /* consult the list of known "bad" drives */
697 if (__ide_dma_bad_drive(drive))
700 if (ide_id_dma_bug(drive))
703 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
704 return config_drive_for_dma(drive);
706 speed = ide_max_dma_mode(drive);
711 if (ide_set_dma_mode(drive, speed))
717 static int ide_dma_check(ide_drive_t *drive)
719 ide_hwif_t *hwif = drive->hwif;
721 if (ide_tune_dma(drive))
724 /* TODO: always do PIO fallback */
725 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
728 ide_set_max_pio(drive);
733 int ide_id_dma_bug(ide_drive_t *drive)
737 if (id[ATA_ID_FIELD_VALID] & 4) {
738 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
739 (id[ATA_ID_MWDMA_MODES] >> 8))
741 } else if (id[ATA_ID_FIELD_VALID] & 2) {
742 if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
743 (id[ATA_ID_SWDMA_MODES] >> 8))
748 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
752 int ide_set_dma(ide_drive_t *drive)
757 * Force DMAing for the beginning of the check.
758 * Some chipsets appear to do interesting
759 * things, if not checked and cleared.
762 ide_dma_off_quietly(drive);
764 rc = ide_dma_check(drive);
773 void ide_check_dma_crc(ide_drive_t *drive)
777 ide_dma_off_quietly(drive);
778 drive->crc_count = 0;
779 mode = drive->current_speed;
781 * Don't try non Ultra-DMA modes without iCRC's. Force the
782 * device to PIO and make the user enable SWDMA/MWDMA modes.
784 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
788 ide_set_xfer_rate(drive, mode);
789 if (drive->current_speed >= XFER_SW_DMA_0)
793 void ide_dma_lost_irq(ide_drive_t *drive)
795 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
797 EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
799 void ide_dma_timeout(ide_drive_t *drive)
801 ide_hwif_t *hwif = drive->hwif;
803 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
805 if (hwif->dma_ops->dma_test_irq(drive))
808 ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
810 hwif->dma_ops->dma_end(drive);
812 EXPORT_SYMBOL_GPL(ide_dma_timeout);
814 void ide_release_dma_engine(ide_hwif_t *hwif)
816 if (hwif->dmatable_cpu) {
817 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
819 dma_free_coherent(hwif->dev, prd_size,
820 hwif->dmatable_cpu, hwif->dmatable_dma);
821 hwif->dmatable_cpu = NULL;
824 EXPORT_SYMBOL_GPL(ide_release_dma_engine);
826 int ide_allocate_dma_engine(ide_hwif_t *hwif)
830 if (hwif->prd_max_nents == 0)
831 hwif->prd_max_nents = PRD_ENTRIES;
832 if (hwif->prd_ent_size == 0)
833 hwif->prd_ent_size = PRD_BYTES;
835 prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
837 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
840 if (hwif->dmatable_cpu == NULL) {
841 printk(KERN_ERR "%s: unable to allocate PRD table\n",
848 EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
850 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
851 const struct ide_dma_ops sff_dma_ops = {
852 .dma_host_set = ide_dma_host_set,
853 .dma_setup = ide_dma_setup,
854 .dma_exec_cmd = ide_dma_exec_cmd,
855 .dma_start = ide_dma_start,
856 .dma_end = ide_dma_end,
857 .dma_test_irq = ide_dma_test_irq,
858 .dma_timeout = ide_dma_timeout,
859 .dma_lost_irq = ide_dma_lost_irq,
861 EXPORT_SYMBOL_GPL(sff_dma_ops);
862 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */