2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4 * Copyright (C) 2004-2007 Texas Instruments
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * - HS USB ULPI mode works.
22 * - 3-pin mode support may be added in future.
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/time.h>
29 #include <linux/interrupt.h>
30 #include <linux/usb.h>
31 #include <linux/i2c/twl4030.h>
33 /* Register defines */
35 #define VENDOR_ID_LO 0x00
36 #define VENDOR_ID_HI 0x01
37 #define PRODUCT_ID_LO 0x02
38 #define PRODUCT_ID_HI 0x03
40 #define FUNC_CTRL 0x04
41 #define FUNC_CTRL_SET 0x05
42 #define FUNC_CTRL_CLR 0x06
43 #define FUNC_CTRL_SUSPENDM (1 << 6)
44 #define FUNC_CTRL_RESET (1 << 5)
45 #define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
46 #define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
47 #define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
48 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
49 #define FUNC_CTRL_TERMSELECT (1 << 2)
50 #define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
51 #define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
52 #define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
53 #define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
54 #define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
57 #define IFC_CTRL_SET 0x08
58 #define IFC_CTRL_CLR 0x09
59 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
60 #define IFC_CTRL_AUTORESUME (1 << 4)
61 #define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
62 #define IFC_CTRL_CARKITMODE (1 << 2)
63 #define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
66 #define OTG_CTRL_SET 0x0B
67 #define OTG_CTRL_CLR 0x0C
68 #define OTG_CTRL_DRVVBUS (1 << 5)
69 #define OTG_CTRL_CHRGVBUS (1 << 4)
70 #define OTG_CTRL_DISCHRGVBUS (1 << 3)
71 #define OTG_CTRL_DMPULLDOWN (1 << 2)
72 #define OTG_CTRL_DPPULLDOWN (1 << 1)
73 #define OTG_CTRL_IDPULLUP (1 << 0)
75 #define USB_INT_EN_RISE 0x0D
76 #define USB_INT_EN_RISE_SET 0x0E
77 #define USB_INT_EN_RISE_CLR 0x0F
78 #define USB_INT_EN_FALL 0x10
79 #define USB_INT_EN_FALL_SET 0x11
80 #define USB_INT_EN_FALL_CLR 0x12
81 #define USB_INT_STS 0x13
82 #define USB_INT_LATCH 0x14
83 #define USB_INT_IDGND (1 << 4)
84 #define USB_INT_SESSEND (1 << 3)
85 #define USB_INT_SESSVALID (1 << 2)
86 #define USB_INT_VBUSVALID (1 << 1)
87 #define USB_INT_HOSTDISCONNECT (1 << 0)
89 #define CARKIT_CTRL 0x19
90 #define CARKIT_CTRL_SET 0x1A
91 #define CARKIT_CTRL_CLR 0x1B
92 #define CARKIT_CTRL_MICEN (1 << 6)
93 #define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
94 #define CARKIT_CTRL_SPKLEFTEN (1 << 4)
95 #define CARKIT_CTRL_RXDEN (1 << 3)
96 #define CARKIT_CTRL_TXDEN (1 << 2)
97 #define CARKIT_CTRL_IDGNDDRV (1 << 1)
98 #define CARKIT_CTRL_CARKITPWR (1 << 0)
99 #define CARKIT_PLS_CTRL 0x22
100 #define CARKIT_PLS_CTRL_SET 0x23
101 #define CARKIT_PLS_CTRL_CLR 0x24
102 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
103 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
104 #define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
105 #define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
107 #define MCPC_CTRL 0x30
108 #define MCPC_CTRL_SET 0x31
109 #define MCPC_CTRL_CLR 0x32
110 #define MCPC_CTRL_RTSOL (1 << 7)
111 #define MCPC_CTRL_EXTSWR (1 << 6)
112 #define MCPC_CTRL_EXTSWC (1 << 5)
113 #define MCPC_CTRL_VOICESW (1 << 4)
114 #define MCPC_CTRL_OUT64K (1 << 3)
115 #define MCPC_CTRL_RTSCTSSW (1 << 2)
116 #define MCPC_CTRL_HS_UART (1 << 0)
118 #define MCPC_IO_CTRL 0x33
119 #define MCPC_IO_CTRL_SET 0x34
120 #define MCPC_IO_CTRL_CLR 0x35
121 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
122 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
123 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
124 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
125 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
126 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
128 #define MCPC_CTRL2 0x36
129 #define MCPC_CTRL2_SET 0x37
130 #define MCPC_CTRL2_CLR 0x38
131 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
133 #define OTHER_FUNC_CTRL 0x80
134 #define OTHER_FUNC_CTRL_SET 0x81
135 #define OTHER_FUNC_CTRL_CLR 0x82
136 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
137 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
139 #define OTHER_IFC_CTRL 0x83
140 #define OTHER_IFC_CTRL_SET 0x84
141 #define OTHER_IFC_CTRL_CLR 0x85
142 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
143 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
144 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
145 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
146 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
147 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
149 #define OTHER_INT_EN_RISE 0x86
150 #define OTHER_INT_EN_RISE_SET 0x87
151 #define OTHER_INT_EN_RISE_CLR 0x88
152 #define OTHER_INT_EN_FALL 0x89
153 #define OTHER_INT_EN_FALL_SET 0x8A
154 #define OTHER_INT_EN_FALL_CLR 0x8B
155 #define OTHER_INT_STS 0x8C
156 #define OTHER_INT_LATCH 0x8D
157 #define OTHER_INT_VB_SESS_VLD (1 << 7)
158 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
159 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
160 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
161 #define OTHER_INT_MANU (1 << 1)
162 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
164 #define ID_STATUS 0x96
165 #define ID_RES_FLOAT (1 << 4)
166 #define ID_RES_440K (1 << 3)
167 #define ID_RES_200K (1 << 2)
168 #define ID_RES_102K (1 << 1)
169 #define ID_RES_GND (1 << 0)
171 #define POWER_CTRL 0xAC
172 #define POWER_CTRL_SET 0xAD
173 #define POWER_CTRL_CLR 0xAE
174 #define POWER_CTRL_OTG_ENAB (1 << 5)
176 #define OTHER_IFC_CTRL2 0xAF
177 #define OTHER_IFC_CTRL2_SET 0xB0
178 #define OTHER_IFC_CTRL2_CLR 0xB1
179 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
180 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
181 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
182 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
183 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
184 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
186 #define REG_CTRL_EN 0xB2
187 #define REG_CTRL_EN_SET 0xB3
188 #define REG_CTRL_EN_CLR 0xB4
189 #define REG_CTRL_ERROR 0xB5
190 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
192 #define OTHER_FUNC_CTRL2 0xB8
193 #define OTHER_FUNC_CTRL2_SET 0xB9
194 #define OTHER_FUNC_CTRL2_CLR 0xBA
195 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
197 /* following registers do not have separate _clr and _set registers */
198 #define VBUS_DEBOUNCE 0xC0
199 #define ID_DEBOUNCE 0xC1
200 #define VBAT_TIMER 0xD3
201 #define PHY_PWR_CTRL 0xFD
202 #define PHY_PWR_PHYPWD (1 << 0)
203 #define PHY_CLK_CTRL 0xFE
204 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
205 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
206 #define REQ_PHY_DPLL_CLK (1 << 0)
207 #define PHY_CLK_CTRL_STS 0xFF
208 #define PHY_DPLL_CLK (1 << 0)
210 /* In module TWL4030_MODULE_PM_MASTER */
211 #define PROTECT_KEY 0x0E
213 /* In module TWL4030_MODULE_PM_RECEIVER */
214 #define VUSB_DEDICATED1 0x7D
215 #define VUSB_DEDICATED2 0x7E
216 #define VUSB1V5_DEV_GRP 0x71
217 #define VUSB1V5_TYPE 0x72
218 #define VUSB1V5_REMAP 0x73
219 #define VUSB1V8_DEV_GRP 0x74
220 #define VUSB1V8_TYPE 0x75
221 #define VUSB1V8_REMAP 0x76
222 #define VUSB3V1_DEV_GRP 0x77
223 #define VUSB3V1_TYPE 0x78
224 #define VUSB3V1_REMAP 0x79
226 #define ID_STATUS 0x96
227 #define ID_RES_FLOAT (1 << 4) /* mini-B */
228 #define ID_RES_440K (1 << 3) /* type 2 charger */
229 #define ID_RES_200K (1 << 2) /* 5-wire carkit or
231 #define ID_RES_102K (1 << 1) /* phone */
232 #define ID_RES_GND (1 << 0) /* mini-A */
234 /* In module TWL4030_MODULE_INTBR */
236 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
238 /* In module TWL4030_MODULE_INT */
239 #define REG_PWR_ISR1 0x00
240 #define REG_PWR_IMR1 0x01
241 #define USB_PRES (1 << 2)
242 #define REG_PWR_EDR1 0x05
243 #define USB_PRES_FALLING (1 << 4)
244 #define USB_PRES_RISING (1 << 5)
245 #define REG_PWR_SIH_CTRL 0x07
248 /*-------------------------------------------------------------------------*/
252 u8 usb_mode; /* pin configuration */
253 #define T2_USB_MODE_ULPI 1
254 /* #define T2_USB_MODE_CEA2011_3PIN 2 */
258 static struct twl4030_usb *the_transceiver;
260 /*-------------------------------------------------------------------------*/
262 static int twl4030_i2c_write_u8_verify(u8 module, u8 data, u8 address)
266 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
267 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
270 /* Failed once: Try again */
271 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
272 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
275 /* Failed again: Return error */
279 #define twl4030_usb_write_verify(address, data) \
280 twl4030_i2c_write_u8_verify(TWL4030_MODULE_USB, (data), (address))
282 static inline int twl4030_usb_write(u8 address, u8 data)
285 ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
289 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
291 printk(KERN_ERR "re-read failed\n");
294 "Write %s wrote %x read %x from reg %x\n",
295 (data1 == data) ? "succeed" : "mismatch",
296 data, data1, address);
300 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
305 static inline int twl4030_usb_read(u8 address)
309 ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
314 "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
319 /*-------------------------------------------------------------------------*/
322 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
324 return twl4030_usb_write(reg + 1, bits);
328 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
330 return twl4030_usb_write(reg + 2, bits);
333 /*-------------------------------------------------------------------------*/
335 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
337 twl->usb_mode = mode;
340 case T2_USB_MODE_ULPI:
341 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
342 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
343 twl4030_usb_clear_bits(twl, FUNC_CTRL,
344 FUNC_CTRL_XCVRSELECT_MASK |
345 FUNC_CTRL_OPMODE_MASK);
348 case T2_USB_MODE_CEA2011_3PIN:
349 twl4030_cea2011_3_pin_FS_setup(twl);
353 /* FIXME: power on defaults */
358 #ifdef CONFIG_TWL4030_USB_HS_ULPI
359 static void hs_usb_init(struct twl4030_usb *twl)
361 twl->usb_mode = T2_USB_MODE_ULPI;
367 static void twl4030_i2c_access(int on)
369 unsigned long timeout;
370 int val = twl4030_usb_read(PHY_CLK_CTRL);
374 /* enable DPLL to access PHY registers over I2C */
375 val |= REQ_PHY_DPLL_CLK;
376 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
378 printk(KERN_ERR "twl4030_usb: i2c write failed,"
379 " line %d\n", __LINE__);
383 timeout = jiffies + HZ;
384 while (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
386 && time_before(jiffies, timeout))
388 if (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
390 printk(KERN_ERR "Timeout setting T2 HSUSB "
393 /* let ULPI control the DPLL clock */
394 val &= ~REQ_PHY_DPLL_CLK;
395 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
397 printk(KERN_ERR "twl4030_usb: i2c write failed,"
398 " line %d\n", __LINE__);
405 static void usb_irq_enable(int rising, int falling)
410 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
411 printk(KERN_ERR "twl4030_usb: i2c read failed,"
412 " line %d\n", __LINE__);
415 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
417 val = val | USB_PRES_RISING;
419 val = val | USB_PRES_FALLING;
420 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
422 printk(KERN_ERR "twl4030_usb: i2c write failed,"
423 " line %d\n", __LINE__);
427 /* un-mask interrupt */
428 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
429 printk(KERN_ERR "twl4030_usb: i2c read failed,"
430 " line %d\n", __LINE__);
434 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
436 printk(KERN_ERR "twl4030_usb: i2c write failed,"
437 " line %d\n", __LINE__);
442 static void usb_irq_disable(void)
446 /* undo edge setup */
447 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
448 printk(KERN_ERR "twl4030_usb: i2c read failed,"
449 " line %d\n", __LINE__);
452 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
453 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
455 printk(KERN_ERR "twl4030_usb: i2c write failed,"
456 " line %d\n", __LINE__);
461 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
462 printk(KERN_ERR "twl4030_usb: i2c read failed,"
463 " line %d\n", __LINE__);
467 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
469 printk(KERN_ERR "twl4030_usb: i2c write failed,"
470 " line %d\n", __LINE__);
475 void twl4030_phy_suspend(int controller_off);
476 void twl4030_phy_resume(void);
478 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
483 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_ISR1) < 0) {
484 printk(KERN_ERR "twl4030_usb: i2c read failed,"
485 " line %d\n", __LINE__);
489 /* this interrupt line may be shared */
490 if (!(val & USB_PRES))
493 /* clear the interrupt */
494 twl4030_i2c_write_u8(TWL4030_MODULE_INT, USB_PRES, REG_PWR_ISR1);
496 /* action based on cable attach or detach */
497 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
498 printk(KERN_ERR "twl4030_usb: i2c read failed,"
499 " line %d\n", __LINE__);
503 if (val & USB_PRES_RISING)
504 twl4030_phy_resume();
506 twl4030_phy_suspend(0);
514 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
518 pwr = twl4030_usb_read(PHY_PWR_CTRL);
520 pwr &= ~PHY_PWR_PHYPWD;
521 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
522 printk(KERN_ERR "twl4030_usb: i2c write failed,"
523 " line %d\n", __LINE__);
526 twl4030_usb_write(PHY_CLK_CTRL,
527 twl4030_usb_read(PHY_CLK_CTRL) |
528 (PHY_CLK_CTRL_CLOCKGATING_EN |
529 PHY_CLK_CTRL_CLK32K_EN));
531 pwr |= PHY_PWR_PHYPWD;
532 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
533 printk(KERN_ERR "twl4030_usb: i2c write failed,"
534 " line %d\n", __LINE__);
540 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
542 /* Enable writing to power configuration registers */
543 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
544 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
546 /* put VUSB3V1 LDO in active state */
547 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
549 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
550 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
552 /* turn on 3.1V regulator */
553 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
554 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
556 /* turn on 1.5V regulator */
557 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
558 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
560 /* turn on 1.8V regulator */
561 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
562 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
564 /* disable access to power configuration registers */
565 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, PROTECT_KEY);
568 void twl4030_phy_suspend(int controller_off)
570 struct twl4030_usb *twl = the_transceiver;
579 /* enable rising edge interrupt to detect cable attach */
580 usb_irq_enable(1, 0);
582 twl4030_phy_power(twl, 0);
586 EXPORT_SYMBOL(twl4030_phy_suspend);
589 void twl4030_phy_resume(void)
591 struct twl4030_usb *twl = the_transceiver;
596 /* enable falling edge interrupt to detect cable detach */
597 usb_irq_enable(0, 1);
599 twl4030_phy_power(twl, 1);
600 twl4030_i2c_access(1);
601 twl4030_usb_set_mode(twl, twl->usb_mode);
602 if (twl->usb_mode == T2_USB_MODE_ULPI)
603 twl4030_i2c_access(0);
607 EXPORT_SYMBOL(twl4030_phy_resume);
610 static int __init twl4030_usb_init(void)
612 struct twl4030_usb *twl;
618 twl = kzalloc(sizeof *twl, GFP_KERNEL);
622 the_transceiver = twl;
624 twl->irq = TWL4030_MODIRQ_PWR;
627 status = request_irq(twl->irq, twl4030_usb_irq,
628 IRQF_DISABLED | IRQF_SHARED, "twl4030_usb", twl);
630 printk(KERN_DEBUG "can't get IRQ %d, err %d\n",
636 #if defined(CONFIG_TWL4030_USB_HS_ULPI)
639 twl4030_usb_ldo_init(twl);
640 twl4030_phy_power(twl, 1);
641 twl4030_i2c_access(1);
642 twl4030_usb_set_mode(twl, twl->usb_mode);
643 if (twl->usb_mode == T2_USB_MODE_ULPI)
644 twl4030_i2c_access(0);
648 if (twl->usb_mode == T2_USB_MODE_ULPI)
649 twl4030_phy_suspend(1);
651 printk(KERN_INFO "Initialized TWL4030 USB module");
657 static void __exit twl4030_usb_exit(void)
659 struct twl4030_usb *twl = the_transceiver;
663 free_irq(twl->irq, twl);
665 /* set transceiver mode to power on defaults */
666 twl4030_usb_set_mode(twl, -1);
668 /* autogate 60MHz ULPI clock,
669 * clear dpll clock request for i2c access,
672 val = twl4030_usb_read(PHY_CLK_CTRL);
674 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
675 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
676 twl4030_usb_write(PHY_CLK_CTRL, (u8)val);
679 /* disable complete OTG block */
680 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
682 twl4030_phy_power(twl, 0);
687 subsys_initcall(twl4030_usb_init);
688 module_exit(twl4030_usb_exit);
690 MODULE_AUTHOR("Texas Instruments, Inc.");
691 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
692 MODULE_LICENSE("GPL");