2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4 * Copyright (C) 2004-2007 Texas Instruments
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * - HS USB ULPI mode works.
22 * - 3-pin mode support may be added in future.
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/time.h>
29 #include <linux/interrupt.h>
30 #include <linux/usb.h>
32 #include <linux/i2c/twl4030.h>
34 /* Register defines */
36 #define VENDOR_ID_LO 0x00
37 #define VENDOR_ID_HI 0x01
38 #define PRODUCT_ID_LO 0x02
39 #define PRODUCT_ID_HI 0x03
41 #define FUNC_CTRL 0x04
42 #define FUNC_CTRL_SET 0x05
43 #define FUNC_CTRL_CLR 0x06
44 #define FUNC_CTRL_SUSPENDM (1 << 6)
45 #define FUNC_CTRL_RESET (1 << 5)
46 #define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
47 #define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
48 #define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
49 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
50 #define FUNC_CTRL_TERMSELECT (1 << 2)
51 #define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
52 #define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
53 #define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
54 #define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
55 #define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
58 #define IFC_CTRL_SET 0x08
59 #define IFC_CTRL_CLR 0x09
60 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
61 #define IFC_CTRL_AUTORESUME (1 << 4)
62 #define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
63 #define IFC_CTRL_CARKITMODE (1 << 2)
64 #define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
67 #define OTG_CTRL_SET 0x0B
68 #define OTG_CTRL_CLR 0x0C
69 #define OTG_CTRL_DRVVBUS (1 << 5)
70 #define OTG_CTRL_CHRGVBUS (1 << 4)
71 #define OTG_CTRL_DISCHRGVBUS (1 << 3)
72 #define OTG_CTRL_DMPULLDOWN (1 << 2)
73 #define OTG_CTRL_DPPULLDOWN (1 << 1)
74 #define OTG_CTRL_IDPULLUP (1 << 0)
76 #define USB_INT_EN_RISE 0x0D
77 #define USB_INT_EN_RISE_SET 0x0E
78 #define USB_INT_EN_RISE_CLR 0x0F
79 #define USB_INT_EN_FALL 0x10
80 #define USB_INT_EN_FALL_SET 0x11
81 #define USB_INT_EN_FALL_CLR 0x12
82 #define USB_INT_STS 0x13
83 #define USB_INT_LATCH 0x14
84 #define USB_INT_IDGND (1 << 4)
85 #define USB_INT_SESSEND (1 << 3)
86 #define USB_INT_SESSVALID (1 << 2)
87 #define USB_INT_VBUSVALID (1 << 1)
88 #define USB_INT_HOSTDISCONNECT (1 << 0)
90 #define CARKIT_CTRL 0x19
91 #define CARKIT_CTRL_SET 0x1A
92 #define CARKIT_CTRL_CLR 0x1B
93 #define CARKIT_CTRL_MICEN (1 << 6)
94 #define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
95 #define CARKIT_CTRL_SPKLEFTEN (1 << 4)
96 #define CARKIT_CTRL_RXDEN (1 << 3)
97 #define CARKIT_CTRL_TXDEN (1 << 2)
98 #define CARKIT_CTRL_IDGNDDRV (1 << 1)
99 #define CARKIT_CTRL_CARKITPWR (1 << 0)
100 #define CARKIT_PLS_CTRL 0x22
101 #define CARKIT_PLS_CTRL_SET 0x23
102 #define CARKIT_PLS_CTRL_CLR 0x24
103 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
104 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
105 #define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
106 #define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
108 #define MCPC_CTRL 0x30
109 #define MCPC_CTRL_SET 0x31
110 #define MCPC_CTRL_CLR 0x32
111 #define MCPC_CTRL_RTSOL (1 << 7)
112 #define MCPC_CTRL_EXTSWR (1 << 6)
113 #define MCPC_CTRL_EXTSWC (1 << 5)
114 #define MCPC_CTRL_VOICESW (1 << 4)
115 #define MCPC_CTRL_OUT64K (1 << 3)
116 #define MCPC_CTRL_RTSCTSSW (1 << 2)
117 #define MCPC_CTRL_HS_UART (1 << 0)
119 #define MCPC_IO_CTRL 0x33
120 #define MCPC_IO_CTRL_SET 0x34
121 #define MCPC_IO_CTRL_CLR 0x35
122 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
123 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
124 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
125 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
126 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
127 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
129 #define MCPC_CTRL2 0x36
130 #define MCPC_CTRL2_SET 0x37
131 #define MCPC_CTRL2_CLR 0x38
132 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
134 #define OTHER_FUNC_CTRL 0x80
135 #define OTHER_FUNC_CTRL_SET 0x81
136 #define OTHER_FUNC_CTRL_CLR 0x82
137 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
138 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
140 #define OTHER_IFC_CTRL 0x83
141 #define OTHER_IFC_CTRL_SET 0x84
142 #define OTHER_IFC_CTRL_CLR 0x85
143 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
144 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
145 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
146 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
147 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
148 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
150 #define OTHER_INT_EN_RISE 0x86
151 #define OTHER_INT_EN_RISE_SET 0x87
152 #define OTHER_INT_EN_RISE_CLR 0x88
153 #define OTHER_INT_EN_FALL 0x89
154 #define OTHER_INT_EN_FALL_SET 0x8A
155 #define OTHER_INT_EN_FALL_CLR 0x8B
156 #define OTHER_INT_STS 0x8C
157 #define OTHER_INT_LATCH 0x8D
158 #define OTHER_INT_VB_SESS_VLD (1 << 7)
159 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
160 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
161 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
162 #define OTHER_INT_MANU (1 << 1)
163 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
165 #define ID_STATUS 0x96
166 #define ID_RES_FLOAT (1 << 4)
167 #define ID_RES_440K (1 << 3)
168 #define ID_RES_200K (1 << 2)
169 #define ID_RES_102K (1 << 1)
170 #define ID_RES_GND (1 << 0)
172 #define POWER_CTRL 0xAC
173 #define POWER_CTRL_SET 0xAD
174 #define POWER_CTRL_CLR 0xAE
175 #define POWER_CTRL_OTG_ENAB (1 << 5)
177 #define OTHER_IFC_CTRL2 0xAF
178 #define OTHER_IFC_CTRL2_SET 0xB0
179 #define OTHER_IFC_CTRL2_CLR 0xB1
180 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
181 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
182 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
183 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
184 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
185 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
187 #define REG_CTRL_EN 0xB2
188 #define REG_CTRL_EN_SET 0xB3
189 #define REG_CTRL_EN_CLR 0xB4
190 #define REG_CTRL_ERROR 0xB5
191 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
193 #define OTHER_FUNC_CTRL2 0xB8
194 #define OTHER_FUNC_CTRL2_SET 0xB9
195 #define OTHER_FUNC_CTRL2_CLR 0xBA
196 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
198 /* following registers do not have separate _clr and _set registers */
199 #define VBUS_DEBOUNCE 0xC0
200 #define ID_DEBOUNCE 0xC1
201 #define VBAT_TIMER 0xD3
202 #define PHY_PWR_CTRL 0xFD
203 #define PHY_PWR_PHYPWD (1 << 0)
204 #define PHY_CLK_CTRL 0xFE
205 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
206 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
207 #define REQ_PHY_DPLL_CLK (1 << 0)
208 #define PHY_CLK_CTRL_STS 0xFF
209 #define PHY_DPLL_CLK (1 << 0)
211 /* In module TWL4030_MODULE_PM_MASTER */
212 #define PROTECT_KEY 0x0E
214 /* In module TWL4030_MODULE_PM_RECEIVER */
215 #define VUSB_DEDICATED1 0x7D
216 #define VUSB_DEDICATED2 0x7E
217 #define VUSB1V5_DEV_GRP 0x71
218 #define VUSB1V5_TYPE 0x72
219 #define VUSB1V5_REMAP 0x73
220 #define VUSB1V8_DEV_GRP 0x74
221 #define VUSB1V8_TYPE 0x75
222 #define VUSB1V8_REMAP 0x76
223 #define VUSB3V1_DEV_GRP 0x77
224 #define VUSB3V1_TYPE 0x78
225 #define VUSB3V1_REMAP 0x79
227 #define ID_STATUS 0x96
228 #define ID_RES_FLOAT (1 << 4) /* mini-B */
229 #define ID_RES_440K (1 << 3) /* type 2 charger */
230 #define ID_RES_200K (1 << 2) /* 5-wire carkit or
232 #define ID_RES_102K (1 << 1) /* phone */
233 #define ID_RES_GND (1 << 0) /* mini-A */
235 /* In module TWL4030_MODULE_INTBR */
237 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
239 /* In module TWL4030_MODULE_INT */
240 #define REG_PWR_ISR1 0x00
241 #define REG_PWR_IMR1 0x01
242 #define USB_PRES (1 << 2)
243 #define REG_PWR_EDR1 0x05
244 #define USB_PRES_FALLING (1 << 4)
245 #define USB_PRES_RISING (1 << 5)
246 #define REG_PWR_SIH_CTRL 0x07
249 /*-------------------------------------------------------------------------*/
251 static int twl4030_i2c_write_u8_verify(u8 module, u8 data, u8 address)
255 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
256 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
259 /* Failed once: Try again */
260 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
261 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
264 /* Failed again: Return error */
268 #define twl4030_usb_write_verify(address, data) \
269 twl4030_i2c_write_u8_verify(TWL4030_MODULE_USB, (data), (address))
271 static inline int twl4030_usb_write(u8 address, u8 data)
274 ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
278 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
280 printk(KERN_ERR "re-read failed\n");
283 "Write %s wrote %x read %x from reg %x\n",
284 (data1 == data) ? "succeed" : "mismatch",
285 data, data1, address);
289 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
294 static inline int twl4030_usb_read(u8 address)
298 ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
303 "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
308 /*-------------------------------------------------------------------------*/
312 u8 usb_mode; /* pin configuration */
313 #define T2_USB_MODE_ULPI 1
314 /* #define T2_USB_MODE_CEA2011_3PIN 2 */
318 static struct twl4030_usb *the_transceiver;
320 /*-------------------------------------------------------------------------*/
323 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
325 return twl4030_usb_write(reg + 1, bits);
329 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
331 return twl4030_usb_write(reg + 2, bits);
334 /*-------------------------------------------------------------------------*/
336 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
338 twl->usb_mode = mode;
341 case T2_USB_MODE_ULPI:
342 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
343 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
344 twl4030_usb_clear_bits(twl, FUNC_CTRL,
345 FUNC_CTRL_XCVRSELECT_MASK |
346 FUNC_CTRL_OPMODE_MASK);
349 case T2_USB_MODE_CEA2011_3PIN:
350 twl4030_cea2011_3_pin_FS_setup(twl);
354 /* FIXME: power on defaults */
359 #ifdef CONFIG_TWL4030_USB_HS_ULPI
360 static void hs_usb_init(struct twl4030_usb *twl)
362 twl->usb_mode = T2_USB_MODE_ULPI;
368 static void twl4030_i2c_access(int on)
370 unsigned long timeout;
371 int val = twl4030_usb_read(PHY_CLK_CTRL);
375 /* enable DPLL to access PHY registers over I2C */
376 val |= REQ_PHY_DPLL_CLK;
377 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
379 printk(KERN_ERR "twl4030_usb: i2c write failed,"
380 " line %d\n", __LINE__);
384 timeout = jiffies + HZ;
385 while (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
387 && time_before(jiffies, timeout))
389 if (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
391 printk(KERN_ERR "Timeout setting T2 HSUSB "
394 /* let ULPI control the DPLL clock */
395 val &= ~REQ_PHY_DPLL_CLK;
396 if (twl4030_usb_write_verify(PHY_CLK_CTRL,
398 printk(KERN_ERR "twl4030_usb: i2c write failed,"
399 " line %d\n", __LINE__);
406 static void usb_irq_enable(int rising, int falling)
411 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
412 printk(KERN_ERR "twl4030_usb: i2c read failed,"
413 " line %d\n", __LINE__);
416 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
418 val = val | USB_PRES_RISING;
420 val = val | USB_PRES_FALLING;
421 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
423 printk(KERN_ERR "twl4030_usb: i2c write failed,"
424 " line %d\n", __LINE__);
428 /* un-mask interrupt */
429 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
430 printk(KERN_ERR "twl4030_usb: i2c read failed,"
431 " line %d\n", __LINE__);
435 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
437 printk(KERN_ERR "twl4030_usb: i2c write failed,"
438 " line %d\n", __LINE__);
443 static void usb_irq_disable(void)
447 /* undo edge setup */
448 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
449 printk(KERN_ERR "twl4030_usb: i2c read failed,"
450 " line %d\n", __LINE__);
453 val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
454 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
456 printk(KERN_ERR "twl4030_usb: i2c write failed,"
457 " line %d\n", __LINE__);
462 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
463 printk(KERN_ERR "twl4030_usb: i2c read failed,"
464 " line %d\n", __LINE__);
468 if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
470 printk(KERN_ERR "twl4030_usb: i2c write failed,"
471 " line %d\n", __LINE__);
476 void twl4030_phy_suspend(int controller_off);
477 void twl4030_phy_resume(void);
479 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
484 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_ISR1) < 0) {
485 printk(KERN_ERR "twl4030_usb: i2c read failed,"
486 " line %d\n", __LINE__);
490 /* this interrupt line may be shared */
491 if (!(val & USB_PRES))
494 /* clear the interrupt */
495 twl4030_i2c_write_u8(TWL4030_MODULE_INT, USB_PRES, REG_PWR_ISR1);
497 /* action based on cable attach or detach */
498 if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
499 printk(KERN_ERR "twl4030_usb: i2c read failed,"
500 " line %d\n", __LINE__);
504 if (val & USB_PRES_RISING)
505 twl4030_phy_resume();
507 twl4030_phy_suspend(0);
515 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
519 pwr = twl4030_usb_read(PHY_PWR_CTRL);
521 pwr &= ~PHY_PWR_PHYPWD;
522 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
523 printk(KERN_ERR "twl4030_usb: i2c write failed,"
524 " line %d\n", __LINE__);
527 twl4030_usb_write(PHY_CLK_CTRL,
528 twl4030_usb_read(PHY_CLK_CTRL) |
529 (PHY_CLK_CTRL_CLOCKGATING_EN |
530 PHY_CLK_CTRL_CLK32K_EN));
532 pwr |= PHY_PWR_PHYPWD;
533 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
534 printk(KERN_ERR "twl4030_usb: i2c write failed,"
535 " line %d\n", __LINE__);
541 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
543 /* Enable writing to power configuration registers */
544 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
545 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
547 /* put VUSB3V1 LDO in active state */
548 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
550 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
551 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
553 /* turn on 3.1V regulator */
554 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
555 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
557 /* turn on 1.5V regulator */
558 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
559 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
561 /* turn on 1.8V regulator */
562 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
563 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
565 /* disable access to power configuration registers */
566 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, PROTECT_KEY);
569 void twl4030_phy_suspend(int controller_off)
571 struct twl4030_usb *twl = the_transceiver;
580 /* enable rising edge interrupt to detect cable attach */
581 usb_irq_enable(1, 0);
583 twl4030_phy_power(twl, 0);
587 EXPORT_SYMBOL(twl4030_phy_suspend);
590 void twl4030_phy_resume(void)
592 struct twl4030_usb *twl = the_transceiver;
597 /* enable falling edge interrupt to detect cable detach */
598 usb_irq_enable(0, 1);
600 twl4030_phy_power(twl, 1);
601 twl4030_i2c_access(1);
602 twl4030_usb_set_mode(twl, twl->usb_mode);
603 if (twl->usb_mode == T2_USB_MODE_ULPI)
604 twl4030_i2c_access(0);
608 EXPORT_SYMBOL(twl4030_phy_resume);
611 static int __init twl4030_usb_init(void)
613 struct twl4030_usb *twl;
619 twl = kcalloc(1, sizeof *twl, GFP_KERNEL);
623 the_transceiver = twl;
625 twl->irq = TWL4030_MODIRQ_PWR;
628 status = request_irq(twl->irq, twl4030_usb_irq,
629 IRQF_DISABLED | IRQF_SHARED, "twl4030_usb", twl);
631 printk(KERN_DEBUG "can't get IRQ %d, err %d\n",
637 #if defined(CONFIG_TWL4030_USB_HS_ULPI)
640 twl4030_usb_ldo_init(twl);
641 twl4030_phy_power(twl, 1);
642 twl4030_i2c_access(1);
643 twl4030_usb_set_mode(twl, twl->usb_mode);
644 if (twl->usb_mode == T2_USB_MODE_ULPI)
645 twl4030_i2c_access(0);
649 if (twl->usb_mode == T2_USB_MODE_ULPI)
650 twl4030_phy_suspend(1);
652 printk(KERN_INFO "Initialized TWL4030 USB module");
658 static void __exit twl4030_usb_exit(void)
660 struct twl4030_usb *twl = the_transceiver;
664 free_irq(twl->irq, twl);
666 /* set transceiver mode to power on defaults */
667 twl4030_usb_set_mode(twl, -1);
669 /* autogate 60MHz ULPI clock,
670 * clear dpll clock request for i2c access,
673 val = twl4030_usb_read(PHY_CLK_CTRL);
675 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
676 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
677 twl4030_usb_write(PHY_CLK_CTRL, (u8)val);
680 /* disable complete OTG block */
681 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
683 twl4030_phy_power(twl, 0);
688 subsys_initcall(twl4030_usb_init);
689 module_exit(twl4030_usb_exit);
691 MODULE_AUTHOR("Texas Instruments, Inc.");
692 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
693 MODULE_LICENSE("GPL");