drivers/i2c/chips/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  * Current status:
  21  *      - HS USB ULPI mode works.
  22  *      - 3-pin mode support may be added in future.
  23  */
  24
  25
  26 #include <linux/module.h>
  27 #include <linux/init.h>
  28 #include <linux/time.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/io.h>
  31 #include <linux/usb.h>
  32 #include <linux/usb/ch9.h>
  33 #include <linux/usb/gadget.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/i2c/twl4030.h>
  36 #include <asm/arch/usb.h>
  37
  38 /* Register defines */
  39
  40 #define VENDOR_ID_LO                    0x00
  41 #define VENDOR_ID_HI                    0x01
  42 #define PRODUCT_ID_LO                   0x02
  43 #define PRODUCT_ID_HI                   0x03
  44
  45 #define FUNC_CTRL                       0x04
  46 #define FUNC_CTRL_SET                   0x05
  47 #define FUNC_CTRL_CLR                   0x06
  48 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  49 #define FUNC_CTRL_RESET                 (1 << 5)
  50 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  51 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  52 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  53 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  54 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  55 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  56 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  57 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  58 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  59 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  60
  61 #define IFC_CTRL                        0x07
  62 #define IFC_CTRL_SET                    0x08
  63 #define IFC_CTRL_CLR                    0x09
  64 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  65 #define IFC_CTRL_AUTORESUME             (1 << 4)
  66 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  67 #define IFC_CTRL_CARKITMODE             (1 << 2)
  68 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  69
  70 #define TWL4030_OTG_CTRL                0x0A
  71 #define TWL4030_OTG_CTRL_SET            0x0B
  72 #define TWL4030_OTG_CTRL_CLR            0x0C
  73 #define TWL4030_OTG_CTRL_DRVVBUS        (1 << 5)
  74 #define TWL4030_OTG_CTRL_CHRGVBUS       (1 << 4)
  75 #define TWL4030_OTG_CTRL_DISCHRGVBUS    (1 << 3)
  76 #define TWL4030_OTG_CTRL_DMPULLDOWN     (1 << 2)
  77 #define TWL4030_OTG_CTRL_DPPULLDOWN     (1 << 1)
  78 #define TWL4030_OTG_CTRL_IDPULLUP       (1 << 0)
  79
  80 #define USB_INT_EN_RISE                 0x0D
  81 #define USB_INT_EN_RISE_SET             0x0E
  82 #define USB_INT_EN_RISE_CLR             0x0F
  83 #define USB_INT_EN_FALL                 0x10
  84 #define USB_INT_EN_FALL_SET             0x11
  85 #define USB_INT_EN_FALL_CLR             0x12
  86 #define USB_INT_STS                     0x13
  87 #define USB_INT_LATCH                   0x14
  88 #define USB_INT_IDGND                   (1 << 4)
  89 #define USB_INT_SESSEND                 (1 << 3)
  90 #define USB_INT_SESSVALID               (1 << 2)
  91 #define USB_INT_VBUSVALID               (1 << 1)
  92 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  93
  94 #define CARKIT_CTRL                     0x19
  95 #define CARKIT_CTRL_SET                 0x1A
  96 #define CARKIT_CTRL_CLR                 0x1B
  97 #define CARKIT_CTRL_MICEN               (1 << 6)
  98 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
  99 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
 100 #define CARKIT_CTRL_RXDEN               (1 << 3)
 101 #define CARKIT_CTRL_TXDEN               (1 << 2)
 102 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 103 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 104 #define CARKIT_PLS_CTRL                 0x22
 105 #define CARKIT_PLS_CTRL_SET             0x23
 106 #define CARKIT_PLS_CTRL_CLR             0x24
 107 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 108 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 109 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 110 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 111
 112 #define MCPC_CTRL                       0x30
 113 #define MCPC_CTRL_SET                   0x31
 114 #define MCPC_CTRL_CLR                   0x32
 115 #define MCPC_CTRL_RTSOL                 (1 << 7)
 116 #define MCPC_CTRL_EXTSWR                (1 << 6)
 117 #define MCPC_CTRL_EXTSWC                (1 << 5)
 118 #define MCPC_CTRL_VOICESW               (1 << 4)
 119 #define MCPC_CTRL_OUT64K                (1 << 3)
 120 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 121 #define MCPC_CTRL_HS_UART               (1 << 0)
 122
 123 #define MCPC_IO_CTRL                    0x33
 124 #define MCPC_IO_CTRL_SET                0x34
 125 #define MCPC_IO_CTRL_CLR                0x35
 126 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 127 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 128 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 129 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 130 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 131 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 132
 133 #define MCPC_CTRL2                      0x36
 134 #define MCPC_CTRL2_SET                  0x37
 135 #define MCPC_CTRL2_CLR                  0x38
 136 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 137
 138 #define OTHER_FUNC_CTRL                 0x80
 139 #define OTHER_FUNC_CTRL_SET             0x81
 140 #define OTHER_FUNC_CTRL_CLR             0x82
 141 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 142 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 143
 144 #define OTHER_IFC_CTRL                  0x83
 145 #define OTHER_IFC_CTRL_SET              0x84
 146 #define OTHER_IFC_CTRL_CLR              0x85
 147 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 148 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 149 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 150 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 151 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 152 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 153
 154 #define OTHER_INT_EN_RISE               0x86
 155 #define OTHER_INT_EN_RISE_SET           0x87
 156 #define OTHER_INT_EN_RISE_CLR           0x88
 157 #define OTHER_INT_EN_FALL               0x89
 158 #define OTHER_INT_EN_FALL_SET           0x8A
 159 #define OTHER_INT_EN_FALL_CLR           0x8B
 160 #define OTHER_INT_STS                   0x8C
 161 #define OTHER_INT_LATCH                 0x8D
 162 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 163 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 164 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 165 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 166 #define OTHER_INT_MANU                  (1 << 1)
 167 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 168
 169 #define ID_STATUS                       0x96
 170 #define ID_RES_FLOAT                    (1 << 4)
 171 #define ID_RES_440K                     (1 << 3)
 172 #define ID_RES_200K                     (1 << 2)
 173 #define ID_RES_102K                     (1 << 1)
 174 #define ID_RES_GND                      (1 << 0)
 175
 176 #define POWER_CTRL                      0xAC
 177 #define POWER_CTRL_SET                  0xAD
 178 #define POWER_CTRL_CLR                  0xAE
 179 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 180
 181 #define OTHER_IFC_CTRL2                 0xAF
 182 #define OTHER_IFC_CTRL2_SET             0xB0
 183 #define OTHER_IFC_CTRL2_CLR             0xB1
 184 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 185 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 186 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 187 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 188 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 189 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 190
 191 #define REG_CTRL_EN                     0xB2
 192 #define REG_CTRL_EN_SET                 0xB3
 193 #define REG_CTRL_EN_CLR                 0xB4
 194 #define REG_CTRL_ERROR                  0xB5
 195 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 196
 197 #define OTHER_FUNC_CTRL2                0xB8
 198 #define OTHER_FUNC_CTRL2_SET            0xB9
 199 #define OTHER_FUNC_CTRL2_CLR            0xBA
 200 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 201
 202 /* following registers do not have separate _clr and _set registers */
 203 #define VBUS_DEBOUNCE                   0xC0
 204 #define ID_DEBOUNCE                     0xC1
 205 #define VBAT_TIMER                      0xD3
 206 #define PHY_PWR_CTRL                    0xFD
 207 #define PHY_PWR_PHYPWD                  (1 << 0)
 208 #define PHY_CLK_CTRL                    0xFE
 209 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 210 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 211 #define REQ_PHY_DPLL_CLK                (1 << 0)
 212 #define PHY_CLK_CTRL_STS                0xFF
 213 #define PHY_DPLL_CLK                    (1 << 0)
 214
 215 /* In module TWL4030_MODULE_PM_MASTER */
 216 #define PROTECT_KEY                     0x0E
 217
 218 /* In module TWL4030_MODULE_PM_RECEIVER */
 219 #define VUSB_DEDICATED1                 0x7D
 220 #define VUSB_DEDICATED2                 0x7E
 221 #define VUSB1V5_DEV_GRP                 0x71
 222 #define VUSB1V5_TYPE                    0x72
 223 #define VUSB1V5_REMAP                   0x73
 224 #define VUSB1V8_DEV_GRP                 0x74
 225 #define VUSB1V8_TYPE                    0x75
 226 #define VUSB1V8_REMAP                   0x76
 227 #define VUSB3V1_DEV_GRP                 0x77
 228 #define VUSB3V1_TYPE                    0x78
 229 #define VUSB3V1_REMAP                   0x79
 230
 231 #define ID_STATUS                       0x96
 232 #define ID_RES_FLOAT                    (1 << 4) /* mini-B */
 233 #define ID_RES_440K                     (1 << 3) /* type 2 charger */
 234 #define ID_RES_200K                     (1 << 2) /* 5-wire carkit or
 235                                                     type 1 charger */
 236 #define ID_RES_102K                     (1 << 1) /* phone */
 237 #define ID_RES_GND                      (1 << 0) /* mini-A */
 238
 239 /* In module TWL4030_MODULE_INTBR */
 240 #define PMBR1                           0x0D
 241 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 242
 243 /* In module TWL4030_MODULE_INT */
 244 #define REG_PWR_ISR1                    0x00
 245 #define REG_PWR_IMR1                    0x01
 246 #define USB_PRES                        (1 << 2)
 247 #define REG_PWR_EDR1                    0x05
 248 #define USB_PRES_FALLING                (1 << 4)
 249 #define USB_PRES_RISING                 (1 << 5)
 250 #define REG_PWR_SIH_CTRL                0x07
 251 #define COR                             (1 << 2)
 252
 253 /* internal define on top of container_of */
 254 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 255
 256 /* bits in OTG_CTRL */
 257
 258 #define OTG_XCEIV_OUTPUTS \
 259         (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
 260 #define OTG_XCEIV_INPUTS \
 261         (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
 262 #define OTG_CTRL_BITS \
 263         (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
 264         /* and OTG_PULLUP is sometimes written */
 265
 266 #define OTG_CTRL_MASK   (OTG_DRIVER_SEL| \
 267         OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
 268         OTG_CTRL_BITS)
 269
 270
 271 /*-------------------------------------------------------------------------*/
 272
 273 struct twl4030_usb {
 274         struct otg_transceiver  otg;
 275         int                     irq;
 276         u8                      usb_mode;       /* pin configuration */
 277 #define T2_USB_MODE_ULPI                1
 278 /* #define T2_USB_MODE_CEA2011_3PIN     2 */
 279         u8                      asleep;
 280 };
 281
 282 static struct twl4030_usb *the_transceiver;
 283
 284 /*-------------------------------------------------------------------------*/
 285
 286 static int twl4030_i2c_write_u8_verify(u8 module, u8 data, u8 address)
 287 {
 288         u8 check;
 289
 290         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 291             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 292                                                 (check == data))
 293                 return 0;
 294         /* Failed once: Try again */
 295         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 296             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 297                                                 (check == data))
 298                 return 0;
 299         /* Failed again: Return error */
 300         return -EBUSY;
 301 }
 302
 303 #define twl4030_usb_write_verify(address, data) \
 304         twl4030_i2c_write_u8_verify(TWL4030_MODULE_USB, (data), (address))
 305
 306 static inline int twl4030_usb_write(u8 address, u8 data)
 307 {
 308         int ret = 0;
 309         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 310         if (ret >= 0) {
 311 #if 0   /* debug */
 312                 u8 data1;
 313                 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
 314                                         address) < 0)
 315                         printk(KERN_ERR "re-read failed\n");
 316                 else
 317                         printk(KERN_INFO
 318                                "Write %s wrote %x read %x from reg %x\n",
 319                                (data1 == data) ? "succeed" : "mismatch",
 320                                data, data1, address);
 321 #endif
 322         } else {
 323                 printk(KERN_WARNING
 324                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 325         }
 326         return ret;
 327 }
 328
 329 static inline int twl4030_usb_read(u8 address)
 330 {
 331         u8 data;
 332         int ret = 0;
 333         ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
 334         if (ret >= 0) {
 335                 ret = data;
 336         } else {
 337                 printk(KERN_WARNING
 338                         "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
 339         }
 340         return ret;
 341 }
 342
 343 /*-------------------------------------------------------------------------*/
 344
 345 static inline int
 346 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 347 {
 348         return twl4030_usb_write(reg + 1, bits);
 349 }
 350
 351 static inline int
 352 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 353 {
 354         return twl4030_usb_write(reg + 2, bits);
 355
 356 }
 357
 358 /*-------------------------------------------------------------------------*/
 359
 360 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 361 {
 362         twl->usb_mode = mode;
 363
 364         switch (mode) {
 365         case T2_USB_MODE_ULPI:
 366                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 367                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 368                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 369                                         FUNC_CTRL_XCVRSELECT_MASK |
 370                                         FUNC_CTRL_OPMODE_MASK);
 371                 break;
 372 /*
 373         case T2_USB_MODE_CEA2011_3PIN:
 374                 twl4030_cea2011_3_pin_FS_setup(twl);
 375                 break;
 376 */
 377         default:
 378                 /* FIXME: power on defaults */
 379                 break;
 380         };
 381 }
 382
 383 #ifdef CONFIG_TWL4030_USB_HS_ULPI
 384 static void hs_usb_init(struct twl4030_usb *twl)
 385 {
 386         twl->usb_mode = T2_USB_MODE_ULPI;
 387         return;
 388 }
 389
 390 #endif
 391
 392 static void twl4030_i2c_access(int on)
 393 {
 394         unsigned long timeout;
 395         int val = twl4030_usb_read(PHY_CLK_CTRL);
 396
 397         if (val >= 0) {
 398                 if (on) {
 399                         /* enable DPLL to access PHY registers over I2C */
 400                         val |= REQ_PHY_DPLL_CLK;
 401                         if (twl4030_usb_write_verify(PHY_CLK_CTRL,
 402                                                                 (u8)val) < 0) {
 403                                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 404                                                 " line %d\n", __LINE__);
 405                                 return;
 406                         }
 407
 408                         timeout = jiffies + HZ;
 409                         while (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
 410                                                         PHY_DPLL_CLK)
 411                                 && time_before(jiffies, timeout))
 412                                         udelay(10);
 413                         if (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
 414                                                         PHY_DPLL_CLK))
 415                                 printk(KERN_ERR "Timeout setting T2 HSUSB "
 416                                                 "PHY DPLL clock\n");
 417                 } else {
 418                         /* let ULPI control the DPLL clock */
 419                         val &= ~REQ_PHY_DPLL_CLK;
 420                         if (twl4030_usb_write_verify(PHY_CLK_CTRL,
 421                                                                 (u8)val) < 0) {
 422                                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 423                                                 " line %d\n", __LINE__);
 424                         }
 425                 }
 426         }
 427         return;
 428 }
 429
 430 static void usb_irq_enable(int rising, int falling)
 431 {
 432         u8 val;
 433
 434         /* edge setup */
 435         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
 436                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 437                                 " line %d\n", __LINE__);
 438                 return;
 439         }
 440         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 441         if (rising)
 442                 val = val | USB_PRES_RISING;
 443         if (falling)
 444                 val = val | USB_PRES_FALLING;
 445         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 446                                                         REG_PWR_EDR1) < 0) {
 447                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 448                                 " line %d\n", __LINE__);
 449                 return;
 450         }
 451
 452         /* un-mask interrupt */
 453         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
 454                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 455                                 " line %d\n", __LINE__);
 456                 return;
 457         }
 458         val &= ~USB_PRES;
 459         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 460                                                         REG_PWR_IMR1) < 0)
 461                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 462                                 " line %d\n", __LINE__);
 463
 464         return;
 465 }
 466
 467 static void usb_irq_disable(void)
 468 {
 469         u8 val;
 470
 471         /* undo edge setup */
 472         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
 473                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 474                                 " line %d\n", __LINE__);
 475                 return;
 476         }
 477         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 478         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 479                                                         REG_PWR_EDR1) < 0) {
 480                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 481                                 " line %d\n", __LINE__);
 482                 return;
 483         }
 484
 485         /* mask interrupt */
 486         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
 487                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 488                                 " line %d\n", __LINE__);
 489                 return;
 490         }
 491         val |= USB_PRES;
 492         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 493                                                         REG_PWR_IMR1) < 0)
 494                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 495                                 " line %d\n", __LINE__);
 496
 497         return;
 498 }
 499
 500 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 501 {
 502         u8 pwr;
 503
 504         pwr = twl4030_usb_read(PHY_PWR_CTRL);
 505         if (on) {
 506                 pwr &= ~PHY_PWR_PHYPWD;
 507                 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
 508                         printk(KERN_ERR "twl4030_usb: i2c write failed,"
 509                                         " line %d\n", __LINE__);
 510                         return;
 511                 }
 512                 twl4030_usb_write(PHY_CLK_CTRL,
 513                                   twl4030_usb_read(PHY_CLK_CTRL) |
 514                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 515                                                 PHY_CLK_CTRL_CLK32K_EN));
 516         } else  {
 517                 pwr |= PHY_PWR_PHYPWD;
 518                 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
 519                         printk(KERN_ERR "twl4030_usb: i2c write failed,"
 520                                         " line %d\n", __LINE__);
 521                 }
 522         }
 523         return;
 524 }
 525
 526 static void twl4030_phy_suspend(int controller_off)
 527 {
 528         struct twl4030_usb *twl = the_transceiver;
 529
 530         if (controller_off)
 531                 usb_irq_disable();
 532
 533         if (twl->asleep)
 534                 return;
 535
 536         if (!controller_off)
 537                 /* enable rising edge interrupt to detect cable attach */
 538                 usb_irq_enable(1, 0);
 539
 540         twl4030_phy_power(twl, 0);
 541         twl->asleep = 1;
 542         return;
 543 }
 544
 545 static void twl4030_phy_resume(void)
 546 {
 547         struct twl4030_usb *twl = the_transceiver;
 548
 549         if (!twl->asleep)
 550                 return;
 551
 552         /* enable falling edge interrupt to detect cable detach */
 553         usb_irq_enable(0, 1);
 554
 555         twl4030_phy_power(twl, 1);
 556         twl4030_i2c_access(1);
 557         twl4030_usb_set_mode(twl, twl->usb_mode);
 558         if (twl->usb_mode == T2_USB_MODE_ULPI)
 559                 twl4030_i2c_access(0);
 560         twl->asleep = 0;
 561         return;
 562 }
 563
 564 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
 565 {
 566         /* Enable writing to power configuration registers */
 567         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 568         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 569
 570         /* put VUSB3V1 LDO in active state */
 571         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 572
 573         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 574         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 575
 576         /* turn on 3.1V regulator */
 577         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
 578         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 579
 580         /* turn on 1.5V regulator */
 581         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
 582         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 583
 584         /* turn on 1.8V regulator */
 585         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
 586         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 587
 588         /* disable access to power configuration registers */
 589         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, PROTECT_KEY);
 590 }
 591
 592 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 593 {
 594         int ret = IRQ_NONE;
 595         u8 val;
 596
 597         /* action based on cable attach or detach */
 598         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
 599                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 600                                 " line %d\n", __LINE__);
 601                 goto done;
 602         }
 603
 604         if (val & USB_PRES_RISING)
 605                 twl4030_phy_resume();
 606         else
 607                 twl4030_phy_suspend(0);
 608
 609         ret = IRQ_HANDLED;
 610
 611 done:
 612         return ret;
 613 }
 614
 615 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 616 {
 617         if (suspend)
 618                 twl4030_phy_suspend(1);
 619         else
 620                 twl4030_phy_resume();
 621
 622         return 0;
 623 }
 624
 625 static int twl4030_set_peripheral(struct otg_transceiver *xceiv,
 626                 struct usb_gadget *gadget)
 627 {
 628         struct twl4030_usb *twl = xceiv_to_twl(xceiv);
 629         u32 l;
 630
 631         if (!xceiv)
 632                 return -ENODEV;
 633
 634         if (!gadget) {
 635                 omap_writew(0, OTG_IRQ_EN);
 636                 twl4030_phy_suspend(1);
 637                 twl->otg.gadget = NULL;
 638
 639                 return -ENODEV;
 640         }
 641
 642         twl->otg.gadget = gadget;
 643         twl4030_phy_resume();
 644
 645         l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
 646         l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
 647         l |= OTG_ID;
 648         omap_writel(l, OTG_CTRL);
 649
 650         twl->otg.state = OTG_STATE_B_IDLE;
 651
 652         twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
 653                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 654         twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
 655                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 656
 657         return 0;
 658 }
 659
 660 static int twl4030_set_host(struct otg_transceiver *xceiv, struct usb_bus *host)
 661 {
 662         struct twl4030_usb *twl = xceiv_to_twl(xceiv);
 663
 664         if (!xceiv)
 665                 return -ENODEV;
 666
 667         if (!host) {
 668                 omap_writew(0, OTG_IRQ_EN);
 669                 twl4030_phy_suspend(1);
 670                 twl->otg.host = NULL;
 671
 672                 return -ENODEV;
 673         }
 674
 675         twl->otg.host = host;
 676         twl4030_phy_resume();
 677
 678         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL,
 679                         TWL4030_OTG_CTRL_DMPULLDOWN
 680                                 | TWL4030_OTG_CTRL_DPPULLDOWN);
 681         twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
 682         twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
 683         twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
 684         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS);
 685
 686         return 0;
 687 }
 688
 689 static int __init twl4030_usb_init(void)
 690 {
 691         struct twl4030_usb      *twl;
 692         int status;
 693
 694         if (the_transceiver)
 695                 return 0;
 696
 697         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 698         if (!twl)
 699                 return 0;
 700
 701         the_transceiver = twl;
 702
 703         twl->irq                = TWL4030_PWRIRQ_USB_PRES;
 704         twl->otg.set_host       = twl4030_set_host;
 705         twl->otg.set_peripheral = twl4030_set_peripheral;
 706         twl->otg.set_suspend    = twl4030_set_suspend;
 707
 708         usb_irq_disable();
 709         status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
 710         if (status < 0) {
 711                 printk(KERN_DEBUG "can't get IRQ %d, err %d\n",
 712                         twl->irq, status);
 713                 kfree(twl);
 714                 return -ENODEV;
 715         }
 716
 717 #if defined(CONFIG_TWL4030_USB_HS_ULPI)
 718         hs_usb_init(twl);
 719 #endif
 720         twl4030_usb_ldo_init(twl);
 721         twl4030_phy_power(twl, 1);
 722         twl4030_i2c_access(1);
 723         twl4030_usb_set_mode(twl, twl->usb_mode);
 724         if (twl->usb_mode == T2_USB_MODE_ULPI)
 725                 twl4030_i2c_access(0);
 726
 727         twl->asleep = 0;
 728
 729         if (twl->usb_mode == T2_USB_MODE_ULPI)
 730                 twl4030_phy_suspend(1);
 731
 732         otg_set_transceiver(&twl->otg);
 733
 734         printk(KERN_INFO "Initialized TWL4030 USB module\n");
 735
 736         return 0;
 737 }
 738
 739
 740 static void __exit twl4030_usb_exit(void)
 741 {
 742         struct twl4030_usb *twl = the_transceiver;
 743         int val;
 744
 745         usb_irq_disable();
 746         free_irq(twl->irq, twl);
 747
 748         /* set transceiver mode to power on defaults */
 749         twl4030_usb_set_mode(twl, -1);
 750
 751         /* autogate 60MHz ULPI clock,
 752          * clear dpll clock request for i2c access,
 753          * disable 32KHz
 754          */
 755         val = twl4030_usb_read(PHY_CLK_CTRL);
 756         if (val >= 0) {
 757                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 758                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 759                 twl4030_usb_write(PHY_CLK_CTRL, (u8)val);
 760         }
 761
 762         /* disable complete OTG block */
 763         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 764
 765         twl4030_phy_power(twl, 0);
 766
 767         kfree(twl);
 768 }
 769
 770 subsys_initcall(twl4030_usb_init);
 771 module_exit(twl4030_usb_exit);
 772
 773 MODULE_ALIAS("i2c:twl4030-usb");
 774 MODULE_AUTHOR("Texas Instruments, Inc.");
 775 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 776 MODULE_LICENSE("GPL");