drivers/i2c/chips/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/time.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/io.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/i2c/twl4030.h>
  38 #include <mach/usb.h>
  39
  40 /* Register defines */
  41
  42 #define VENDOR_ID_LO                    0x00
  43 #define VENDOR_ID_HI                    0x01
  44 #define PRODUCT_ID_LO                   0x02
  45 #define PRODUCT_ID_HI                   0x03
  46
  47 #define FUNC_CTRL                       0x04
  48 #define FUNC_CTRL_SET                   0x05
  49 #define FUNC_CTRL_CLR                   0x06
  50 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  51 #define FUNC_CTRL_RESET                 (1 << 5)
  52 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  53 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  54 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  55 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  56 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  57 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  58 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  59 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  60 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  61 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  62
  63 #define IFC_CTRL                        0x07
  64 #define IFC_CTRL_SET                    0x08
  65 #define IFC_CTRL_CLR                    0x09
  66 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  67 #define IFC_CTRL_AUTORESUME             (1 << 4)
  68 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  69 #define IFC_CTRL_CARKITMODE             (1 << 2)
  70 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  71
  72 #define TWL4030_OTG_CTRL                0x0A
  73 #define TWL4030_OTG_CTRL_SET            0x0B
  74 #define TWL4030_OTG_CTRL_CLR            0x0C
  75 #define TWL4030_OTG_CTRL_DRVVBUS        (1 << 5)
  76 #define TWL4030_OTG_CTRL_CHRGVBUS       (1 << 4)
  77 #define TWL4030_OTG_CTRL_DISCHRGVBUS    (1 << 3)
  78 #define TWL4030_OTG_CTRL_DMPULLDOWN     (1 << 2)
  79 #define TWL4030_OTG_CTRL_DPPULLDOWN     (1 << 1)
  80 #define TWL4030_OTG_CTRL_IDPULLUP       (1 << 0)
  81
  82 #define USB_INT_EN_RISE                 0x0D
  83 #define USB_INT_EN_RISE_SET             0x0E
  84 #define USB_INT_EN_RISE_CLR             0x0F
  85 #define USB_INT_EN_FALL                 0x10
  86 #define USB_INT_EN_FALL_SET             0x11
  87 #define USB_INT_EN_FALL_CLR             0x12
  88 #define USB_INT_STS                     0x13
  89 #define USB_INT_LATCH                   0x14
  90 #define USB_INT_IDGND                   (1 << 4)
  91 #define USB_INT_SESSEND                 (1 << 3)
  92 #define USB_INT_SESSVALID               (1 << 2)
  93 #define USB_INT_VBUSVALID               (1 << 1)
  94 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  95
  96 #define CARKIT_CTRL                     0x19
  97 #define CARKIT_CTRL_SET                 0x1A
  98 #define CARKIT_CTRL_CLR                 0x1B
  99 #define CARKIT_CTRL_MICEN               (1 << 6)
 100 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
 101 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
 102 #define CARKIT_CTRL_RXDEN               (1 << 3)
 103 #define CARKIT_CTRL_TXDEN               (1 << 2)
 104 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 105 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 106 #define CARKIT_PLS_CTRL                 0x22
 107 #define CARKIT_PLS_CTRL_SET             0x23
 108 #define CARKIT_PLS_CTRL_CLR             0x24
 109 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 110 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 111 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 112 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 113
 114 #define MCPC_CTRL                       0x30
 115 #define MCPC_CTRL_SET                   0x31
 116 #define MCPC_CTRL_CLR                   0x32
 117 #define MCPC_CTRL_RTSOL                 (1 << 7)
 118 #define MCPC_CTRL_EXTSWR                (1 << 6)
 119 #define MCPC_CTRL_EXTSWC                (1 << 5)
 120 #define MCPC_CTRL_VOICESW               (1 << 4)
 121 #define MCPC_CTRL_OUT64K                (1 << 3)
 122 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 123 #define MCPC_CTRL_HS_UART               (1 << 0)
 124
 125 #define MCPC_IO_CTRL                    0x33
 126 #define MCPC_IO_CTRL_SET                0x34
 127 #define MCPC_IO_CTRL_CLR                0x35
 128 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 129 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 130 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 131 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 132 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 133 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 134
 135 #define MCPC_CTRL2                      0x36
 136 #define MCPC_CTRL2_SET                  0x37
 137 #define MCPC_CTRL2_CLR                  0x38
 138 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 139
 140 #define OTHER_FUNC_CTRL                 0x80
 141 #define OTHER_FUNC_CTRL_SET             0x81
 142 #define OTHER_FUNC_CTRL_CLR             0x82
 143 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 144 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 145
 146 #define OTHER_IFC_CTRL                  0x83
 147 #define OTHER_IFC_CTRL_SET              0x84
 148 #define OTHER_IFC_CTRL_CLR              0x85
 149 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 150 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 151 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 152 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 153 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 154 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 155
 156 #define OTHER_INT_EN_RISE               0x86
 157 #define OTHER_INT_EN_RISE_SET           0x87
 158 #define OTHER_INT_EN_RISE_CLR           0x88
 159 #define OTHER_INT_EN_FALL               0x89
 160 #define OTHER_INT_EN_FALL_SET           0x8A
 161 #define OTHER_INT_EN_FALL_CLR           0x8B
 162 #define OTHER_INT_STS                   0x8C
 163 #define OTHER_INT_LATCH                 0x8D
 164 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 165 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 166 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 167 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 168 #define OTHER_INT_MANU                  (1 << 1)
 169 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 170
 171 #define ID_STATUS                       0x96
 172 #define ID_RES_FLOAT                    (1 << 4)
 173 #define ID_RES_440K                     (1 << 3)
 174 #define ID_RES_200K                     (1 << 2)
 175 #define ID_RES_102K                     (1 << 1)
 176 #define ID_RES_GND                      (1 << 0)
 177
 178 #define POWER_CTRL                      0xAC
 179 #define POWER_CTRL_SET                  0xAD
 180 #define POWER_CTRL_CLR                  0xAE
 181 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 182
 183 #define OTHER_IFC_CTRL2                 0xAF
 184 #define OTHER_IFC_CTRL2_SET             0xB0
 185 #define OTHER_IFC_CTRL2_CLR             0xB1
 186 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 187 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 188 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 189 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 190 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 191 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 192
 193 #define REG_CTRL_EN                     0xB2
 194 #define REG_CTRL_EN_SET                 0xB3
 195 #define REG_CTRL_EN_CLR                 0xB4
 196 #define REG_CTRL_ERROR                  0xB5
 197 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 198
 199 #define OTHER_FUNC_CTRL2                0xB8
 200 #define OTHER_FUNC_CTRL2_SET            0xB9
 201 #define OTHER_FUNC_CTRL2_CLR            0xBA
 202 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 203
 204 /* following registers do not have separate _clr and _set registers */
 205 #define VBUS_DEBOUNCE                   0xC0
 206 #define ID_DEBOUNCE                     0xC1
 207 #define VBAT_TIMER                      0xD3
 208 #define PHY_PWR_CTRL                    0xFD
 209 #define PHY_PWR_PHYPWD                  (1 << 0)
 210 #define PHY_CLK_CTRL                    0xFE
 211 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 212 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 213 #define REQ_PHY_DPLL_CLK                (1 << 0)
 214 #define PHY_CLK_CTRL_STS                0xFF
 215 #define PHY_DPLL_CLK                    (1 << 0)
 216
 217 /* In module TWL4030_MODULE_PM_MASTER */
 218 #define PROTECT_KEY                     0x0E
 219
 220 /* In module TWL4030_MODULE_PM_RECEIVER */
 221 #define VUSB_DEDICATED1                 0x7D
 222 #define VUSB_DEDICATED2                 0x7E
 223 #define VUSB1V5_DEV_GRP                 0x71
 224 #define VUSB1V5_TYPE                    0x72
 225 #define VUSB1V5_REMAP                   0x73
 226 #define VUSB1V8_DEV_GRP                 0x74
 227 #define VUSB1V8_TYPE                    0x75
 228 #define VUSB1V8_REMAP                   0x76
 229 #define VUSB3V1_DEV_GRP                 0x77
 230 #define VUSB3V1_TYPE                    0x78
 231 #define VUSB3V1_REMAP                   0x79
 232
 233 /* In module TWL4030_MODULE_INTBR */
 234 #define PMBR1                           0x0D
 235 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 236
 237 /* In module TWL4030_MODULE_INT */
 238 #define REG_PWR_ISR1                    0x00
 239 #define REG_PWR_IMR1                    0x01
 240 #define USB_PRES                        (1 << 2)
 241 #define REG_PWR_EDR1                    0x05
 242 #define USB_PRES_FALLING                (1 << 4)
 243 #define USB_PRES_RISING                 (1 << 5)
 244 #define REG_PWR_SIH_CTRL                0x07
 245 #define COR                             (1 << 2)
 246
 247 /* bits in OTG_CTRL */
 248 #define OTG_XCEIV_OUTPUTS \
 249         (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
 250 #define OTG_XCEIV_INPUTS \
 251         (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
 252 #define OTG_CTRL_BITS \
 253         (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
 254         /* and OTG_PULLUP is sometimes written */
 255
 256 #define OTG_CTRL_MASK   (OTG_DRIVER_SEL| \
 257         OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
 258         OTG_CTRL_BITS)
 259
 260
 261 struct twl4030_usb {
 262         struct otg_transceiver  otg;
 263         struct device           *dev;
 264
 265         /* pin configuration */
 266         enum twl4030_usb_mode   usb_mode;
 267         int                     irq;
 268         u8                      asleep;
 269 };
 270
 271 /* internal define on top of container_of */
 272 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 273
 274 /*-------------------------------------------------------------------------*/
 275
 276 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 277                 u8 module, u8 data, u8 address)
 278 {
 279         u8 check;
 280
 281         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 282             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 283                                                 (check == data))
 284                 return 0;
 285         /* Failed once: Try again */
 286         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 287             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 288                                                 (check == data))
 289                 return 0;
 290         /* Failed again: Return error */
 291
 292         return -EBUSY;
 293 }
 294
 295 #define twl4030_usb_write_verify(twl, address, data)    \
 296         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 297
 298 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 299                 u8 address, u8 data)
 300 {
 301         int ret = 0;
 302
 303         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 304         if (ret >= 0) {
 305 #if 0   /* debug */
 306                 u8 data1;
 307                 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
 308                                         address) < 0)
 309                         dev_err(twl->dev, "re-read failed\n");
 310                 else
 311                         dev_dbg(twl->dev,
 312                                "Write %s wrote %x read %x from reg %x\n",
 313                                (data1 == data) ? "succeed" : "mismatch",
 314                                data, data1, address);
 315 #endif
 316         } else {
 317                 dev_warn(twl->dev,
 318                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 319         }
 320
 321         return ret;
 322 }
 323
 324 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 325 {
 326         u8 data;
 327         int ret = 0;
 328
 329         ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
 330         if (ret >= 0)
 331                 ret = data;
 332         else
 333                 dev_warn(twl->dev,
 334                         "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
 335
 336         return ret;
 337 }
 338
 339 /*-------------------------------------------------------------------------*/
 340
 341 static inline int
 342 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 343 {
 344         return twl4030_usb_write(twl, reg + 1, bits);
 345 }
 346
 347 static inline int
 348 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 349 {
 350         return twl4030_usb_write(twl, reg + 2, bits);
 351 }
 352
 353 /*-------------------------------------------------------------------------*/
 354
 355 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 356 {
 357         twl->usb_mode = mode;
 358
 359         switch (mode) {
 360         case T2_USB_MODE_ULPI:
 361                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 362                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 363                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 364                                         FUNC_CTRL_XCVRSELECT_MASK |
 365                                         FUNC_CTRL_OPMODE_MASK);
 366                 break;
 367 /*
 368         case T2_USB_MODE_CEA2011_3PIN:
 369                 twl4030_cea2011_3_pin_FS_setup(twl);
 370                 break;
 371 */
 372         default:
 373                 /* FIXME: power on defaults */
 374                 break;
 375         };
 376 }
 377
 378 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 379 {
 380         unsigned long timeout;
 381         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 382
 383         if (val >= 0) {
 384                 if (on) {
 385                         /* enable DPLL to access PHY registers over I2C */
 386                         val |= REQ_PHY_DPLL_CLK;
 387                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 388                                                 (u8)val) < 0);
 389
 390                         timeout = jiffies + HZ;
 391                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 392                                                         PHY_DPLL_CLK)
 393                                 && time_before(jiffies, timeout))
 394                                         udelay(10);
 395                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 396                                                         PHY_DPLL_CLK))
 397                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 398                                                 "PHY DPLL clock\n");
 399                 } else {
 400                         /* let ULPI control the DPLL clock */
 401                         val &= ~REQ_PHY_DPLL_CLK;
 402                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 403                                                 (u8)val) < 0);
 404                 }
 405         }
 406 }
 407
 408 static void usb_irq_enable(struct twl4030_usb *twl, int rising, int falling)
 409 {
 410         u8 val;
 411
 412         /* edge setup */
 413         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 414                                 &val, REG_PWR_EDR1) < 0);
 415
 416         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 417         if (rising)
 418                 val = val | USB_PRES_RISING;
 419         if (falling)
 420                 val = val | USB_PRES_FALLING;
 421         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 422                                 val, REG_PWR_EDR1) < 0);
 423
 424         /* un-mask interrupt */
 425         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 426                                 &val, REG_PWR_IMR1) < 0);
 427
 428         val &= ~USB_PRES;
 429
 430         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 431                                 val, REG_PWR_IMR1) < 0);
 432 }
 433
 434 static void usb_irq_disable(struct twl4030_usb *twl)
 435 {
 436         u8 val;
 437
 438         /* undo edge setup */
 439         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 440                                 &val, REG_PWR_EDR1) < 0);
 441         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 442         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 443                                 val, REG_PWR_EDR1) < 0);
 444
 445         /* mask interrupt */
 446         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 447                                 &val, REG_PWR_IMR1) < 0);
 448         val |= USB_PRES;
 449
 450         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 451                                 val, REG_PWR_IMR1) < 0);
 452 }
 453
 454 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 455 {
 456         u8 pwr;
 457
 458         pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 459         if (on) {
 460                 pwr &= ~PHY_PWR_PHYPWD;
 461                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 462                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 463                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 464                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 465                                                 PHY_CLK_CTRL_CLK32K_EN));
 466         } else  {
 467                 pwr |= PHY_PWR_PHYPWD;
 468                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 469         }
 470 }
 471
 472 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 473 {
 474         if (controller_off)
 475                 usb_irq_disable(twl);
 476
 477         if (twl->asleep)
 478                 return;
 479
 480         if (!controller_off)
 481                 /* enable rising edge interrupt to detect cable attach */
 482                 usb_irq_enable(twl, 1, 0);
 483
 484         twl4030_phy_power(twl, 0);
 485         twl->asleep = 1;
 486 }
 487
 488 static void twl4030_phy_resume(struct twl4030_usb *twl)
 489 {
 490         if (!twl->asleep)
 491                 return;
 492
 493         /* enable falling edge interrupt to detect cable detach */
 494         usb_irq_enable(twl, 0, 1);
 495
 496         twl4030_phy_power(twl, 1);
 497         twl4030_i2c_access(twl, 1);
 498         twl4030_usb_set_mode(twl, twl->usb_mode);
 499         if (twl->usb_mode == T2_USB_MODE_ULPI)
 500                 twl4030_i2c_access(twl, 0);
 501         twl->asleep = 0;
 502 }
 503
 504 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
 505 {
 506         /* Enable writing to power configuration registers */
 507         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 508         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 509
 510         /* put VUSB3V1 LDO in active state */
 511         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 512
 513         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 514         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 515
 516         /* turn on 3.1V regulator */
 517         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
 518         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 519
 520         /* turn on 1.5V regulator */
 521         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
 522         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 523
 524         /* turn on 1.8V regulator */
 525         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
 526         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 527
 528         /* disable access to power configuration registers */
 529         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
 530 }
 531
 532 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 533 {
 534         struct twl4030_usb *twl = _twl;
 535         u8 val;
 536
 537         /* action based on cable attach or detach */
 538         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 539                                 &val, REG_PWR_EDR1) < 0);
 540
 541         if (val & USB_PRES_RISING) {
 542                 twl4030_phy_resume(twl);
 543                 twl4030charger_usb_en(1);
 544         } else {
 545                 twl4030charger_usb_en(0);
 546                 twl4030_phy_suspend(twl, 0);
 547         }
 548
 549         return IRQ_HANDLED;
 550 }
 551
 552 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 553 {
 554         struct twl4030_usb *twl = xceiv_to_twl(x);
 555
 556         if (suspend)
 557                 twl4030_phy_suspend(twl, 1);
 558         else
 559                 twl4030_phy_resume(twl);
 560
 561         return 0;
 562 }
 563
 564 static int twl4030_set_peripheral(struct otg_transceiver *x,
 565                 struct usb_gadget *gadget)
 566 {
 567         struct twl4030_usb *twl;
 568         u32 l;
 569
 570         if (!x)
 571                 return -ENODEV;
 572
 573         twl = xceiv_to_twl(x);
 574
 575         if (!gadget) {
 576                 omap_writew(0, OTG_IRQ_EN);
 577                 twl4030_phy_suspend(twl, 1);
 578                 twl->otg.gadget = NULL;
 579
 580                 return -ENODEV;
 581         }
 582
 583         twl->otg.gadget = gadget;
 584         twl4030_phy_resume(twl);
 585
 586         l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
 587         l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
 588         l |= OTG_ID;
 589         omap_writel(l, OTG_CTRL);
 590
 591         twl->otg.state = OTG_STATE_B_IDLE;
 592
 593         twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
 594                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 595         twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
 596                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 597
 598         return 0;
 599 }
 600
 601 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 602 {
 603         struct twl4030_usb *twl;
 604
 605         if (!x)
 606                 return -ENODEV;
 607
 608         twl = xceiv_to_twl(x);
 609
 610         if (!host) {
 611                 omap_writew(0, OTG_IRQ_EN);
 612                 twl4030_phy_suspend(twl, 1);
 613                 twl->otg.host = NULL;
 614
 615                 return -ENODEV;
 616         }
 617
 618         twl->otg.host = host;
 619         twl4030_phy_resume(twl);
 620
 621         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL,
 622                         TWL4030_OTG_CTRL_DMPULLDOWN
 623                                 | TWL4030_OTG_CTRL_DPPULLDOWN);
 624         twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
 625         twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
 626         twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
 627         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS);
 628
 629         return 0;
 630 }
 631
 632 static int __init twl4030_usb_probe(struct platform_device *pdev)
 633 {
 634         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 635         struct twl4030_usb      *twl;
 636         int status;
 637
 638         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 639         if (!twl)
 640                 return -ENOMEM;
 641
 642         if (!pdata) {
 643                 dev_info(&pdev->dev, "platform_data not available\n");
 644                 return -EINVAL;
 645         }
 646
 647         twl->dev                = &pdev->dev;
 648         twl->irq                = TWL4030_PWRIRQ_USB_PRES;
 649         twl->otg.set_host       = twl4030_set_host;
 650         twl->otg.set_peripheral = twl4030_set_peripheral;
 651         twl->otg.set_suspend    = twl4030_set_suspend;
 652         twl->usb_mode           = pdata->usb_mode;
 653
 654         usb_irq_disable(twl);
 655         status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
 656         if (status < 0) {
 657                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 658                         twl->irq, status);
 659                 kfree(twl);
 660                 return status;
 661         }
 662
 663
 664         twl4030_usb_ldo_init(twl);
 665         twl4030_phy_power(twl, 1);
 666         twl4030_i2c_access(twl, 1);
 667         twl4030_usb_set_mode(twl, twl->usb_mode);
 668
 669         twl->asleep = 0;
 670
 671         if (twl->usb_mode == T2_USB_MODE_ULPI) {
 672                 twl4030_i2c_access(twl, 0);
 673                 twl4030_phy_suspend(twl, 0);
 674         }
 675
 676         otg_set_transceiver(&twl->otg);
 677         platform_set_drvdata(pdev, twl);
 678         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 679
 680         return 0;
 681 }
 682
 683 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 684 {
 685         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 686         int val;
 687
 688         usb_irq_disable(twl);
 689         free_irq(twl->irq, twl);
 690
 691         /* set transceiver mode to power on defaults */
 692         twl4030_usb_set_mode(twl, -1);
 693
 694         /* autogate 60MHz ULPI clock,
 695          * clear dpll clock request for i2c access,
 696          * disable 32KHz
 697          */
 698         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 699         if (val >= 0) {
 700                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 701                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 702                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 703         }
 704
 705         /* disable complete OTG block */
 706         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 707
 708         twl4030_phy_power(twl, 0);
 709
 710         kfree(twl);
 711
 712         return 0;
 713 }
 714
 715 static struct platform_driver twl4030_driver = {
 716         .probe          = twl4030_usb_probe,
 717         .remove         = __exit_p(twl4030_remove),
 718         .driver         = {
 719                 .name   = "twl4030_usb",
 720                 .owner  = THIS_MODULE,
 721         },
 722 };
 723
 724 static int __init twl4030_usb_init(void)
 725 {
 726         return platform_driver_register(&twl4030_driver);
 727 }
 728 module_init(twl4030_usb_init);
 729
 730 static void __exit twl4030_usb_exit(void)
 731 {
 732         platform_driver_unregister(&twl4030_driver);
 733 }
 734 module_exit(twl4030_usb_exit);
 735
 736 MODULE_ALIAS("platform:twl4030_usb");
 737 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 738 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 739 MODULE_LICENSE("GPL");