2 * linux/drivers/i2c/chips/twl4030_gpio.c
4 * Copyright (C) 2006-2007 Texas Instruments, Inc.
5 * Copyright (C) 2006 MontaVista Software, Inc.
7 * Code re-arranged and cleaned up by:
8 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * Andy Lowe / Nishanth Menon
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include <linux/module.h>
30 #include <linux/kernel_stat.h>
31 #include <linux/init.h>
32 #include <linux/time.h>
33 #include <linux/interrupt.h>
34 #include <linux/random.h>
35 #include <linux/syscalls.h>
36 #include <linux/kthread.h>
37 #include <linux/irq.h>
39 #include <linux/i2c.h>
40 #include <linux/i2c/twl4030.h>
41 #include <linux/i2c/twl4030-gpio.h>
42 #include <linux/slab.h>
44 #include <mach/irqs.h>
45 #include <asm/mach/irq.h>
46 #include <mach/gpio.h>
49 #include <linux/device.h>
51 /* BitField Definitions */
53 /* Data banks : 3 banks for 8 gpios each */
54 #define DATA_BANK_MAX 8
55 #define GET_GPIO_DATA_BANK(x) ((x)/DATA_BANK_MAX)
56 #define GET_GPIO_DATA_OFF(x) ((x)%DATA_BANK_MAX)
58 /* GPIODATADIR Fields each block 0-7 */
59 #define BIT_GPIODATADIR_GPIOxDIR(x) (x)
60 #define MASK_GPIODATADIR_GPIOxDIR(x) (0x01 << (x))
62 /* GPIODATAIN Fields each block 0-7 */
63 #define BIT_GPIODATAIN_GPIOxIN(x) (x)
64 #define MASK_GPIODATAIN_GPIOxIN(x) (0x01 << (x))
66 /* GPIODATAOUT Fields each block 0-7 */
67 #define BIT_GPIODATAOUT_GPIOxOUT(x) (x)
68 #define MASK_GPIODATAOUT_GPIOxOUT(x) (0x01 << (x))
70 /* CLEARGPIODATAOUT Fields */
71 #define BIT_CLEARGPIODATAOUT_GPIOxOUT(x) (x)
72 #define MASK_CLEARGPIODATAOUT_GPIOxOUT(x) (0x01 << (x))
74 /* SETGPIODATAOUT Fields */
75 #define BIT_SETGPIODATAOUT_GPIOxOUT(x) (x)
76 #define MASK_SETGPIODATAOUT_GPIOxOUT(x) (0x01 << (x))
78 /* GPIO_DEBEN Fields */
79 #define BIT_GPIO_DEBEN_GPIOxDEB(x) (x)
80 #define MASK_GPIO_DEBEN_GPIOxDEB(x) (0x01 << (x))
82 /* GPIO_ISR1A Fields */
83 #define BIT_GPIO_ISR_GPIOxISR(x) (x)
84 #define MASK_GPIO_ISR_GPIOxISR(x) (0x01 << (x))
86 /* GPIO_IMR1A Fields */
87 #define BIT_GPIO_IMR1A_GPIOxIMR(x) (x)
88 #define MASK_GPIO_IMR1A_GPIOxIMR(x) (0x01 << (x))
90 /* GPIO_SIR1 Fields */
91 #define BIT_GPIO_SIR1_GPIOxSIR(x) (x)
92 #define MASK_GPIO_SIR1_GPIO0SIR (0x01 << (x))
95 /* Control banks : 5 banks for 4 gpios each */
96 #define DATA_CTL_MAX 4
97 #define GET_GPIO_CTL_BANK(x) ((x)/DATA_CTL_MAX)
98 #define GET_GPIO_CTL_OFF(x) ((x)%DATA_CTL_MAX)
99 #define GPIO_BANK_MAX GET_GPIO_CTL_BANK(TWL4030_GPIO_MAX)
101 /* GPIOPUPDCTRx Fields 5 banks of 4 gpios each */
102 #define BIT_GPIOPUPDCTR1_GPIOxPD(x) (2 * (x))
103 #define MASK_GPIOPUPDCTR1_GPIOxPD(x) (0x01 << (2 * (x)))
104 #define BIT_GPIOPUPDCTR1_GPIOxPU(x) ((x) + 1)
105 #define MASK_GPIOPUPDCTR1_GPIOxPU(x) (0x01 << (((2 * (x)) + 1)))
107 /* GPIO_EDR1 Fields */
108 #define BIT_GPIO_EDR1_GPIOxFALLING(x) (2 * (x))
109 #define MASK_GPIO_EDR1_GPIOxFALLING(x) (0x01 << (2 * (x)))
110 #define BIT_GPIO_EDR1_GPIOxRISING(x) ((x) + 1)
111 #define MASK_GPIO_EDR1_GPIOxRISING(x) (0x01 << (((2 * (x)) + 1)))
113 /* GPIO_SIH_CTRL Fields */
114 #define BIT_GPIO_SIH_CTRL_EXCLEN (0x000)
115 #define MASK_GPIO_SIH_CTRL_EXCLEN (0x00000001)
116 #define BIT_GPIO_SIH_CTRL_PENDDIS (0x001)
117 #define MASK_GPIO_SIH_CTRL_PENDDIS (0x00000002)
118 #define BIT_GPIO_SIH_CTRL_COR (0x002)
119 #define MASK_GPIO_SIH_CTRL_COR (0x00000004)
121 /* GPIO_CTRL Fields */
122 #define BIT_GPIO_CTRL_GPIO0CD1 (0x000)
123 #define MASK_GPIO_CTRL_GPIO0CD1 (0x00000001)
124 #define BIT_GPIO_CTRL_GPIO1CD2 (0x001)
125 #define MASK_GPIO_CTRL_GPIO1CD2 (0x00000002)
126 #define BIT_GPIO_CTRL_GPIO_ON (0x002)
127 #define MASK_GPIO_CTRL_GPIO_ON (0x00000004)
129 /* Mask for GPIO registers when aggregated into a 32-bit integer */
130 #define GPIO_32_MASK 0x0003ffff
132 /* Data structures */
133 static struct semaphore gpio_sem;
135 /* store usage of each GPIO. - each bit represents one GPIO */
136 static unsigned int gpio_usage_count;
138 /* shadow the imr register */
139 static unsigned int gpio_imr_shadow;
141 /* bitmask of pending requests to unmask gpio interrupts */
142 static unsigned int gpio_pending_unmask;
144 /* pointer to gpio unmask thread struct */
145 static struct task_struct *gpio_unmask_thread;
148 * Helper functions to read and write the GPIO ISR and IMR registers as
149 * 32-bit integers. Functions return 0 on success, non-zero otherwise.
150 * The caller must hold a lock on gpio_sem.
153 static int gpio_read_isr(unsigned int *isr)
158 ret = twl4030_i2c_read(TWL4030_MODULE_GPIO, (u8 *) isr,
161 *isr &= GPIO_32_MASK;
166 static int gpio_write_isr(unsigned int isr)
170 * The buffer passed to the twl4030_i2c_write() routine must have an
171 * extra byte at the beginning reserved for its internal use.
174 isr = cpu_to_le32(isr);
175 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &isr,
179 static int gpio_write_imr(unsigned int imr)
183 * The buffer passed to the twl4030_i2c_write() routine must have an
184 * extra byte at the beginning reserved for its internal use.
187 imr = cpu_to_le32(imr);
188 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &imr,
193 * These routines are analagous to the irqchip methods, but they are designed
194 * to be called from thread context with cpu interrupts enabled and with no
195 * locked spinlocks. We call these routines from our custom IRQ handler
196 * instead of the usual irqchip methods.
198 static void twl4030_gpio_mask_and_ack(unsigned int irq)
200 int gpio = irq - TWL4030_GPIO_IRQ_BASE;
204 gpio_imr_shadow |= (1 << gpio);
205 gpio_write_imr(gpio_imr_shadow);
207 gpio_write_isr(1 << gpio);
211 static void twl4030_gpio_unmask(unsigned int irq)
213 int gpio = irq - TWL4030_GPIO_IRQ_BASE;
216 gpio_imr_shadow &= ~(1 << gpio);
217 gpio_write_imr(gpio_imr_shadow);
222 * These are the irqchip methods for the TWL4030 GPIO interrupts.
223 * Our IRQ handle method doesn't call these, but they will be called by
224 * other routines such as setup_irq() and enable_irq(). They are called
225 * with cpu interrupts disabled and with a lock on the irq_controller_lock
226 * spinlock. This complicates matters, because accessing the TWL4030 GPIO
227 * interrupt controller requires I2C bus transactions that can't be initiated
228 * in this context. Our solution is to defer accessing the interrupt
229 * controller to a kernel thread. We only need to support the unmask method.
232 static void twl4030_gpio_mask_and_ack_irqchip(unsigned int irq) {}
233 static void twl4030_gpio_mask_irqchip(unsigned int irq) {}
235 static void twl4030_gpio_unmask_irqchip(unsigned int irq)
237 int gpio = irq - TWL4030_GPIO_IRQ_BASE;
239 gpio_pending_unmask |= (1 << gpio);
240 if (gpio_unmask_thread && gpio_unmask_thread->state != TASK_RUNNING)
241 wake_up_process(gpio_unmask_thread);
244 static struct irq_chip twl4030_gpio_irq_chip = {
245 .name = "twl4030-gpio",
246 .ack = twl4030_gpio_mask_and_ack_irqchip,
247 .mask = twl4030_gpio_mask_irqchip,
248 .unmask = twl4030_gpio_unmask_irqchip,
252 * These are the irqchip methods for the TWL4030 PIH GPIO module interrupt.
253 * The PIH module doesn't have interrupt masking capability, so these
256 static void twl4030_gpio_module_ack(unsigned int irq) {}
257 static void twl4030_gpio_module_mask(unsigned int irq) {}
258 static void twl4030_gpio_module_unmask(unsigned int irq) {}
259 static struct irq_chip twl4030_gpio_module_irq_chip = {
260 .ack = twl4030_gpio_module_ack,
261 .mask = twl4030_gpio_module_mask,
262 .unmask = twl4030_gpio_module_unmask,
266 * To configure TWL4030 GPIO module registers
268 static inline int gpio_twl4030_write(u8 address, u8 data)
272 ret = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
277 * To read a TWL4030 GPIO module register
279 static inline int gpio_twl4030_read(u8 address)
284 ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
291 * twl4030 GPIO request function
293 int twl4030_request_gpio(int gpio)
297 if (unlikely(gpio >= TWL4030_GPIO_MAX))
301 if (gpio_usage_count & (0x1 << gpio))
304 u8 clear_pull[6] = { 0, 0, 0, 0, 0, 0 };
305 /* First time usage? - switch on GPIO module */
306 if (!gpio_usage_count) {
308 gpio_twl4030_write(REG_GPIO_CTRL,
309 MASK_GPIO_CTRL_GPIO_ON);
310 ret = gpio_twl4030_write(REG_GPIO_SIH_CTRL, 0x00);
313 gpio_usage_count |= (0x1 << gpio);
316 twl4030_i2c_write(TWL4030_MODULE_GPIO, clear_pull,
317 REG_GPIOPUPDCTR1, 5);
322 EXPORT_SYMBOL(twl4030_request_gpio);
325 * TWL4030 GPIO free module
327 int twl4030_free_gpio(int gpio)
331 if (unlikely(gpio >= TWL4030_GPIO_MAX))
336 if ((gpio_usage_count & (0x1 << gpio)) == 0)
339 gpio_usage_count &= ~(0x1 << gpio);
341 /* Last time usage? - switch off GPIO module */
342 if (!gpio_usage_count)
343 ret = gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
348 EXPORT_SYMBOL(twl4030_free_gpio);
351 * Set direction for TWL4030 GPIO
353 int twl4030_set_gpio_direction(int gpio, int is_input)
355 u8 d_bnk = GET_GPIO_DATA_BANK(gpio);
356 u8 d_msk = MASK_GPIODATADIR_GPIOxDIR(GET_GPIO_DATA_OFF(gpio));
361 if (unlikely((gpio >= TWL4030_GPIO_MAX)
362 || !(gpio_usage_count & (0x1 << gpio))))
365 base = REG_GPIODATADIR1 + d_bnk;
368 ret = gpio_twl4030_read(base);
371 reg = (u8) ((ret) & ~(d_msk));
373 reg = (u8) ((ret) | (d_msk));
375 ret = gpio_twl4030_write(base, reg);
380 EXPORT_SYMBOL(twl4030_set_gpio_direction);
383 * To enable/disable GPIO pin on TWL4030
385 int twl4030_set_gpio_dataout(int gpio, int enable)
387 u8 d_bnk = GET_GPIO_DATA_BANK(gpio);
388 u8 d_msk = MASK_GPIODATAOUT_GPIOxOUT(GET_GPIO_DATA_OFF(gpio));
392 if (unlikely((gpio >= TWL4030_GPIO_MAX)
393 || !(gpio_usage_count & (0x1 << gpio))))
397 base = REG_SETGPIODATAOUT1 + d_bnk;
399 base = REG_CLEARGPIODATAOUT1 + d_bnk;
402 ret = gpio_twl4030_write(base, d_msk);
406 EXPORT_SYMBOL(twl4030_set_gpio_dataout);
409 * To get the status of a GPIO pin on TWL4030
411 int twl4030_get_gpio_datain(int gpio)
413 u8 d_bnk = GET_GPIO_DATA_BANK(gpio);
414 u8 d_off = BIT_GPIODATAIN_GPIOxIN(GET_GPIO_DATA_OFF(gpio));
418 if (unlikely((gpio >= TWL4030_GPIO_MAX)
419 || !(gpio_usage_count & (0x1 << gpio))))
422 base = REG_GPIODATAIN1 + d_bnk;
424 ret = gpio_twl4030_read(base);
427 ret = (ret >> d_off) & 0x1;
431 EXPORT_SYMBOL(twl4030_get_gpio_datain);
434 * Configure PULL type for a GPIO pin on TWL4030
436 int twl4030_set_gpio_pull(int gpio, int pull_dircn)
438 u8 c_bnk = GET_GPIO_CTL_BANK(gpio);
439 u8 c_off = GET_GPIO_CTL_OFF(gpio);
445 if (unlikely((gpio >= TWL4030_GPIO_MAX) ||
446 !(gpio_usage_count & (0x1 << gpio))))
449 base = REG_GPIOPUPDCTR1 + c_bnk;
450 if (pull_dircn == TWL4030_GPIO_PULL_DOWN)
451 c_msk = MASK_GPIOPUPDCTR1_GPIOxPD(c_off);
452 else if (pull_dircn == TWL4030_GPIO_PULL_UP)
453 c_msk = MASK_GPIOPUPDCTR1_GPIOxPU(c_off);
456 ret = gpio_twl4030_read(base);
458 /* clear the previous up/down values */
460 reg &= ~(MASK_GPIOPUPDCTR1_GPIOxPU(c_off) |
461 MASK_GPIOPUPDCTR1_GPIOxPD(c_off));
463 ret = gpio_twl4030_write(base, reg);
468 EXPORT_SYMBOL(twl4030_set_gpio_pull);
471 * Configure Edge control for a GPIO pin on TWL4030
473 int twl4030_set_gpio_edge_ctrl(int gpio, int edge)
475 u8 c_bnk = GET_GPIO_CTL_BANK(gpio);
476 u8 c_off = GET_GPIO_CTL_OFF(gpio);
482 if (unlikely((gpio >= TWL4030_GPIO_MAX)
483 || !(gpio_usage_count & (0x1 << gpio))))
486 base = REG_GPIO_EDR1 + c_bnk;
488 if (edge & TWL4030_GPIO_EDGE_RISING)
489 c_msk |= MASK_GPIO_EDR1_GPIOxRISING(c_off);
491 if (edge & TWL4030_GPIO_EDGE_FALLING)
492 c_msk |= MASK_GPIO_EDR1_GPIOxFALLING(c_off);
495 ret = gpio_twl4030_read(base);
497 /* clear the previous rising/falling values */
500 ~(MASK_GPIO_EDR1_GPIOxFALLING(c_off) |
501 MASK_GPIO_EDR1_GPIOxRISING(c_off)));
503 ret = gpio_twl4030_write(base, reg);
508 EXPORT_SYMBOL(twl4030_set_gpio_edge_ctrl);
511 * Configure debounce timing value for a GPIO pin on TWL4030
513 int twl4030_set_gpio_debounce(int gpio, int enable)
515 u8 d_bnk = GET_GPIO_DATA_BANK(gpio);
516 u8 d_msk = MASK_GPIO_DEBEN_GPIOxDEB(GET_GPIO_DATA_OFF(gpio));
521 if (unlikely((gpio >= TWL4030_GPIO_MAX)
522 || !(gpio_usage_count & (0x1 << gpio))))
525 base = REG_GPIO_DEBEN1 + d_bnk;
527 ret = gpio_twl4030_read(base);
530 reg = (u8) ((ret) | (d_msk));
532 reg = (u8) ((ret) & ~(d_msk));
534 ret = gpio_twl4030_write(base, reg);
539 EXPORT_SYMBOL(twl4030_set_gpio_debounce);
542 * Configure Card detect for GPIO pin on TWL4030
544 int twl4030_set_gpio_card_detect(int gpio, int enable)
547 u8 msk = (1 << gpio);
550 /* Only GPIO 0 or 1 can be used for CD feature.. */
551 if (unlikely((gpio >= TWL4030_GPIO_MAX)
552 || !(gpio_usage_count & (0x1 << gpio))
553 || (gpio >= TWL4030_GPIO_MAX_CD))) {
558 ret = gpio_twl4030_read(REG_GPIO_CTRL);
561 reg = (u8) (ret | msk);
563 reg = (u8) (ret & ~msk);
565 ret = gpio_twl4030_write(REG_GPIO_CTRL, reg);
570 EXPORT_SYMBOL(twl4030_set_gpio_card_detect);
572 /* MODULE FUNCTIONS */
575 * gpio_unmask_thread() runs as a kernel thread. It is awakened by the unmask
576 * method for the GPIO interrupts. It unmasks all of the GPIO interrupts
577 * specified in the gpio_pending_unmask bitmask. We have to do the unmasking
578 * in a kernel thread rather than directly in the unmask method because of the
579 * need to access the TWL4030 via the I2C bus. Note that we don't need to be
580 * concerned about race conditions where the request to unmask a GPIO interrupt
581 * has already been cancelled before this thread does the unmasking. If a GPIO
582 * interrupt is improperly unmasked, then the IRQ handler for it will mask it
583 * when an interrupt occurs.
585 static int twl4030_gpio_unmask_thread(void *data)
587 current->flags |= PF_NOFREEZE;
589 while (!kthread_should_stop()) {
591 unsigned int gpio_unmask;
594 gpio_unmask = gpio_pending_unmask;
595 gpio_pending_unmask = 0;
598 for (irq = TWL4030_GPIO_IRQ_BASE; 0 != gpio_unmask;
599 gpio_unmask >>= 1, irq++) {
600 if (gpio_unmask & 0x1)
601 twl4030_gpio_unmask(irq);
605 if (!gpio_pending_unmask)
606 set_current_state(TASK_INTERRUPTIBLE);
611 set_current_state(TASK_RUNNING);
616 * do_twl4030_gpio_irq() is the desc->handle method for each of the twl4030
617 * gpio interrupts. It executes in kernel thread context.
618 * On entry, cpu interrupts are enabled.
620 static void do_twl4030_gpio_irq(unsigned int irq, irq_desc_t *desc)
622 struct irqaction *action;
623 const unsigned int cpu = smp_processor_id();
625 desc->status |= IRQ_LEVEL;
628 * Acknowledge, clear _AND_ disable the interrupt.
630 twl4030_gpio_mask_and_ack(irq);
633 kstat_cpu(cpu).irqs[irq]++;
635 action = desc->action;
641 /* Call the ISR with cpu interrupts enabled. */
642 ret = action->handler(irq, action->dev_id);
643 if (ret == IRQ_HANDLED)
644 status |= action->flags;
646 action = action->next;
649 if (retval != IRQ_HANDLED)
650 printk(KERN_ERR "ISR for TWL4030 GPIO"
651 " irq %d can't handle interrupt\n",
655 twl4030_gpio_unmask(irq);
661 * do_twl4030_gpio_module_irq() is the desc->handle method for the twl4030 gpio
662 * module interrupt. It executes in kernel thread context.
663 * This is a chained interrupt, so there is no desc->action method for it.
664 * We query the gpio module interrupt controller in the twl4030 to determine
665 * which gpio lines are generating interrupt requests, and then call the
666 * desc->handle method for each gpio that needs service.
667 * On entry, cpu interrupts are disabled.
669 static void do_twl4030_gpio_module_irq(unsigned int irq, irq_desc_t *desc)
671 const unsigned int cpu = smp_processor_id();
673 desc->status |= IRQ_LEVEL;
675 * The desc->handle method would normally call the desc->chip->ack
676 * method here, but we won't bother since our ack method is NULL.
680 unsigned int gpio_isr;
682 kstat_cpu(cpu).irqs[irq]++;
686 if (gpio_read_isr(&gpio_isr))
690 for (gpio_irq = TWL4030_GPIO_IRQ_BASE; 0 != gpio_isr;
691 gpio_isr >>= 1, gpio_irq++) {
692 if (gpio_isr & 0x1) {
693 irq_desc_t *d = irq_desc + gpio_irq;
694 d->handle_irq(gpio_irq, d);
700 * Here is where we should call the unmask method, but again we
701 * won't bother since it is NULL.
706 /* TWL4030 Initialization module */
707 static int __init gpio_twl4030_init(void)
712 /* init the global locking sem */
713 sema_init(&gpio_sem, 1);
715 /* All GPIO interrupts are initially masked */
716 gpio_pending_unmask = 0;
717 gpio_imr_shadow = GPIO_32_MASK;
718 ret = gpio_write_imr(gpio_imr_shadow);
721 * Create a kernel thread to handle deferred unmasking of gpio
724 gpio_unmask_thread = kthread_create(twl4030_gpio_unmask_thread,
725 NULL, "twl4030 gpio");
726 if (!gpio_unmask_thread) {
728 "%s: could not create twl4030 gpio unmask"
729 " thread!\n", __func__);
735 /* install an irq handler for each of the gpio interrupts */
736 for (irq = TWL4030_GPIO_IRQ_BASE; irq < TWL4030_GPIO_IRQ_END;
738 set_irq_chip(irq, &twl4030_gpio_irq_chip);
739 set_irq_handler(irq, do_twl4030_gpio_irq);
740 set_irq_flags(irq, IRQF_VALID);
744 * Install an irq handler to demultiplex the gpio module
747 set_irq_chip(TWL4030_MODIRQ_GPIO,
748 &twl4030_gpio_module_irq_chip);
749 set_irq_chained_handler(TWL4030_MODIRQ_GPIO,
750 do_twl4030_gpio_module_irq);
753 printk(KERN_INFO "TWL4030 GPIO Demux: IRQ Range %d to %d,"
754 " Initialization %s\n", TWL4030_GPIO_IRQ_BASE,
755 TWL4030_GPIO_IRQ_END, (ret) ? "Failed" : "Success");
759 /* TWL GPIO exit module */
760 static void __exit gpio_twl4030_exit(void)
764 /* uninstall the gpio demultiplexing interrupt handler */
765 set_irq_handler(TWL4030_MODIRQ_GPIO, NULL);
766 set_irq_flags(TWL4030_MODIRQ_GPIO, 0);
768 /* uninstall the irq handler for each of the gpio interrupts */
769 for (irq = TWL4030_GPIO_IRQ_BASE; irq < TWL4030_GPIO_IRQ_END; irq++) {
770 set_irq_handler(irq, NULL);
771 set_irq_flags(irq, 0);
774 /* stop the gpio unmask kernel thread */
775 if (gpio_unmask_thread) {
776 kthread_stop(gpio_unmask_thread);
777 gpio_unmask_thread = NULL;
781 module_init(gpio_twl4030_init);
782 module_exit(gpio_twl4030_exit);
784 MODULE_ALIAS("i2c:twl4030-gpio");
785 MODULE_AUTHOR("Texas Instruments, Inc.");
786 MODULE_DESCRIPTION("GPIO interface for TWL4030");
787 MODULE_LICENSE("GPL");