2 * twl4030_core.c - driver for TWL4030 PM and audio CODEC device
4 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 #include <linux/module.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/init.h>
34 #include <linux/time.h>
35 #include <linux/mutex.h>
36 #include <linux/interrupt.h>
37 #include <linux/random.h>
38 #include <linux/syscalls.h>
39 #include <linux/kthread.h>
41 #include <linux/i2c.h>
42 #include <linux/i2c/twl4030.h>
43 #include <linux/i2c/twl4030-gpio.h>
44 #include <linux/i2c/twl4030-madc.h>
45 #include <linux/i2c/twl4030-pwrirq.h>
46 #include <linux/slab.h>
47 #include <linux/clk.h>
48 #include <linux/device.h>
49 #include <linux/irq.h>
51 #include <asm/mach/irq.h>
53 #include <asm/arch/gpio.h>
54 #include <asm/arch/mux.h>
56 #define DRIVER_NAME "twl4030"
58 /* Macro Definitions */
59 #define TWL_CLIENT_STRING "TWL4030-ID"
60 #define TWL_CLIENT_USED 1
61 #define TWL_CLIENT_FREE 0
67 /* Primary Interrupt Handler on TWL4030 Registers */
69 /* Register Definitions */
71 #define REG_PIH_ISR_P1 (0x1)
72 #define REG_PIH_ISR_P2 (0x2)
73 #define REG_PIH_SIR (0x3)
75 /* Triton Core internal information (BEGIN) */
77 /* Last - for index max*/
78 #define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
81 #define TWL4030_NUM_SLAVES 0x04
82 #define TWL4030_SLAVENUM_NUM0 0x00
83 #define TWL4030_SLAVENUM_NUM1 0x01
84 #define TWL4030_SLAVENUM_NUM2 0x02
85 #define TWL4030_SLAVENUM_NUM3 0x03
86 #define TWL4030_SLAVEID_ID0 0x48
87 #define TWL4030_SLAVEID_ID1 0x49
88 #define TWL4030_SLAVEID_ID2 0x4A
89 #define TWL4030_SLAVEID_ID3 0x4B
91 /* Base Address defns */
93 #define TWL4030_BASEADD_USB 0x0000
95 #define TWL4030_BASEADD_AUDIO_VOICE 0x0000
96 #define TWL4030_BASEADD_GPIO 0x0098
98 #define TWL4030_BASEADD_INTBR 0x0085
99 #define TWL4030_BASEADD_PIH 0x0080
100 #define TWL4030_BASEADD_TEST 0x004C
102 #define TWL4030_BASEADD_INTERRUPTS 0x00B9
103 #define TWL4030_BASEADD_LED 0x00EE
104 #define TWL4030_BASEADD_MADC 0x0000
105 #define TWL4030_BASEADD_MAIN_CHARGE 0x0074
106 #define TWL4030_BASEADD_PRECHARGE 0x00AA
107 #define TWL4030_BASEADD_PWM0 0x00F8
108 #define TWL4030_BASEADD_PWM1 0x00FB
109 #define TWL4030_BASEADD_PWMA 0x00EF
110 #define TWL4030_BASEADD_PWMB 0x00F1
111 #define TWL4030_BASEADD_KEYPAD 0x00D2
113 #define TWL4030_BASEADD_BACKUP 0x0014
114 #define TWL4030_BASEADD_INT 0x002E
115 #define TWL4030_BASEADD_PM_MASTER 0x0036
116 #define TWL4030_BASEADD_PM_RECEIVER 0x005B
117 #define TWL4030_BASEADD_RTC 0x001C
118 #define TWL4030_BASEADD_SECURED_REG 0x0000
120 /* TWL4030 BCI registers */
121 #define TWL4030_INTERRUPTS_BCIIMR1A 0x2
122 #define TWL4030_INTERRUPTS_BCIIMR2A 0x3
123 #define TWL4030_INTERRUPTS_BCIIMR1B 0x6
124 #define TWL4030_INTERRUPTS_BCIIMR2B 0x7
125 #define TWL4030_INTERRUPTS_BCIISR1A 0x0
126 #define TWL4030_INTERRUPTS_BCIISR2A 0x1
127 #define TWL4030_INTERRUPTS_BCIISR1B 0x4
128 #define TWL4030_INTERRUPTS_BCIISR2B 0x5
130 /* TWL4030 keypad registers */
131 #define TWL4030_KEYPAD_KEYP_IMR1 0x12
132 #define TWL4030_KEYPAD_KEYP_IMR2 0x14
133 #define TWL4030_KEYPAD_KEYP_ISR1 0x11
134 #define TWL4030_KEYPAD_KEYP_ISR2 0x13
137 /* Triton Core internal information (END) */
139 /* Few power values */
140 #define R_CFG_BOOT 0x05
141 #define R_PROTECT_KEY 0x0E
144 #define KEY_UNLOCK1 0xce
145 #define KEY_UNLOCK2 0xec
146 #define KEY_LOCK 0x00
148 #define HFCLK_FREQ_19p2_MHZ (1 << 0)
149 #define HFCLK_FREQ_26_MHZ (2 << 0)
150 #define HFCLK_FREQ_38p4_MHZ (3 << 0)
151 #define HIGH_PERF_SQ (1 << 3)
153 /* on I2C-1 for 2430SDP */
154 #define CONFIG_I2C_TWL4030_ID 1
156 /* SIH_CTRL registers that aren't defined elsewhere */
157 #define TWL4030_INTERRUPTS_BCISIHCTRL 0x0d
158 #define TWL4030_MADC_MADC_SIH_CTRL 0x67
159 #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
161 #define TWL4030_SIH_CTRL_COR_MASK (1 << 2)
164 * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init
165 * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO)
166 * @sih_ctrl: address of module SIH_CTRL register
167 * @reg_cnt: number of IMR/ISR regs
168 * @imrs: pointer to array of TWL module interrupt mask register indices
169 * @isrs: pointer to array of TWL module interrupt status register indices
171 * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear
172 * during twl_init_irq().
174 struct twl4030_mod_iregs {
182 /* TWL4030 INT module interrupt mask registers */
183 static const u8 __initconst twl4030_int_imr_regs[] = {
184 TWL4030_INT_PWR_IMR1,
185 TWL4030_INT_PWR_IMR2,
188 /* TWL4030 INT module interrupt status registers */
189 static const u8 __initconst twl4030_int_isr_regs[] = {
190 TWL4030_INT_PWR_ISR1,
191 TWL4030_INT_PWR_ISR2,
194 /* TWL4030 INTERRUPTS module interrupt mask registers */
195 static const u8 __initconst twl4030_interrupts_imr_regs[] = {
196 TWL4030_INTERRUPTS_BCIIMR1A,
197 TWL4030_INTERRUPTS_BCIIMR1B,
198 TWL4030_INTERRUPTS_BCIIMR2A,
199 TWL4030_INTERRUPTS_BCIIMR2B,
202 /* TWL4030 INTERRUPTS module interrupt status registers */
203 static const u8 __initconst twl4030_interrupts_isr_regs[] = {
204 TWL4030_INTERRUPTS_BCIISR1A,
205 TWL4030_INTERRUPTS_BCIISR1B,
206 TWL4030_INTERRUPTS_BCIISR2A,
207 TWL4030_INTERRUPTS_BCIISR2B,
210 /* TWL4030 MADC module interrupt mask registers */
211 static const u8 __initconst twl4030_madc_imr_regs[] = {
216 /* TWL4030 MADC module interrupt status registers */
217 static const u8 __initconst twl4030_madc_isr_regs[] = {
222 /* TWL4030 keypad module interrupt mask registers */
223 static const u8 __initconst twl4030_keypad_imr_regs[] = {
224 TWL4030_KEYPAD_KEYP_IMR1,
225 TWL4030_KEYPAD_KEYP_IMR2,
228 /* TWL4030 keypad module interrupt status registers */
229 static const u8 __initconst twl4030_keypad_isr_regs[] = {
230 TWL4030_KEYPAD_KEYP_ISR1,
231 TWL4030_KEYPAD_KEYP_ISR2,
234 /* TWL4030 GPIO module interrupt mask registers */
235 static const u8 __initconst twl4030_gpio_imr_regs[] = {
244 /* TWL4030 GPIO module interrupt status registers */
245 static const u8 __initconst twl4030_gpio_isr_regs[] = {
254 /* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */
255 static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = {
257 .mod_no = TWL4030_MODULE_INT,
258 .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL,
259 .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs),
260 .imrs = twl4030_int_imr_regs,
261 .isrs = twl4030_int_isr_regs,
264 .mod_no = TWL4030_MODULE_INTERRUPTS,
265 .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL,
266 .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs),
267 .imrs = twl4030_interrupts_imr_regs,
268 .isrs = twl4030_interrupts_isr_regs,
271 .mod_no = TWL4030_MODULE_MADC,
272 .sih_ctrl = TWL4030_MADC_MADC_SIH_CTRL,
273 .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs),
274 .imrs = twl4030_madc_imr_regs,
275 .isrs = twl4030_madc_isr_regs,
278 .mod_no = TWL4030_MODULE_KEYPAD,
279 .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL,
280 .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs),
281 .imrs = twl4030_keypad_imr_regs,
282 .isrs = twl4030_keypad_isr_regs,
285 .mod_no = TWL4030_MODULE_GPIO,
286 .sih_ctrl = REG_GPIO_SIH_CTRL,
287 .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs),
288 .imrs = twl4030_gpio_imr_regs,
289 .isrs = twl4030_gpio_isr_regs,
294 /* Helper functions */
296 twl4030_detect_client(struct i2c_adapter *adapter, unsigned char sid);
297 static int twl4030_attach_adapter(struct i2c_adapter *adapter);
298 static int twl4030_detach_client(struct i2c_client *client);
299 static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc);
301 static void twl_init_irq(void);
303 /* Data Structures */
304 /* To have info on T2 IRQ substem activated or not */
305 static unsigned char twl_irq_used = FREE;
306 static struct completion irq_event;
308 /* Structure to define on TWL4030 Slave ID */
309 struct twl4030_client {
310 struct i2c_client client;
311 const char client_name[sizeof(TWL_CLIENT_STRING) + 1];
312 const unsigned char address;
313 const char adapter_index;
316 /* max numb of i2c_msg required is for read =2 */
317 struct i2c_msg xfer_msg[2];
319 /* To lock access to xfer_msg */
320 struct mutex xfer_lock;
324 struct twl4030mapping {
325 unsigned char sid; /* Slave ID */
326 unsigned char base; /* base address */
329 /* mapping the module id to slave id and base address */
330 static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
331 { TWL4030_SLAVENUM_NUM0, TWL4030_BASEADD_USB },
332 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_AUDIO_VOICE },
333 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_GPIO },
334 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_INTBR },
335 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_PIH },
336 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_TEST },
337 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_KEYPAD },
338 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_MADC },
339 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_INTERRUPTS },
340 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_LED },
341 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_MAIN_CHARGE },
342 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PRECHARGE },
343 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWM0 },
344 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWM1 },
345 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWMA },
346 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWMB },
347 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_BACKUP },
348 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_INT },
349 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_PM_MASTER },
350 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_PM_RECEIVER },
351 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_RTC },
352 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_SECURED_REG },
355 static struct twl4030_client twl4030_modules[TWL4030_NUM_SLAVES] = {
357 .address = TWL4030_SLAVEID_ID0,
358 .client_name = TWL_CLIENT_STRING "0",
359 .adapter_index = CONFIG_I2C_TWL4030_ID,
362 .address = TWL4030_SLAVEID_ID1,
363 .client_name = TWL_CLIENT_STRING "1",
364 .adapter_index = CONFIG_I2C_TWL4030_ID,
367 .address = TWL4030_SLAVEID_ID2,
368 .client_name = TWL_CLIENT_STRING "2",
369 .adapter_index = CONFIG_I2C_TWL4030_ID,
372 .address = TWL4030_SLAVEID_ID3,
373 .client_name = TWL_CLIENT_STRING "3",
374 .adapter_index = CONFIG_I2C_TWL4030_ID,
378 /* One Client Driver , 4 Clients */
379 static struct i2c_driver twl4030_driver = {
382 .owner = THIS_MODULE,
384 .attach_adapter = twl4030_attach_adapter,
385 .detach_client = twl4030_detach_client,
389 * TWL4030 doesn't have PIH mask, hence dummy function for mask
393 static void twl4030_i2c_ackirq(unsigned int irq) {}
394 static void twl4030_i2c_disableint(unsigned int irq) {}
395 static void twl4030_i2c_enableint(unsigned int irq) {}
397 /* information for processing in the Work Item */
398 static struct irq_chip twl4030_irq_chip = {
400 .ack = twl4030_i2c_ackirq,
401 .mask = twl4030_i2c_disableint,
402 .unmask = twl4030_i2c_enableint,
405 /* Global Functions */
408 * twl4030_i2c_write - Writes a n bit register in TWL4030
409 * @mod_no: module number
410 * @value: an array of num_bytes+1 containing data to write
411 * @reg: register address (just offset will do)
412 * @num_bytes: number of bytes to transfer
414 * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and
415 * valid data starts at Offset 1.
417 * Returns the result of operation - 0 is success
419 int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes)
423 struct twl4030_client *twl;
426 if (unlikely(mod_no > TWL4030_MODULE_LAST)) {
427 pr_err("Invalid module Number\n");
430 sid = twl4030_map[mod_no].sid;
431 twl = &twl4030_modules[sid];
433 if (unlikely(twl->inuse != TWL_CLIENT_USED)) {
434 pr_err("I2C Client[%d] is not initialized[%d]\n",
438 mutex_lock(&twl->xfer_lock);
440 * [MSG1]: fill the register address data
441 * fill the data Tx buffer
443 msg = &twl->xfer_msg[0];
444 msg->addr = twl->address;
445 msg->len = num_bytes + 1;
448 /* over write the first byte of buffer with the register address */
449 *value = twl4030_map[mod_no].base + reg;
450 ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
451 mutex_unlock(&twl->xfer_lock);
453 /* i2cTransfer returns num messages.translate it pls.. */
458 EXPORT_SYMBOL(twl4030_i2c_write);
461 * twl4030_i2c_read - Reads a n bit register in TWL4030
462 * @mod_no: module number
463 * @value: an array of num_bytes containing data to be read
464 * @reg: register address (just offset will do)
465 * @num_bytes: number of bytes to transfer
467 * Returns result of operation - num_bytes is success else failure.
469 int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes)
474 struct twl4030_client *twl;
477 if (unlikely(mod_no > TWL4030_MODULE_LAST)) {
478 pr_err("Invalid module Number\n");
481 sid = twl4030_map[mod_no].sid;
482 twl = &twl4030_modules[sid];
484 if (unlikely(twl->inuse != TWL_CLIENT_USED)) {
485 pr_err("I2C Client[%d] is not initialized[%d]\n", sid,
489 mutex_lock(&twl->xfer_lock);
490 /* [MSG1] fill the register address data */
491 msg = &twl->xfer_msg[0];
492 msg->addr = twl->address;
494 msg->flags = 0; /* Read the register value */
495 val = twl4030_map[mod_no].base + reg;
497 /* [MSG2] fill the data rx buffer */
498 msg = &twl->xfer_msg[1];
499 msg->addr = twl->address;
500 msg->flags = I2C_M_RD; /* Read the register value */
501 msg->len = num_bytes; /* only n bytes */
503 ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 2);
504 mutex_unlock(&twl->xfer_lock);
506 /* i2cTransfer returns num messages.translate it pls.. */
511 EXPORT_SYMBOL(twl4030_i2c_read);
514 * twl4030_i2c_write_u8 - Writes a 8 bit register in TWL4030
515 * @mod_no: module number
516 * @value: the value to be written 8 bit
517 * @reg: register address (just offset will do)
519 * Returns result of operation - 0 is success
521 int twl4030_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
524 /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
525 u8 temp_buffer[2] = { 0 };
526 /* offset 1 contains the data */
527 temp_buffer[1] = value;
528 return twl4030_i2c_write(mod_no, temp_buffer, reg, 1);
530 EXPORT_SYMBOL(twl4030_i2c_write_u8);
533 * twl4030_i2c_read_u8 - Reads a 8 bit register from TWL4030
534 * @mod_no: module number
535 * @value: the value read 8 bit
536 * @reg: register address (just offset will do)
538 * Returns result of operation - 0 is success
540 int twl4030_i2c_read_u8(u8 mod_no, u8 *value, u8 reg)
542 return twl4030_i2c_read(mod_no, value, reg, 1);
544 EXPORT_SYMBOL(twl4030_i2c_read_u8);
546 /* Helper Functions */
549 * do_twl4030_module_irq() is the desc->handle method for each of the twl4030
550 * module interrupts. It executes in kernel thread context.
551 * On entry, cpu interrupts are disabled.
553 static void do_twl4030_module_irq(unsigned int irq, irq_desc_t *desc)
555 struct irqaction *action;
556 const unsigned int cpu = smp_processor_id();
559 * Earlier this was desc->triggered = 1;
561 desc->status |= IRQ_LEVEL;
564 * The desc->handle method would normally call the desc->chip->ack
565 * method here, but we won't bother since our ack method is NULL.
569 kstat_cpu(cpu).irqs[irq]++;
571 action = desc->action;
580 /* Call the ISR with cpu interrupts enabled */
581 ret = action->handler(irq, action->dev_id);
582 if (ret == IRQ_HANDLED)
583 status |= action->flags;
585 action = action->next;
588 if (status & IRQF_SAMPLE_RANDOM)
589 add_interrupt_randomness(irq);
593 if (retval != IRQ_HANDLED)
594 printk(KERN_ERR "ISR for TWL4030 module"
595 " irq %d can't handle interrupt\n",
599 * Here is where we should call the unmask method, but
600 * again we won't bother since it is NULL.
603 printk(KERN_CRIT "TWL4030 module irq %d has no ISR"
604 " but can't be masked!\n", irq);
606 printk(KERN_CRIT "TWL4030 module irq %d is disabled but can't"
607 " be masked!\n", irq);
611 * twl4030_irq_thread() runs as a kernel thread. It queries the twl4030
612 * interrupt controller to see which modules are generating interrupt requests
613 * and then calls the desc->handle method for each module requesting service.
615 static int twl4030_irq_thread(void *data)
618 irq_desc_t *desc = irq_desc + irq;
619 static unsigned i2c_errors;
620 const static unsigned max_i2c_errors = 100;
622 daemonize("twl4030-irq");
623 current->flags |= PF_NOFREEZE;
625 while (!kthread_should_stop()) {
630 wait_for_completion_interruptible(&irq_event);
632 ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr,
635 printk(KERN_WARNING "I2C error %d while reading TWL4030"
636 " PIH ISR register.\n", ret);
637 if (++i2c_errors >= max_i2c_errors) {
638 printk(KERN_ERR "Maximum I2C error count"
639 " exceeded. Terminating %s.\n",
646 for (module_irq = TWL4030_IRQ_BASE; 0 != pih_isr;
647 pih_isr >>= 1, module_irq++) {
649 irq_desc_t *d = irq_desc + module_irq;
653 d->handle_irq(module_irq, d);
659 desc->chip->unmask(irq);
666 * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt.
667 * This is a chained interrupt, so there is no desc->action method for it.
668 * Now we need to query the interrupt controller in the twl4030 to determine
669 * which module is generating the interrupt request. However, we can't do i2c
670 * transactions in interrupt context, so we must defer that work to a kernel
671 * thread. All we do here is acknowledge and mask the interrupt and wakeup
674 static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc)
676 const unsigned int cpu = smp_processor_id();
679 * Earlier this was desc->triggered = 1;
681 desc->status |= IRQ_LEVEL;
684 * Acknowledge, clear _AND_ disable the interrupt.
686 desc->chip->ack(irq);
689 kstat_cpu(cpu).irqs[irq]++;
691 complete(&irq_event);
695 /* attach a client to the adapter */
696 static int __init twl4030_detect_client(struct i2c_adapter *adapter,
700 struct twl4030_client *twl;
702 if (unlikely(sid >= TWL4030_NUM_SLAVES)) {
703 pr_err("sid[%d] > MOD_LAST[%d]\n", sid, TWL4030_NUM_SLAVES);
707 /* Check basic functionality */
708 err = i2c_check_functionality(adapter,
709 I2C_FUNC_SMBUS_WORD_DATA
710 | I2C_FUNC_SMBUS_WRITE_BYTE);
712 pr_err("SlaveID=%d functionality check failed\n", sid);
715 twl = &twl4030_modules[sid];
716 if (unlikely(twl->inuse)) {
717 pr_err("Client %s is already in use\n", twl->client_name);
721 memset(&twl->client, 0, sizeof(struct i2c_client));
723 twl->client.addr = twl->address;
724 twl->client.adapter = adapter;
725 twl->client.driver = &twl4030_driver;
727 memcpy(&twl->client.name, twl->client_name,
728 sizeof(TWL_CLIENT_STRING) + 1);
730 pr_info("TWL4030: TRY attach Slave %s on Adapter %s [%x]\n",
731 twl->client_name, adapter->name, err);
733 err = i2c_attach_client(&twl->client);
735 pr_err("Couldn't attach Slave %s on Adapter"
736 "%s [%x]\n", twl->client_name, adapter->name, err);
738 twl->inuse = TWL_CLIENT_USED;
739 mutex_init(&twl->xfer_lock);
745 /* adapter callback */
746 static int __init twl4030_attach_adapter(struct i2c_adapter *adapter)
750 static int twl_i2c_adapter = 1;
752 for (i = 0; i < TWL4030_NUM_SLAVES; i++) {
753 /* Check if I need to hook on to this adapter or not */
754 if (twl4030_modules[i].adapter_index == twl_i2c_adapter) {
755 ret = twl4030_detect_client(adapter, i);
763 * Check if the PIH module is initialized, if yes, then init
764 * the T2 Interrupt subsystem
766 if ((twl4030_modules[twl4030_map[TWL4030_MODULE_PIH].sid].inuse ==
767 TWL_CLIENT_USED) && (twl_irq_used != USED)) {
774 pr_err("TWL_CLIENT(Idx=%d] registration failed[0x%x]\n", i, ret);
776 /* ignore current slave..it never got registered */
779 /* now remove all those from the current adapter... */
780 if (twl4030_modules[i].adapter_index == twl_i2c_adapter)
781 (void)twl4030_detach_client(&twl4030_modules[i].client);
787 /* adapter's callback */
788 static int twl4030_detach_client(struct i2c_client *client)
791 err = i2c_detach_client(client);
793 pr_err("Client detach failed\n");
799 static struct task_struct * __init start_twl4030_irq_thread(int irq)
801 struct task_struct *thread;
803 init_completion(&irq_event);
804 thread = kthread_run(twl4030_irq_thread, (void *)irq,
805 "twl4030 irq %d", irq);
807 pr_err("%s: could not create twl4030 irq %d thread!\n",
814 * These three functions should be part of Voltage frame work
815 * added here to complete the functionality for now.
817 static int __init protect_pm_master(void)
821 e = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_LOCK,
826 static int __init unprotect_pm_master(void)
830 e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK1,
832 e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK2,
837 static int __init power_companion_init(void)
841 u8 ctrl = HFCLK_FREQ_26_MHZ;
844 if (cpu_is_omap2430())
845 osc = clk_get(NULL, "osc_ck");
847 osc = clk_get(NULL, "osc_sys_ck");
849 printk(KERN_WARNING "Skipping twl3040 internal clock init and "
850 "using bootloader value (unknown osc rate)\n");
854 rate = clk_get_rate(osc);
858 case 19200000 : ctrl = HFCLK_FREQ_19p2_MHZ; break;
859 case 26000000 : ctrl = HFCLK_FREQ_26_MHZ; break;
860 case 38400000 : ctrl = HFCLK_FREQ_38p4_MHZ; break;
863 ctrl |= HIGH_PERF_SQ;
864 e |= unprotect_pm_master();
865 /* effect->MADC+USB ck en */
866 e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
867 e |= protect_pm_master();
873 * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write
874 * @mod_no: TWL4030 module number
875 * @reg: register index to clear
876 * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0)
878 * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt
879 * status register to ensure that any prior interrupts are cleared.
880 * Returns the status from the I2C read operation.
882 static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor)
886 return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) :
887 twl4030_i2c_write_u8(mod_no, 0xff, reg);
891 * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes?
892 * @mod_no: TWL4030 module number
893 * @reg: register index to clear
895 * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for
896 * the specified TWL module are cleared by reads, or 0 if cleared by
899 static int twl4030_read_cor_bit(u8 mod_no, u8 reg)
903 WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0);
905 tmp &= TWL4030_SIH_CTRL_COR_MASK;
906 tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK);
912 * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts
913 * @t: pointer to twl4030_mod_iregs array
914 * @t_sz: ARRAY_SIZE(t) (starting at 1)
916 * Mask all TWL4030 interrupt mask registers (IMRs) and clear all
917 * interrupt status registers (ISRs). No return value, but will WARN if
918 * any I2C operations fail.
920 static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t,
926 * N.B. - further efficiency is possible here. Eight I2C
927 * operations on BCI and GPIO modules are avoidable if I2C
928 * burst read/write transactions were implemented. Would
929 * probably save about 1ms of boot time and a small amount of
932 for (i = 0; i < t_sz; i++) {
933 const struct twl4030_mod_iregs tmr = t[i];
936 /* Are ISRs cleared by reads or writes? */
937 cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
940 for (j = 0; j < tmr.reg_cnt; j++) {
942 /* Mask interrupts at the TWL4030 */
943 WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
946 /* Clear TWL4030 ISRs */
947 WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
948 tmr.isrs[j], cor) < 0);
956 static void twl_init_irq(void)
960 char *msg = "Unable to register interrupt subsystem";
961 unsigned int irq_num;
964 * Mask and clear all TWL4030 interrupts since initially we do
965 * not have any TWL4030 module interrupt handlers present
967 twl4030_mask_clear_intrs(twl4030_mod_regs,
968 ARRAY_SIZE(twl4030_mod_regs));
970 /* install an irq handler for each of the PIH modules */
971 for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) {
972 set_irq_chip(i, &twl4030_irq_chip);
973 set_irq_handler(i, do_twl4030_module_irq);
974 set_irq_flags(i, IRQF_VALID);
977 irq_num = (cpu_is_omap2430()) ? INT_24XX_SYS_NIRQ : INT_34XX_SYS_NIRQ;
979 /* install an irq handler to demultiplex the TWL4030 interrupt */
980 set_irq_data(irq_num, start_twl4030_irq_thread(irq_num));
981 set_irq_type(irq_num, IRQ_TYPE_EDGE_FALLING);
982 set_irq_chained_handler(irq_num, do_twl4030_irq);
984 res = power_companion_init();
986 pr_err("%s[%d][%d]\n", msg, res, __LINE__);
989 static int __init twl4030_init(void)
991 return i2c_add_driver(&twl4030_driver);
994 static void __exit twl4030_exit(void)
996 i2c_del_driver(&twl4030_driver);
1000 subsys_initcall(twl4030_init);
1001 module_exit(twl4030_exit);
1003 MODULE_ALIAS("i2c:" DRIVER_NAME);
1004 MODULE_AUTHOR("Texas Instruments, Inc.");
1005 MODULE_DESCRIPTION("I2C Core interface for TWL4030");
1006 MODULE_LICENSE("GPL");