2 piix4.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Serverworks OSB4, CSB5, CSB6, HT-1000
26 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
29 Note: we assume there can only be one device, with one SMBus interface.
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/pci.h>
35 #include <linux/kernel.h>
36 #include <linux/delay.h>
37 #include <linux/stddef.h>
38 #include <linux/ioport.h>
39 #include <linux/i2c.h>
40 #include <linux/init.h>
41 #include <linux/dmi.h>
42 #include <linux/acpi.h>
46 /* PIIX4 SMBus address offsets */
47 #define SMBHSTSTS (0 + piix4_smba)
48 #define SMBHSLVSTS (1 + piix4_smba)
49 #define SMBHSTCNT (2 + piix4_smba)
50 #define SMBHSTCMD (3 + piix4_smba)
51 #define SMBHSTADD (4 + piix4_smba)
52 #define SMBHSTDAT0 (5 + piix4_smba)
53 #define SMBHSTDAT1 (6 + piix4_smba)
54 #define SMBBLKDAT (7 + piix4_smba)
55 #define SMBSLVCNT (8 + piix4_smba)
56 #define SMBSHDWCMD (9 + piix4_smba)
57 #define SMBSLVEVT (0xA + piix4_smba)
58 #define SMBSLVDAT (0xC + piix4_smba)
60 /* count for request_region */
63 /* PCI Address Constants */
65 #define SMBHSTCFG 0x0D2
67 #define SMBSHDW1 0x0D4
68 #define SMBSHDW2 0x0D5
72 #define MAX_TIMEOUT 500
76 #define PIIX4_QUICK 0x00
77 #define PIIX4_BYTE 0x04
78 #define PIIX4_BYTE_DATA 0x08
79 #define PIIX4_WORD_DATA 0x0C
80 #define PIIX4_BLOCK_DATA 0x14
82 /* insmod parameters */
84 /* If force is set to anything different from 0, we forcibly enable the
87 module_param (force, int, 0);
88 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
90 /* If force_addr is set to anything different from 0, we forcibly enable
91 the PIIX4 at the given address. VERY DANGEROUS! */
92 static int force_addr;
93 module_param (force_addr, int, 0);
94 MODULE_PARM_DESC(force_addr,
95 "Forcibly enable the PIIX4 at the given address. "
96 "EXTREMELY DANGEROUS!");
98 static unsigned short piix4_smba;
99 static int srvrworks_csb5_delay;
100 static struct pci_driver piix4_driver;
101 static struct i2c_adapter piix4_adapter;
103 static struct dmi_system_id __devinitdata piix4_dmi_blacklist[] = {
105 .ident = "Sapphire AM2RD790",
107 DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
108 DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
112 .ident = "DFI Lanparty UT 790FX",
114 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
115 DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
121 /* The IBM entry is in a separate table because we only check it
122 on Intel-based systems */
123 static struct dmi_system_id __devinitdata piix4_dmi_ibm[] = {
126 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
131 static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
132 const struct pci_device_id *id)
136 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
137 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
138 srvrworks_csb5_delay = 1;
140 /* On some motherboards, it was reported that accessing the SMBus
141 caused severe hardware problems */
142 if (dmi_check_system(piix4_dmi_blacklist)) {
143 dev_err(&PIIX4_dev->dev,
144 "Accessing the SMBus on this system is unsafe!\n");
148 /* Don't access SMBus on IBM systems which get corrupted eeproms */
149 if (dmi_check_system(piix4_dmi_ibm) &&
150 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
151 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
152 "may corrupt your serial eeprom! Refusing to load "
157 /* Determine the address of the SMBus areas */
159 piix4_smba = force_addr & 0xfff0;
162 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
163 piix4_smba &= 0xfff0;
164 if(piix4_smba == 0) {
165 dev_err(&PIIX4_dev->dev, "SMBus base address "
166 "uninitialized - upgrade BIOS or use "
167 "force_addr=0xaddr\n");
172 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
175 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
176 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
181 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
183 /* If force_addr is set, we program the new address here. Just to make
184 sure, we disable the PIIX4 first. */
186 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
187 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
188 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
189 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
190 "new address %04x!\n", piix4_smba);
191 } else if ((temp & 1) == 0) {
193 /* This should never need to be done, but has been
194 * noted that many Dell machines have the SMBus
195 * interface on the PIIX4 disabled!? NOTE: This assumes
196 * I/O space and other allocations WERE done by the
197 * Bios! Don't complain if your hardware does weird
198 * things after enabling this. :') Check for Bios
199 * updates before resorting to this.
201 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
203 dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
204 "WARNING: SMBus interface has been "
205 "FORCEFULLY ENABLED!\n");
207 dev_err(&PIIX4_dev->dev,
208 "Host SMBus controller not enabled!\n");
209 release_region(piix4_smba, SMBIOSIZE);
215 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
216 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
217 else if ((temp & 0x0E) == 0)
218 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
220 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
221 "(or code out of date)!\n");
223 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
224 dev_info(&PIIX4_dev->dev,
225 "SMBus Host Controller at 0x%x, revision %d\n",
231 static int piix4_transaction(void)
237 dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
238 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
239 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
242 /* Make sure the SMBus host is ready to start transmitting */
243 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
244 dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). "
245 "Resetting...\n", temp);
246 outb_p(temp, SMBHSTSTS);
247 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
248 dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
251 dev_dbg(&piix4_adapter.dev, "Successful!\n");
255 /* start the transaction by setting bit 6 */
256 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
258 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
259 if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
264 while ((timeout++ < MAX_TIMEOUT) &&
265 ((temp = inb_p(SMBHSTSTS)) & 0x01))
268 /* If the SMBus is still busy, we give up */
269 if (timeout >= MAX_TIMEOUT) {
270 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
276 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
281 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
282 "locked until next hard reset. (sorry!)\n");
283 /* Clock stops and slave is stuck in mid-transmission */
288 dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
291 if (inb_p(SMBHSTSTS) != 0x00)
292 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
294 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
295 dev_err(&piix4_adapter.dev, "Failed reset at end of "
296 "transaction (%02x)\n", temp);
298 dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
299 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
300 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
305 /* Return negative errno on error. */
306 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
307 unsigned short flags, char read_write,
308 u8 command, int size, union i2c_smbus_data * data)
314 case I2C_SMBUS_QUICK:
315 outb_p((addr << 1) | read_write,
320 outb_p((addr << 1) | read_write,
322 if (read_write == I2C_SMBUS_WRITE)
323 outb_p(command, SMBHSTCMD);
326 case I2C_SMBUS_BYTE_DATA:
327 outb_p((addr << 1) | read_write,
329 outb_p(command, SMBHSTCMD);
330 if (read_write == I2C_SMBUS_WRITE)
331 outb_p(data->byte, SMBHSTDAT0);
332 size = PIIX4_BYTE_DATA;
334 case I2C_SMBUS_WORD_DATA:
335 outb_p((addr << 1) | read_write,
337 outb_p(command, SMBHSTCMD);
338 if (read_write == I2C_SMBUS_WRITE) {
339 outb_p(data->word & 0xff, SMBHSTDAT0);
340 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
342 size = PIIX4_WORD_DATA;
344 case I2C_SMBUS_BLOCK_DATA:
345 outb_p((addr << 1) | read_write,
347 outb_p(command, SMBHSTCMD);
348 if (read_write == I2C_SMBUS_WRITE) {
349 len = data->block[0];
350 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
352 outb_p(len, SMBHSTDAT0);
353 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
354 for (i = 1; i <= len; i++)
355 outb_p(data->block[i], SMBBLKDAT);
357 size = PIIX4_BLOCK_DATA;
360 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
364 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
366 status = piix4_transaction();
370 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
376 case PIIX4_BYTE_DATA:
377 data->byte = inb_p(SMBHSTDAT0);
379 case PIIX4_WORD_DATA:
380 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
382 case PIIX4_BLOCK_DATA:
383 data->block[0] = inb_p(SMBHSTDAT0);
384 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
386 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
387 for (i = 1; i <= data->block[0]; i++)
388 data->block[i] = inb_p(SMBBLKDAT);
394 static u32 piix4_func(struct i2c_adapter *adapter)
396 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
397 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
398 I2C_FUNC_SMBUS_BLOCK_DATA;
401 static const struct i2c_algorithm smbus_algorithm = {
402 .smbus_xfer = piix4_access,
403 .functionality = piix4_func,
406 static struct i2c_adapter piix4_adapter = {
407 .owner = THIS_MODULE,
408 .id = I2C_HW_SMBUS_PIIX4,
409 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
410 .algo = &smbus_algorithm,
413 static struct pci_device_id piix4_ids[] = {
414 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
415 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
416 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
417 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
418 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
419 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
420 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
421 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
422 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
423 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
424 PCI_DEVICE_ID_SERVERWORKS_CSB5) },
425 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
426 PCI_DEVICE_ID_SERVERWORKS_CSB6) },
427 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
428 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
432 MODULE_DEVICE_TABLE (pci, piix4_ids);
434 static int __devinit piix4_probe(struct pci_dev *dev,
435 const struct pci_device_id *id)
439 retval = piix4_setup(dev, id);
443 /* set up the sysfs linkage to our parent device */
444 piix4_adapter.dev.parent = &dev->dev;
446 snprintf(piix4_adapter.name, sizeof(piix4_adapter.name),
447 "SMBus PIIX4 adapter at %04x", piix4_smba);
449 if ((retval = i2c_add_adapter(&piix4_adapter))) {
450 dev_err(&dev->dev, "Couldn't register adapter!\n");
451 release_region(piix4_smba, SMBIOSIZE);
458 static void __devexit piix4_remove(struct pci_dev *dev)
461 i2c_del_adapter(&piix4_adapter);
462 release_region(piix4_smba, SMBIOSIZE);
467 static struct pci_driver piix4_driver = {
468 .name = "piix4_smbus",
469 .id_table = piix4_ids,
470 .probe = piix4_probe,
471 .remove = __devexit_p(piix4_remove),
474 static int __init i2c_piix4_init(void)
476 return pci_register_driver(&piix4_driver);
479 static void __exit i2c_piix4_exit(void)
481 pci_unregister_driver(&piix4_driver);
484 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
485 "Philip Edelbrock <phil@netroedge.com>");
486 MODULE_DESCRIPTION("PIIX4 SMBus driver");
487 MODULE_LICENSE("GPL");
489 module_init(i2c_piix4_init);
490 module_exit(i2c_piix4_exit);