drivers/i2c/busses/i2c-omap.c

   1 /*
   2  * linux/drivers/i2c/i2c-omap.c
   3  *
   4  * TI OMAP I2C master mode driver
   5  *
   6  * Copyright (C) 2003 MontaVista Software, Inc.
   7  * Copyright (C) 2004 Texas Instruments.
   8  *
   9  * ----------------------------------------------------------------------------
  10  * This file was highly leveraged from i2c-elektor.c:
  11  *
  12  * Copyright 1995-97 Simon G. Vogl
  13  *           1998-99 Hans Berglund
  14  *
  15  * With some changes from Kysti M�kki <kmalkki@cc.hut.fi> and even
  16  * Frodo Looijaard <frodol@dds.nl>
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  *  You should have received a copy of the GNU General Public License
  29  *  along with this program; if not, write to the Free Software
  30  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  */
  32
  33 #include <linux/kernel.h>
  34 #include <linux/module.h>
  35 #include <linux/init.h>
  36 #include <linux/slab.h>
  37 #include <linux/delay.h>
  38 #include <linux/ioport.h>
  39 #include <linux/version.h>
  40 #include <linux/i2c.h>
  41 #include <asm/irq.h>
  42 #include <asm/io.h>
  43 #include <asm/hardware/clock.h>
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/hardware/clock.h>
  47 #include <linux/errno.h>
  48 #include <linux/sched.h>
  49 #include <asm/arch/hardware.h>
  50 #include <linux/interrupt.h>
  51 #include <linux/moduleparam.h>
  52 #include <asm/arch/mux.h>
  53 #include <linux/err.h>
  54 #include "i2c-omap.h"
  55
  56 #undef  I2C_OMAP_DEBUG
  57
  58
  59 /* ----- debug defines ----------------------------------------------- */
  60
  61 #ifdef I2C_OMAP_DEBUG
  62 static int i2c_debug = 0;
  63
  64 module_param(i2c_debug, int, 0);
  65 MODULE_PARM_DESC(i2c_debug,
  66                  "debug level - 0 off; 1 normal; 2,3 more verbose; "
  67                  "9 omap-protocol");
  68
  69 #define DEB0(format, arg...)    printk(KERN_DEBUG MODULE_NAME " DEBUG: " format "\n",  ## arg )
  70 #define DEB1(format, arg...)    \
  71         if (i2c_debug>=1) {     \
  72                 printk(KERN_DEBUG MODULE_NAME " DEBUG: " format "\n",  ## arg ); \
  73         }
  74 #define DEB2(format, arg...)    \
  75         if (i2c_debug>=2) {     \
  76                 printk(KERN_DEBUG MODULE_NAME " DEBUG: " format "\n",  ## arg ); \
  77         }
  78 #define DEB3(format, arg...)    \
  79         if (i2c_debug>=3) {     \
  80                 printk(KERN_DEBUG MODULE_NAME " DEBUG: " format "\n",  ## arg ); \
  81         }
  82 #define DEB9(format, arg...)    \
  83         /* debug the protocol by showing transferred bits */    \
  84         if (i2c_debug>=9) {     \
  85                 printk(KERN_DEBUG MODULE_NAME " DEBUG: " format "\n",  ## arg ); \
  86         }
  87 #else
  88 #define DEB0(fmt, args...)
  89 #define DEB1(fmt, args...)
  90 #define DEB2(fmt, args...)
  91 #define DEB3(fmt, args...)
  92 #define DEB9(fmt, args...)
  93 #endif
  94
  95 /* ----- global defines ----------------------------------------------- */
  96 static const char driver_name[] = "i2c_omap";
  97
  98 #define MODULE_NAME "OMAP I2C"
  99 #define OMAP_I2C_TIMEOUT (1*HZ) /* timeout waiting for an I2C transaction */
 100
 101 #define err(format, arg...) printk(KERN_ERR MODULE_NAME " ERROR: " format "\n",  ## arg )
 102
 103 #ifdef CONFIG_ARCH_OMAP1510
 104 #define omap_i2c_rev1()         (readw(OMAP_I2C_REV) < 0x20)
 105 #else
 106 #define omap_i2c_rev1()         0
 107 #endif
 108
 109 #define DEFAULT_OWN     1       /* default own I2C address */
 110 #define MAX_MESSAGES    65536   /* max number of messages */
 111
 112 static int clock = 100;         /* Default: Fast Mode = 400 KHz, Standard Mode = 100 KHz */
 113 module_param(clock, int, 0);
 114 MODULE_PARM_DESC(clock,
 115                  "Set I2C clock in KHz: 100 (Standard Mode) or 400 (Fast Mode)");
 116
 117 static int own;
 118 module_param(own, int, 0);
 119 MODULE_PARM_DESC(own, "Address of OMAP i2c master (0 for default == 1)");
 120
 121
 122 static struct omap_i2c_dev {
 123         int cmd_complete, cmd_err;
 124         wait_queue_head_t cmd_wait;
 125         u8 *buf;
 126         size_t buf_len;
 127 } omap_i2c_dev;
 128
 129 /* FIXME pass "sparse": convert {read,write}w() with iomapped addresses
 130  * to omap_{read,write}w() with physical addresses.
 131  */
 132
 133 static void omap_i2c_reset(void)
 134 {
 135         unsigned long timeout;
 136         u16 psc;
 137         struct clk *armxor_ck;
 138         unsigned long armxor_rate;
 139
 140         if (!omap_i2c_rev1())
 141                 writew(OMAP_I2C_SYSC_SRST, OMAP_I2C_SYSC);      /*soft reset */
 142         else
 143                 writew(OMAP_I2C_CON_RST, OMAP_I2C_CON);         /* reset */
 144
 145         armxor_ck = clk_get(NULL, "armxor_ck");
 146         if (IS_ERR(armxor_ck)) {
 147                 printk(KERN_WARNING "i2c: Could not obtain armxor_ck rate.\n");
 148                 armxor_rate = 12000000;
 149         } else {
 150                 armxor_rate = clk_get_rate(armxor_ck);
 151                 clk_put(armxor_ck);
 152         }
 153
 154         if (armxor_rate <= 16000000)
 155                 psc = 0;
 156         else
 157                 psc = (armxor_rate + 8000000) / 12000000;
 158
 159         /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */
 160         writew(psc, OMAP_I2C_PSC);
 161
 162         /* Program desired operating rate */
 163         armxor_rate /= (psc + 1) * 1000;
 164         if (psc > 2)
 165                 psc = 2;
 166         writew(armxor_rate / (clock * 2) - 7 + psc, OMAP_I2C_SCLL);
 167         writew(armxor_rate / (clock * 2) - 7 + psc, OMAP_I2C_SCLH);
 168
 169
 170         /* Set Own Address: */
 171         writew(own, OMAP_I2C_OA);
 172
 173         /* Enable interrupts */
 174         writew((OMAP_I2C_IE_XRDY_IE | OMAP_I2C_IE_RRDY_IE | OMAP_I2C_IE_ARDY_IE |
 175                 OMAP_I2C_IE_NACK_IE | OMAP_I2C_IE_AL_IE), OMAP_I2C_IE);
 176
 177         /* Take the I2C module out of reset: */
 178         writew(OMAP_I2C_CON_EN, OMAP_I2C_CON);
 179
 180         if (!omap_i2c_rev1()){
 181                 timeout = jiffies + OMAP_I2C_TIMEOUT;
 182                 while (!(readw(OMAP_I2C_SYSS) & OMAP_I2C_SYSS_RDONE)) {
 183                         if (time_after(jiffies, timeout)) {
 184                                 err("timeout waiting for I2C reset complete");
 185                                 break;
 186                         }
 187                         msleep(1);
 188                 }
 189         }
 190 }
 191
 192 /*
 193  * Waiting on Bus Busy
 194  */
 195 static int
 196 omap_i2c_wait_for_bb(char allow_sleep)
 197 {
 198         unsigned long timeout;
 199
 200         timeout = jiffies + OMAP_I2C_TIMEOUT;
 201         while (readw(OMAP_I2C_STAT) & OMAP_I2C_STAT_BB) {
 202                 if (time_after(jiffies, timeout)) {
 203                         printk(KERN_WARNING "timeout waiting for bus ready\n");
 204                         return -ETIMEDOUT;
 205                 }
 206                 if (allow_sleep)
 207                         schedule_timeout(1);
 208         }
 209
 210         return 0;
 211 }
 212
 213 /*
 214  * Low level master read/write transaction.
 215  */
 216 static int
 217 omap_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 218 {
 219         struct omap_i2c_dev *dev = i2c_get_adapdata(adap);
 220         u8 zero_byte = 0;
 221         int r;
 222         u16 w;
 223
 224         DEB2("addr: 0x%04x, len: %d, flags: 0x%x, stop: %d",
 225              msg->addr, msg->len, msg->flags, stop);
 226
 227         writew(msg->addr, OMAP_I2C_SA);
 228
 229         /* Sigh, seems we can't do zero length transactions. Thus, we
 230          * can't probe for devices w/o actually sending/receiving at least
 231          * a single byte. So we'll set count to 1 for the zero length
 232          * transaction case and hope we don't cause grief for some
 233          * arbitrary device due to random byte write/read during
 234          * probes.
 235          */
 236         if (msg->len == 0) {
 237                 dev->buf = &zero_byte;
 238                 dev->buf_len = 1;
 239         } else {
 240                 dev->buf = msg->buf;
 241                 dev->buf_len = msg->len;
 242         }
 243         writew(dev->buf_len, OMAP_I2C_CNT);
 244         dev->cmd_complete = 0;
 245         dev->cmd_err = 0;
 246         w = OMAP_I2C_CON_EN | OMAP_I2C_CON_MST | OMAP_I2C_CON_STT;
 247         if (msg->flags & I2C_M_TEN)
 248                 w |= OMAP_I2C_CON_XA;
 249         if (!(msg->flags & I2C_M_RD))
 250                 w |= OMAP_I2C_CON_TRX;
 251         if (stop)
 252                 w |= OMAP_I2C_CON_STP;
 253         writew(w, OMAP_I2C_CON);
 254
 255         r = wait_event_interruptible_timeout(dev->cmd_wait,
 256                                              dev->cmd_complete,
 257                                              OMAP_I2C_TIMEOUT);
 258         dev->buf_len = 0;
 259         if (r < 0)
 260                 return r;
 261         if (!dev->cmd_complete) {
 262                 omap_i2c_reset();
 263                 return -ETIMEDOUT;
 264         }
 265         if (!dev->cmd_err)
 266                 return msg->len;
 267
 268         /* We have an error */
 269         if (dev->cmd_err & OMAP_I2C_STAT_NACK) {
 270                 if (msg->flags & I2C_M_IGNORE_NAK)
 271                         return msg->len;
 272                 if (stop)
 273                         writew(readw(OMAP_I2C_CON) | OMAP_I2C_CON_STP,
 274                                         OMAP_I2C_CON);
 275                 return -EREMOTEIO;
 276         }
 277         if ((OMAP_I2C_STAT_AL | OMAP_I2C_STAT_ROVR | OMAP_I2C_STAT_XUDF)
 278                         & dev->cmd_err) {
 279                 omap_i2c_reset();
 280                 return -EIO;
 281         }
 282         return msg->len;
 283 }
 284
 285 /*
 286  * Prepare controller for a transaction and call omap_i2c_xfer_msg
 287  * to do the work during IRQ processing.
 288  */
 289 static int
 290 omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 291 {
 292         int i;
 293         int r = 0;
 294
 295         DEB1("msgs: %d", num);
 296
 297         if (num < 1 || num > MAX_MESSAGES)
 298                 return -EINVAL;
 299
 300         /* Check for valid parameters in messages */
 301         for (i = 0; i < num; i++)
 302                 if (msgs[i].buf == NULL)
 303                         return -EINVAL;
 304
 305 // REVISIT:  initialize and use adap->retries
 306
 307         if ((r = omap_i2c_wait_for_bb(1)) < 0)
 308                 return r;
 309
 310         for (i = 0; i < num; i++) {
 311                 DEB2("msg: %d, addr: 0x%04x, len: %d, flags: 0x%x",
 312                      i, msgs[i].addr, msgs[i].len, msgs[i].flags);
 313
 314                 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
 315
 316                 DEB2("r: %d", r);
 317
 318                 if (r != msgs[i].len)
 319                         break;
 320         }
 321
 322         if (r >= 0 && num > 1)
 323                 r = num;
 324
 325         DEB1("r: %d", r);
 326
 327         return r;
 328 }
 329
 330 static u32
 331 omap_i2c_func(struct i2c_adapter *adap)
 332 {
 333         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 334 }
 335
 336 static inline void
 337 omap_i2c_complete_cmd(struct omap_i2c_dev *dev)
 338 {
 339         dev->cmd_complete = 1;
 340         wake_up(&dev->cmd_wait);
 341 }
 342
 343 static irqreturn_t
 344 omap_i2c_isr(int this_irq, void *dev_id, struct pt_regs *regs)
 345 {
 346         struct omap_i2c_dev *dev = dev_id;
 347         u16 bits;
 348         u16 stat, w;
 349         int count = 0;
 350         u16 iv_read;
 351
 352         bits = readw(OMAP_I2C_IE);
 353         while ((stat = readw(OMAP_I2C_STAT)) & bits) {
 354
 355                 if (count++ == 100) {
 356                         printk(KERN_WARNING "Too much work in one IRQ\n");
 357                         break;
 358                 }
 359
 360                 writew(stat, OMAP_I2C_STAT);
 361                 if (stat & OMAP_I2C_STAT_ARDY) {
 362                         omap_i2c_complete_cmd(dev);
 363                         writew(OMAP_I2C_STAT_ARDY, OMAP_I2C_STAT);
 364                         if (omap_i2c_rev1())
 365                                 iv_read = readw(OMAP_I2C_IV);
 366                         continue;
 367                 }
 368                 if (stat & OMAP_I2C_STAT_RRDY) {
 369                         w = readw(OMAP_I2C_DATA);
 370                         if (dev->buf_len) {
 371                                 *dev->buf++ = w;
 372                                 dev->buf_len--;
 373                                 if (dev->buf_len) {
 374                                         *dev->buf++ = w >> 8;
 375                                         dev->buf_len--;
 376                                 }
 377                                 if (omap_i2c_rev1() && !dev->buf_len)
 378                                         omap_i2c_complete_cmd(dev);
 379                         } else
 380                                 err("RRDY IRQ while no data requested");
 381                         writew(OMAP_I2C_STAT_RRDY, OMAP_I2C_STAT);
 382                         if (omap_i2c_rev1())
 383                                 iv_read = readw(OMAP_I2C_IV);
 384                         continue;
 385                 }
 386                 if (stat & OMAP_I2C_STAT_XRDY) {
 387                         w = 0;
 388                         if (dev->buf_len) {
 389                                 w = *dev->buf++;
 390                                 dev->buf_len--;
 391                                 if (dev->buf_len) {
 392                                         w |= *dev->buf++ << 8;
 393                                         dev->buf_len--;
 394                                 }
 395                         } else {
 396                                 err("XRDY IRQ while no data to send");
 397                         }
 398                         writew(w, OMAP_I2C_DATA);
 399                         /* We have to make sure the XRDY bit is reset */
 400                         writew(OMAP_I2C_STAT_XRDY, OMAP_I2C_STAT);
 401                         if (omap_i2c_rev1()) {
 402                                 iv_read = readw(OMAP_I2C_IV);
 403                                 if (!dev->buf_len)
 404                                         omap_i2c_complete_cmd(dev);
 405                         }
 406                         continue;
 407                 }
 408                 if (stat & OMAP_I2C_STAT_ROVR) {
 409                         pr_debug("Receive overrun\n");
 410                         dev->cmd_err |= OMAP_I2C_STAT_ROVR;
 411                 }
 412                 if (stat & OMAP_I2C_STAT_XUDF) {
 413                         pr_debug("Transmit overflow\n");
 414                         dev->cmd_err |= OMAP_I2C_STAT_XUDF;
 415                 }
 416                 if (stat & OMAP_I2C_STAT_NACK) {
 417                         dev->cmd_err |= OMAP_I2C_STAT_NACK;
 418                         omap_i2c_complete_cmd(dev);
 419                         writew(OMAP_I2C_CON_STP, OMAP_I2C_CON);
 420                 }
 421                 if (stat & OMAP_I2C_STAT_AL) {
 422                         pr_debug("Arbitration lost\n");
 423                         dev->cmd_err |= OMAP_I2C_STAT_AL;
 424                         omap_i2c_complete_cmd(dev);
 425                 }
 426                 if (omap_i2c_rev1())
 427                         iv_read = readw(OMAP_I2C_IV);
 428
 429         }
 430         return IRQ_HANDLED;
 431 }
 432
 433 static struct i2c_algorithm omap_i2c_algo = {
 434         .master_xfer    = omap_i2c_xfer,
 435         .functionality  = omap_i2c_func,
 436 };
 437
 438 static struct i2c_adapter omap_i2c_adap = {
 439         .owner          = THIS_MODULE,
 440         .class          = I2C_CLASS_HWMON,
 441         .name           = "OMAP I2C adapter",
 442         .algo           = &omap_i2c_algo,
 443 };
 444
 445 static int __init
 446 omap_i2c_probe(struct device *dev)
 447 {
 448         struct platform_device  *pdev = to_platform_device(dev);
 449         struct resource         *mem;
 450         int r;
 451
 452         /* NOTE:  driver uses the static register mapping */
 453         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 454         if (!mem) {
 455                 pr_debug("%s: no mem resource?\n", driver_name);
 456                 return -ENODEV;
 457         }
 458         r = (int) request_mem_region(mem->start, (mem->end - mem->start) + 1,
 459                         driver_name);
 460         if (!r) {
 461                 pr_debug("%s: I2C region already claimed\n", driver_name);
 462                 return -EBUSY;
 463         }
 464
 465         if (clock > 200)
 466                 clock = 400;    /*Fast mode */
 467         else
 468                 clock = 100;    /*Standard mode */
 469
 470         if (own < 1 || own > 0x7f)
 471                 own = DEFAULT_OWN;
 472
 473         memset(&omap_i2c_dev, 0, sizeof(omap_i2c_dev));
 474         init_waitqueue_head(&omap_i2c_dev.cmd_wait);
 475
 476         /* reset ASAP, clearing any IRQs */
 477         omap_i2c_reset();
 478
 479         r = request_irq(INT_I2C, omap_i2c_isr, 0, driver_name, &omap_i2c_dev);
 480         if (r) {
 481                 pr_debug("%s: failure requesting irq\n", driver_name);
 482                 goto do_release_region;
 483         }
 484
 485         r = readw(OMAP_I2C_REV) & 0xff;
 486         pr_info("%s: rev%d.%d at %d KHz\n", driver_name,
 487                         r >> 4, r & 0xf, clock);
 488
 489         /* i2c device drivers may be active on return from add_adapter() */
 490         i2c_set_adapdata(&omap_i2c_adap, &omap_i2c_dev);
 491         omap_i2c_adap.dev.parent = dev;
 492         r = i2c_add_adapter(&omap_i2c_adap);
 493         if (r) {
 494                 pr_debug("%s: failure adding adapter\n", driver_name);
 495                 goto do_free_irq;
 496         }
 497
 498         return 0;
 499
 500 do_free_irq:
 501         free_irq(INT_I2C, &omap_i2c_dev);
 502 do_release_region:
 503         writew(0, OMAP_I2C_CON);
 504         release_mem_region(mem->start, (mem->end - mem->start) + 1);
 505
 506         return r;
 507 }
 508
 509 static int __exit
 510 omap_i2c_remove(struct device *dev)
 511 {
 512         struct platform_device  *pdev = to_platform_device(dev);
 513         struct resource         *mem;
 514
 515         writew(0, OMAP_I2C_CON);
 516         i2c_del_adapter(&omap_i2c_adap);
 517         free_irq(INT_I2C, &omap_i2c_dev);
 518         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 519         release_mem_region(mem->start, (mem->end - mem->start) + 1);
 520         return 0;
 521 }
 522
 523 static struct device_driver omap_i2c_driver = {
 524         .name           = (char *)driver_name,
 525         .bus            = &platform_bus_type,
 526         .probe          = omap_i2c_probe,
 527         .remove         = __exit_p(omap_i2c_remove),
 528 };
 529
 530 /* i2c may be needed to bring up other drivers */
 531 static int __init
 532 omap_i2c_init_driver(void)
 533 {
 534         return driver_register(&omap_i2c_driver);
 535 }
 536 subsys_initcall(omap_i2c_init_driver);
 537
 538 static void __exit omap_i2c_exit_driver(void)
 539 {
 540         driver_unregister(&omap_i2c_driver);
 541 }
 542 module_exit(omap_i2c_exit_driver);
 543
 544 MODULE_AUTHOR("MontaVista Software, Inc. (and others)");
 545 MODULE_DESCRIPTION("TI OMAP I2C bus adapter");
 546 MODULE_LICENSE("GPL");