2 i2c-i801.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
7 Copyright (C) 2007 Jean Delvare <khali@linux-fr.org>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Supports the following Intel I/O Controller Hubs (ICH):
28 region SMBus Block proc. block
29 Chip name PCI ID size PEC buffer call read
30 ----------------------------------------------------------------------
31 82801AA (ICH) 0x2413 16 no no no no
32 82801AB (ICH0) 0x2423 16 no no no no
33 82801BA (ICH2) 0x2443 16 no no no no
34 82801CA (ICH3) 0x2483 32 soft no no no
35 82801DB (ICH4) 0x24c3 32 hard yes no no
36 82801E (ICH5) 0x24d3 32 hard yes yes yes
37 6300ESB 0x25a4 32 hard yes yes yes
38 82801F (ICH6) 0x266a 32 hard yes yes yes
39 6310ESB/6320ESB 0x269b 32 hard yes yes yes
40 82801G (ICH7) 0x27da 32 hard yes yes yes
41 82801H (ICH8) 0x283e 32 hard yes yes yes
42 82801I (ICH9) 0x2930 32 hard yes yes yes
43 Tolapai 0x5032 32 hard yes yes yes
44 ICH10 0x3a30 32 hard yes yes yes
45 ICH10 0x3a60 32 hard yes yes yes
47 Features supported by this driver:
51 Block process call transaction no
52 I2C block read transaction yes (doesn't use the block buffer)
54 See the file Documentation/i2c/busses/i2c-i801 for details.
57 /* Note: we assume there can only be one I801, with one SMBus interface */
59 #include <linux/module.h>
60 #include <linux/pci.h>
61 #include <linux/kernel.h>
62 #include <linux/stddef.h>
63 #include <linux/delay.h>
64 #include <linux/ioport.h>
65 #include <linux/init.h>
66 #include <linux/i2c.h>
69 /* I801 SMBus address offsets */
70 #define SMBHSTSTS (0 + i801_smba)
71 #define SMBHSTCNT (2 + i801_smba)
72 #define SMBHSTCMD (3 + i801_smba)
73 #define SMBHSTADD (4 + i801_smba)
74 #define SMBHSTDAT0 (5 + i801_smba)
75 #define SMBHSTDAT1 (6 + i801_smba)
76 #define SMBBLKDAT (7 + i801_smba)
77 #define SMBPEC (8 + i801_smba) /* ICH3 and later */
78 #define SMBAUXSTS (12 + i801_smba) /* ICH4 and later */
79 #define SMBAUXCTL (13 + i801_smba) /* ICH4 and later */
81 /* PCI Address Constants */
83 #define SMBHSTCFG 0x040
85 /* Host configuration bits for SMBHSTCFG */
86 #define SMBHSTCFG_HST_EN 1
87 #define SMBHSTCFG_SMB_SMI_EN 2
88 #define SMBHSTCFG_I2C_EN 4
90 /* Auxillary control register bits, ICH4+ only */
91 #define SMBAUXCTL_CRC 1
92 #define SMBAUXCTL_E32B 2
94 /* kill bit for SMBHSTCNT */
95 #define SMBHSTCNT_KILL 2
98 #define MAX_TIMEOUT 100
99 #define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
101 /* I801 command constants */
102 #define I801_QUICK 0x00
103 #define I801_BYTE 0x04
104 #define I801_BYTE_DATA 0x08
105 #define I801_WORD_DATA 0x0C
106 #define I801_PROC_CALL 0x10 /* unimplemented */
107 #define I801_BLOCK_DATA 0x14
108 #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
109 #define I801_BLOCK_LAST 0x34
110 #define I801_I2C_BLOCK_LAST 0x38 /* ICH5 and later */
111 #define I801_START 0x40
112 #define I801_PEC_EN 0x80 /* ICH3 and later */
114 /* I801 Hosts Status register bits */
115 #define SMBHSTSTS_BYTE_DONE 0x80
116 #define SMBHSTSTS_INUSE_STS 0x40
117 #define SMBHSTSTS_SMBALERT_STS 0x20
118 #define SMBHSTSTS_FAILED 0x10
119 #define SMBHSTSTS_BUS_ERR 0x08
120 #define SMBHSTSTS_DEV_ERR 0x04
121 #define SMBHSTSTS_INTR 0x02
122 #define SMBHSTSTS_HOST_BUSY 0x01
124 static unsigned long i801_smba;
125 static unsigned char i801_original_hstcfg;
126 static struct pci_driver i801_driver;
127 static struct pci_dev *I801_dev;
129 #define FEATURE_SMBUS_PEC (1 << 0)
130 #define FEATURE_BLOCK_BUFFER (1 << 1)
131 #define FEATURE_BLOCK_PROC (1 << 2)
132 #define FEATURE_I2C_BLOCK_READ (1 << 3)
133 static unsigned int i801_features;
135 static int i801_transaction(int xact)
141 /* Make sure the SMBus host is ready to start transmitting */
142 /* 0x1f = Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
143 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) {
144 dev_dbg(&I801_dev->dev, "SMBus busy (%02x). Resetting...\n",
146 outb_p(temp, SMBHSTSTS);
147 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) {
148 dev_dbg(&I801_dev->dev, "Failed! (%02x)\n", temp);
151 dev_dbg(&I801_dev->dev, "Successful!\n");
155 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
156 * INTREN, SMBSCMD are passed in xact */
157 outb_p(xact | I801_START, SMBHSTCNT);
159 /* We will always wait for a fraction of a second! */
162 temp = inb_p(SMBHSTSTS);
163 } while ((temp & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
165 /* If the SMBus is still busy, we give up */
166 if (timeout >= MAX_TIMEOUT) {
167 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
169 /* try to stop the current command */
170 dev_dbg(&I801_dev->dev, "Terminating the current operation\n");
171 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
173 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT);
176 if (temp & SMBHSTSTS_FAILED) {
178 dev_dbg(&I801_dev->dev, "Error: Failed bus transaction\n");
181 if (temp & SMBHSTSTS_BUS_ERR) {
183 dev_dbg(&I801_dev->dev, "Lost arbitration\n");
186 if (temp & SMBHSTSTS_DEV_ERR) {
188 dev_dbg(&I801_dev->dev, "Error: no response!\n");
191 if ((inb_p(SMBHSTSTS) & 0x1f) != 0x00)
192 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
194 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) {
195 dev_dbg(&I801_dev->dev, "Failed reset at end of transaction "
201 /* wait for INTR bit as advised by Intel */
202 static void i801_wait_hwpec(void)
209 temp = inb_p(SMBHSTSTS);
210 } while ((!(temp & SMBHSTSTS_INTR))
211 && (timeout++ < MAX_TIMEOUT));
213 if (timeout >= MAX_TIMEOUT) {
214 dev_dbg(&I801_dev->dev, "PEC Timeout!\n");
216 outb_p(temp, SMBHSTSTS);
219 static int i801_block_transaction_by_block(union i2c_smbus_data *data,
220 char read_write, int hwpec)
225 inb_p(SMBHSTCNT); /* reset the data buffer index */
227 /* Use 32-byte buffer to process this transaction */
228 if (read_write == I2C_SMBUS_WRITE) {
229 len = data->block[0];
230 outb_p(len, SMBHSTDAT0);
231 for (i = 0; i < len; i++)
232 outb_p(data->block[i+1], SMBBLKDAT);
235 status = i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 |
236 I801_PEC_EN * hwpec);
240 if (read_write == I2C_SMBUS_READ) {
241 len = inb_p(SMBHSTDAT0);
242 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
245 data->block[0] = len;
246 for (i = 0; i < len; i++)
247 data->block[i + 1] = inb_p(SMBBLKDAT);
252 static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
253 char read_write, int command,
261 unsigned char errmask;
263 len = data->block[0];
265 if (read_write == I2C_SMBUS_WRITE) {
266 outb_p(len, SMBHSTDAT0);
267 outb_p(data->block[1], SMBBLKDAT);
270 for (i = 1; i <= len; i++) {
271 if (i == len && read_write == I2C_SMBUS_READ) {
272 if (command == I2C_SMBUS_I2C_BLOCK_DATA)
273 smbcmd = I801_I2C_BLOCK_LAST;
275 smbcmd = I801_BLOCK_LAST;
277 if (command == I2C_SMBUS_I2C_BLOCK_DATA
278 && read_write == I2C_SMBUS_READ)
279 smbcmd = I801_I2C_BLOCK_DATA;
281 smbcmd = I801_BLOCK_DATA;
283 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT);
285 /* Make sure the SMBus host is ready to start transmitting */
286 temp = inb_p(SMBHSTSTS);
288 /* Erroneous conditions before transaction:
289 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
292 /* Erroneous conditions during transaction:
293 * Failed, Bus_Err, Dev_Err, Intr */
296 if (temp & errmask) {
297 dev_dbg(&I801_dev->dev, "SMBus busy (%02x). "
298 "Resetting...\n", temp);
299 outb_p(temp, SMBHSTSTS);
300 if (((temp = inb_p(SMBHSTSTS)) & errmask) != 0x00) {
301 dev_err(&I801_dev->dev,
302 "Reset failed! (%02x)\n", temp);
306 /* if die in middle of block transaction, fail */
311 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT);
313 /* We will always wait for a fraction of a second! */
317 temp = inb_p(SMBHSTSTS);
319 while ((!(temp & SMBHSTSTS_BYTE_DONE))
320 && (timeout++ < MAX_TIMEOUT));
322 /* If the SMBus is still busy, we give up */
323 if (timeout >= MAX_TIMEOUT) {
324 /* try to stop the current command */
325 dev_dbg(&I801_dev->dev, "Terminating the current "
327 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
329 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL),
332 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
335 if (temp & SMBHSTSTS_FAILED) {
337 dev_dbg(&I801_dev->dev,
338 "Error: Failed bus transaction\n");
339 } else if (temp & SMBHSTSTS_BUS_ERR) {
341 dev_dbg(&I801_dev->dev, "Lost arbitration\n");
342 } else if (temp & SMBHSTSTS_DEV_ERR) {
344 dev_dbg(&I801_dev->dev, "Error: no response!\n");
347 if (i == 1 && read_write == I2C_SMBUS_READ
348 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
349 len = inb_p(SMBHSTDAT0);
350 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
352 data->block[0] = len;
355 /* Retrieve/store value in SMBBLKDAT */
356 if (read_write == I2C_SMBUS_READ)
357 data->block[i] = inb_p(SMBBLKDAT);
358 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
359 outb_p(data->block[i+1], SMBBLKDAT);
360 if ((temp & 0x9e) != 0x00)
361 outb_p(temp, SMBHSTSTS); /* signals SMBBLKDAT ready */
363 if ((temp = (0x1e & inb_p(SMBHSTSTS))) != 0x00) {
364 dev_dbg(&I801_dev->dev,
365 "Bad status (%02x) at end of transaction\n",
375 static int i801_set_block_buffer_mode(void)
377 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL);
378 if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0)
383 /* Block transaction function */
384 static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
385 int command, int hwpec)
390 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
391 if (read_write == I2C_SMBUS_WRITE) {
392 /* set I2C_EN bit in configuration register */
393 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);
394 pci_write_config_byte(I801_dev, SMBHSTCFG,
395 hostc | SMBHSTCFG_I2C_EN);
396 } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) {
397 dev_err(&I801_dev->dev,
398 "I2C block read is unsupported!\n");
403 if (read_write == I2C_SMBUS_WRITE
404 || command == I2C_SMBUS_I2C_BLOCK_DATA) {
405 if (data->block[0] < 1)
407 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
408 data->block[0] = I2C_SMBUS_BLOCK_MAX;
410 data->block[0] = 32; /* max for SMBus block reads */
413 if ((i801_features & FEATURE_BLOCK_BUFFER)
414 && !(command == I2C_SMBUS_I2C_BLOCK_DATA
415 && read_write == I2C_SMBUS_READ)
416 && i801_set_block_buffer_mode() == 0)
417 result = i801_block_transaction_by_block(data, read_write,
420 result = i801_block_transaction_byte_by_byte(data, read_write,
423 if (result == 0 && hwpec)
426 if (command == I2C_SMBUS_I2C_BLOCK_DATA
427 && read_write == I2C_SMBUS_WRITE) {
428 /* restore saved configuration register value */
429 pci_write_config_byte(I801_dev, SMBHSTCFG, hostc);
434 /* Return negative errno on error. */
435 static s32 i801_access(struct i2c_adapter * adap, u16 addr,
436 unsigned short flags, char read_write, u8 command,
437 int size, union i2c_smbus_data * data)
443 hwpec = (i801_features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
444 && size != I2C_SMBUS_QUICK
445 && size != I2C_SMBUS_I2C_BLOCK_DATA;
448 case I2C_SMBUS_QUICK:
449 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
454 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
456 if (read_write == I2C_SMBUS_WRITE)
457 outb_p(command, SMBHSTCMD);
460 case I2C_SMBUS_BYTE_DATA:
461 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
463 outb_p(command, SMBHSTCMD);
464 if (read_write == I2C_SMBUS_WRITE)
465 outb_p(data->byte, SMBHSTDAT0);
466 xact = I801_BYTE_DATA;
468 case I2C_SMBUS_WORD_DATA:
469 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
471 outb_p(command, SMBHSTCMD);
472 if (read_write == I2C_SMBUS_WRITE) {
473 outb_p(data->word & 0xff, SMBHSTDAT0);
474 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
476 xact = I801_WORD_DATA;
478 case I2C_SMBUS_BLOCK_DATA:
479 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
481 outb_p(command, SMBHSTCMD);
484 case I2C_SMBUS_I2C_BLOCK_DATA:
485 /* NB: page 240 of ICH5 datasheet shows that the R/#W
486 * bit should be cleared here, even when reading */
487 outb_p((addr & 0x7f) << 1, SMBHSTADD);
488 if (read_write == I2C_SMBUS_READ) {
489 /* NB: page 240 of ICH5 datasheet also shows
490 * that DATA1 is the cmd field when reading */
491 outb_p(command, SMBHSTDAT1);
493 outb_p(command, SMBHSTCMD);
497 dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size);
501 if (hwpec) /* enable/disable hardware PEC */
502 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL);
504 outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL);
507 ret = i801_block_transaction(data, read_write, size, hwpec);
509 ret = i801_transaction(xact | ENABLE_INT9);
511 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
512 time, so we forcibly disable it after every transaction. Turn off
513 E32B for the same reason. */
515 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B),
522 if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
525 switch (xact & 0x7f) {
526 case I801_BYTE: /* Result put in SMBHSTDAT0 */
528 data->byte = inb_p(SMBHSTDAT0);
531 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
538 static u32 i801_func(struct i2c_adapter *adapter)
540 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
541 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
542 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
543 ((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
544 ((i801_features & FEATURE_I2C_BLOCK_READ) ?
545 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
548 static const struct i2c_algorithm smbus_algorithm = {
549 .smbus_xfer = i801_access,
550 .functionality = i801_func,
553 static struct i2c_adapter i801_adapter = {
554 .owner = THIS_MODULE,
555 .id = I2C_HW_SMBUS_I801,
556 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
557 .algo = &smbus_algorithm,
560 static struct pci_device_id i801_ids[] = {
561 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
562 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
563 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
564 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
565 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
566 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
567 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
568 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
569 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
570 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
571 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
572 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
573 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TOLAPAI_1) },
574 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
575 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
579 MODULE_DEVICE_TABLE (pci, i801_ids);
581 static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
588 switch (dev->device) {
589 case PCI_DEVICE_ID_INTEL_82801EB_3:
590 case PCI_DEVICE_ID_INTEL_ESB_4:
591 case PCI_DEVICE_ID_INTEL_ICH6_16:
592 case PCI_DEVICE_ID_INTEL_ICH7_17:
593 case PCI_DEVICE_ID_INTEL_ESB2_17:
594 case PCI_DEVICE_ID_INTEL_ICH8_5:
595 case PCI_DEVICE_ID_INTEL_ICH9_6:
596 case PCI_DEVICE_ID_INTEL_TOLAPAI_1:
597 case PCI_DEVICE_ID_INTEL_ICH10_4:
598 case PCI_DEVICE_ID_INTEL_ICH10_5:
599 i801_features |= FEATURE_I2C_BLOCK_READ;
601 case PCI_DEVICE_ID_INTEL_82801DB_3:
602 i801_features |= FEATURE_SMBUS_PEC;
603 i801_features |= FEATURE_BLOCK_BUFFER;
607 err = pci_enable_device(dev);
609 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
614 /* Determine the address of the SMBus area */
615 i801_smba = pci_resource_start(dev, SMBBAR);
617 dev_err(&dev->dev, "SMBus base address uninitialized, "
623 err = pci_request_region(dev, SMBBAR, i801_driver.name);
625 dev_err(&dev->dev, "Failed to request SMBus region "
626 "0x%lx-0x%Lx\n", i801_smba,
627 (unsigned long long)pci_resource_end(dev, SMBBAR));
631 pci_read_config_byte(I801_dev, SMBHSTCFG, &temp);
632 i801_original_hstcfg = temp;
633 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */
634 if (!(temp & SMBHSTCFG_HST_EN)) {
635 dev_info(&dev->dev, "Enabling SMBus device\n");
636 temp |= SMBHSTCFG_HST_EN;
638 pci_write_config_byte(I801_dev, SMBHSTCFG, temp);
640 if (temp & SMBHSTCFG_SMB_SMI_EN)
641 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
643 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n");
645 /* Clear special mode bits */
646 if (i801_features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
647 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B),
650 /* set up the sysfs linkage to our parent device */
651 i801_adapter.dev.parent = &dev->dev;
653 snprintf(i801_adapter.name, sizeof(i801_adapter.name),
654 "SMBus I801 adapter at %04lx", i801_smba);
655 err = i2c_add_adapter(&i801_adapter);
657 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
663 pci_release_region(dev, SMBBAR);
668 static void __devexit i801_remove(struct pci_dev *dev)
670 i2c_del_adapter(&i801_adapter);
671 pci_write_config_byte(I801_dev, SMBHSTCFG, i801_original_hstcfg);
672 pci_release_region(dev, SMBBAR);
674 * do not call pci_disable_device(dev) since it can cause hard hangs on
675 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
680 static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
683 pci_write_config_byte(dev, SMBHSTCFG, i801_original_hstcfg);
684 pci_set_power_state(dev, pci_choose_state(dev, mesg));
688 static int i801_resume(struct pci_dev *dev)
690 pci_set_power_state(dev, PCI_D0);
691 pci_restore_state(dev);
692 return pci_enable_device(dev);
695 #define i801_suspend NULL
696 #define i801_resume NULL
699 static struct pci_driver i801_driver = {
700 .name = "i801_smbus",
701 .id_table = i801_ids,
703 .remove = __devexit_p(i801_remove),
704 .suspend = i801_suspend,
705 .resume = i801_resume,
708 static int __init i2c_i801_init(void)
710 return pci_register_driver(&i801_driver);
713 static void __exit i2c_i801_exit(void)
715 pci_unregister_driver(&i801_driver);
718 MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, "
719 "Jean Delvare <khali@linux-fr.org>");
720 MODULE_DESCRIPTION("I801 SMBus driver");
721 MODULE_LICENSE("GPL");
723 module_init(i2c_i801_init);
724 module_exit(i2c_i801_exit);