1 /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
35 /* General customization:
38 #define DRIVER_AUTHOR "Tungsten Graphics, Inc."
40 #define DRIVER_NAME "i915"
41 #define DRIVER_DESC "Intel Graphics"
42 #define DRIVER_DATE "20060119"
47 * 1.2: Add Power Management
48 * 1.3: Add vblank support
49 * 1.4: Fix cmdbuffer path, add heap destroy
50 * 1.5: Add vblank pipe configuration
51 * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
52 * - Support vertical blank on secondary display pipe
54 #define DRIVER_MAJOR 1
55 #define DRIVER_MINOR 6
56 #define DRIVER_PATCHLEVEL 0
58 typedef struct _drm_i915_ring_buffer {
68 } drm_i915_ring_buffer_t;
71 struct mem_block *next;
72 struct mem_block *prev;
75 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
78 typedef struct _drm_i915_vbl_swap {
79 struct list_head head;
80 drm_drawable_t drw_id;
82 unsigned int sequence;
83 } drm_i915_vbl_swap_t;
85 struct intel_opregion {
86 struct opregion_header *header;
87 struct opregion_acpi *acpi;
88 struct opregion_swsci *swsci;
89 struct opregion_asle *asle;
93 typedef struct drm_i915_private {
94 drm_local_map_t *sarea;
95 drm_local_map_t *mmio_map;
97 drm_i915_sarea_t *sarea_priv;
98 drm_i915_ring_buffer_t ring;
100 drm_dma_handle_t *status_page_dmah;
101 void *hw_status_page;
102 dma_addr_t dma_status_page;
103 unsigned long counter;
104 unsigned int status_gfx_addr;
105 drm_local_map_t hws_map;
113 wait_queue_head_t irq_queue;
114 atomic_t irq_received;
115 atomic_t irq_emitted;
116 /** Protects user_irq_refcount and irq_mask_reg */
117 spinlock_t user_irq_lock;
118 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
119 int user_irq_refcount;
120 /** Cached value of IMR to avoid reads in updating the bitfield */
123 int tex_lru_log_granularity;
124 int allow_batchbuffer;
125 struct mem_block *agp_heap;
126 unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
129 spinlock_t swaps_lock;
130 drm_i915_vbl_swap_t vbl_swaps;
131 unsigned int swaps_pending;
133 struct intel_opregion opregion;
162 u32 savePFIT_PGM_RATIOS;
164 u32 saveBLC_PWM_CTL2;
189 u32 savePP_ON_DELAYS;
190 u32 savePP_OFF_DELAYS;
198 u32 savePFIT_CONTROL;
199 u32 save_palette_a[256];
200 u32 save_palette_b[256];
201 u32 saveFBC_CFB_BASE;
204 u32 saveFBC_CONTROL2;
208 u32 saveCACHE_MODE_0;
211 u32 saveMI_ARB_STATE;
221 u8 saveDACDATA[256*3]; /* 256 3-byte colors */
223 } drm_i915_private_t;
225 extern struct drm_ioctl_desc i915_ioctls[];
226 extern int i915_max_ioctl;
229 extern void i915_kernel_lost_context(struct drm_device * dev);
230 extern int i915_driver_load(struct drm_device *, unsigned long flags);
231 extern int i915_driver_unload(struct drm_device *);
232 extern void i915_driver_lastclose(struct drm_device * dev);
233 extern void i915_driver_preclose(struct drm_device *dev,
234 struct drm_file *file_priv);
235 extern int i915_driver_device_is_agp(struct drm_device * dev);
236 extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
240 extern int i915_irq_emit(struct drm_device *dev, void *data,
241 struct drm_file *file_priv);
242 extern int i915_irq_wait(struct drm_device *dev, void *data,
243 struct drm_file *file_priv);
245 extern int i915_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);
246 extern int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence);
247 extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
248 extern void i915_driver_irq_preinstall(struct drm_device * dev);
249 extern void i915_driver_irq_postinstall(struct drm_device * dev);
250 extern void i915_driver_irq_uninstall(struct drm_device * dev);
251 extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
252 struct drm_file *file_priv);
253 extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
254 struct drm_file *file_priv);
255 extern int i915_vblank_swap(struct drm_device *dev, void *data,
256 struct drm_file *file_priv);
257 extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
260 extern int i915_mem_alloc(struct drm_device *dev, void *data,
261 struct drm_file *file_priv);
262 extern int i915_mem_free(struct drm_device *dev, void *data,
263 struct drm_file *file_priv);
264 extern int i915_mem_init_heap(struct drm_device *dev, void *data,
265 struct drm_file *file_priv);
266 extern int i915_mem_destroy_heap(struct drm_device *dev, void *data,
267 struct drm_file *file_priv);
268 extern void i915_mem_takedown(struct mem_block **heap);
269 extern void i915_mem_release(struct drm_device * dev,
270 struct drm_file *file_priv, struct mem_block *heap);
272 /* i915_opregion.c */
273 extern int intel_opregion_init(struct drm_device *dev);
274 extern void intel_opregion_free(struct drm_device *dev);
275 extern void opregion_asle_intr(struct drm_device *dev);
276 extern void opregion_enable_asle(struct drm_device *dev);
278 #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
279 #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
280 #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
281 #define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val))
283 #define I915_VERBOSE 0
285 #define RING_LOCALS unsigned int outring, ringmask, outcount; \
288 #define BEGIN_LP_RING(n) do { \
290 DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
291 if (dev_priv->ring.space < (n)*4) \
292 i915_wait_ring(dev, (n)*4, __func__); \
294 outring = dev_priv->ring.tail; \
295 ringmask = dev_priv->ring.tail_mask; \
296 virt = dev_priv->ring.virtual_start; \
299 #define OUT_RING(n) do { \
300 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
301 *(volatile unsigned int *)(virt + outring) = (n); \
304 outring &= ringmask; \
307 #define ADVANCE_LP_RING() do { \
308 if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
309 dev_priv->ring.tail = outring; \
310 dev_priv->ring.space -= outcount * 4; \
311 I915_WRITE(PRB0_TAIL, outring); \
315 * Reads a dword out of the status page, which is written to from the command
316 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
319 * The following dwords have a reserved meaning:
320 * 0: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
321 * 4: ring 0 head pointer
322 * 5: ring 1 head pointer (915-class)
323 * 6: ring 2 head pointer (915-class)
325 * The area from dword 0x10 to 0x3ff is available for driver usage.
327 #define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
328 #define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
330 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
332 #define IS_I830(dev) ((dev)->pci_device == 0x3577)
333 #define IS_845G(dev) ((dev)->pci_device == 0x2562)
334 #define IS_I85X(dev) ((dev)->pci_device == 0x3582)
335 #define IS_I855(dev) ((dev)->pci_device == 0x3582)
336 #define IS_I865G(dev) ((dev)->pci_device == 0x2572)
338 #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
339 #define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
340 #define IS_I945G(dev) ((dev)->pci_device == 0x2772)
341 #define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
342 (dev)->pci_device == 0x27AE)
343 #define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
344 (dev)->pci_device == 0x2982 || \
345 (dev)->pci_device == 0x2992 || \
346 (dev)->pci_device == 0x29A2 || \
347 (dev)->pci_device == 0x2A02 || \
348 (dev)->pci_device == 0x2A12 || \
349 (dev)->pci_device == 0x2A42 || \
350 (dev)->pci_device == 0x2E02 || \
351 (dev)->pci_device == 0x2E12 || \
352 (dev)->pci_device == 0x2E22)
354 #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
356 #define IS_IGD_GM(dev) ((dev)->pci_device == 0x2A42)
358 #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
359 (dev)->pci_device == 0x2E12 || \
360 (dev)->pci_device == 0x2E22)
362 #define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
363 (dev)->pci_device == 0x29B2 || \
364 (dev)->pci_device == 0x29D2)
366 #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
367 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
369 #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
370 IS_I945GM(dev) || IS_I965GM(dev) || IS_IGD_GM(dev))
372 #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev) || IS_G4X(dev))
374 #define PRIMARY_RINGBUFFER_SIZE (128*1024)