2 * twl4030_gpio.c -- access to GPIOs on TWL4030/TPS659x0 chips
4 * Copyright (C) 2006-2007 Texas Instruments, Inc.
5 * Copyright (C) 2006 MontaVista Software, Inc.
7 * Code re-arranged and cleaned up by:
8 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * Andy Lowe / Nishanth Menon
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/module.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/init.h>
31 #include <linux/time.h>
32 #include <linux/interrupt.h>
33 #include <linux/device.h>
34 #include <linux/kthread.h>
35 #include <linux/irq.h>
36 #include <linux/gpio.h>
37 #include <linux/platform_device.h>
38 #include <linux/slab.h>
40 #include <linux/i2c/twl4030.h>
41 #include <linux/i2c/twl4030-gpio.h>
45 * The GPIO "subchip" supports 18 GPIOs which can be configured as
46 * inputs or outputs, with pullups or pulldowns on each pin. Each
47 * GPIO can trigger interrupts on either or both edges.
49 * GPIO interrupts can be fed to either of two IRQ lines; this is
50 * intended to support multiple hosts.
52 * There are also two LED pins used sometimes as output-only GPIOs.
54 * FIXME code currently only handles the first IRQ line.
58 static inline void activate_irq(int irq)
61 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
62 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
64 set_irq_flags(irq, IRQF_VALID);
66 /* same effect on other architectures */
71 static struct gpio_chip twl_gpiochip;
72 static int twl4030_gpio_irq_base;
73 static int twl4030_gpio_irq_end;
75 /* genirq interfaces are not available to modules */
77 #define is_module() true
79 #define is_module() false
82 /* GPIO_SIH_CTRL Fields */
83 #define MASK_GPIO_SIH_CTRL_EXCLEN BIT(0)
84 #define MASK_GPIO_SIH_CTRL_PENDDIS BIT(1)
85 #define MASK_GPIO_SIH_CTRL_COR BIT(2)
87 /* GPIO_CTRL Fields */
88 #define MASK_GPIO_CTRL_GPIO0CD1 BIT(0)
89 #define MASK_GPIO_CTRL_GPIO1CD2 BIT(1)
90 #define MASK_GPIO_CTRL_GPIO_ON BIT(2)
92 /* Mask for GPIO registers when aggregated into a 32-bit integer */
93 #define GPIO_32_MASK 0x0003ffff
96 static DEFINE_MUTEX(gpio_lock);
98 /* store usage of each GPIO. - each bit represents one GPIO */
99 static unsigned int gpio_usage_count;
101 /* shadow the imr register */
102 static unsigned int gpio_imr_shadow;
104 /* bitmask of pending requests to unmask gpio interrupts */
105 static unsigned int gpio_pending_unmask;
107 /* bitmask of requests to set gpio irq trigger type */
108 static unsigned int gpio_pending_trigger;
110 /* pointer to gpio unmask thread struct */
111 static struct task_struct *gpio_unmask_thread;
114 * Helper functions to read and write the GPIO ISR and IMR registers as
115 * 32-bit integers. Functions return 0 on success, non-zero otherwise.
116 * The caller must hold gpio_lock.
119 static int gpio_read_isr(unsigned int *isr)
124 ret = twl4030_i2c_read(TWL4030_MODULE_GPIO, (u8 *) isr,
127 *isr &= GPIO_32_MASK;
132 static int gpio_write_isr(unsigned int isr)
136 * The buffer passed to the twl4030_i2c_write() routine must have an
137 * extra byte at the beginning reserved for its internal use.
140 isr = cpu_to_le32(isr);
141 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &isr,
145 static int gpio_write_imr(unsigned int imr)
149 * The buffer passed to the twl4030_i2c_write() routine must have an
150 * extra byte at the beginning reserved for its internal use.
153 imr = cpu_to_le32(imr);
154 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &imr,
159 * These routines are analagous to the irqchip methods, but they are designed
160 * to be called from thread context with cpu interrupts enabled and with no
161 * locked spinlocks. We call these routines from our custom IRQ handler
162 * instead of the usual irqchip methods.
164 static void twl4030_gpio_mask_and_ack(unsigned int irq)
166 int gpio = irq - twl4030_gpio_irq_base;
168 mutex_lock(&gpio_lock);
170 gpio_imr_shadow |= (1 << gpio);
171 gpio_write_imr(gpio_imr_shadow);
173 gpio_write_isr(1 << gpio);
174 mutex_unlock(&gpio_lock);
177 static void twl4030_gpio_unmask(unsigned int irq)
179 int gpio = irq - twl4030_gpio_irq_base;
181 mutex_lock(&gpio_lock);
182 gpio_imr_shadow &= ~(1 << gpio);
183 gpio_write_imr(gpio_imr_shadow);
184 mutex_unlock(&gpio_lock);
188 * These are the irqchip methods for the TWL4030 GPIO interrupts.
189 * Our IRQ handle method doesn't call these, but they will be called by
190 * other routines such as setup_irq() and enable_irq(). They are called
191 * with cpu interrupts disabled and with a lock on the irq_controller_lock
192 * spinlock. This complicates matters, because accessing the TWL4030 GPIO
193 * interrupt controller requires I2C bus transactions that can't be initiated
194 * in this context. Our solution is to defer accessing the interrupt
195 * controller to a kernel thread. We only need to support the unmask method.
198 static void twl4030_gpio_irq_mask_and_ack(unsigned int irq)
202 static void twl4030_gpio_irq_mask(unsigned int irq)
206 static void twl4030_gpio_irq_unmask(unsigned int irq)
208 int gpio = irq - twl4030_gpio_irq_base;
210 gpio_pending_unmask |= (1 << gpio);
211 if (gpio_unmask_thread && gpio_unmask_thread->state != TASK_RUNNING)
212 wake_up_process(gpio_unmask_thread);
215 static int twl4030_gpio_irq_set_type(unsigned int irq, unsigned trigger)
217 struct irq_desc *desc = irq_desc + irq;
218 int gpio = irq - twl4030_gpio_irq_base;
220 trigger &= IRQ_TYPE_SENSE_MASK;
221 if (trigger & ~IRQ_TYPE_EDGE_BOTH)
223 if ((desc->status & IRQ_TYPE_SENSE_MASK) == trigger)
226 desc->status &= ~IRQ_TYPE_SENSE_MASK;
227 desc->status |= trigger;
229 /* REVISIT This makes the "unmask" thread do double duty,
230 * updating IRQ trigger modes too. Rename appropriately...
232 gpio_pending_trigger |= (1 << gpio);
233 if (gpio_unmask_thread && gpio_unmask_thread->state != TASK_RUNNING)
234 wake_up_process(gpio_unmask_thread);
239 static struct irq_chip twl4030_gpio_irq_chip = {
241 .ack = twl4030_gpio_irq_mask_and_ack,
242 .mask = twl4030_gpio_irq_mask,
243 .unmask = twl4030_gpio_irq_unmask,
244 .set_type = twl4030_gpio_irq_set_type,
249 * To configure TWL4030 GPIO module registers
251 static inline int gpio_twl4030_write(u8 address, u8 data)
253 return twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
257 * To read a TWL4030 GPIO module register
259 static inline int gpio_twl4030_read(u8 address)
264 ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
265 return (ret < 0) ? ret : data;
269 * twl4030 GPIO request function
271 int twl4030_request_gpio(int gpio)
275 if (unlikely(gpio >= TWL4030_GPIO_MAX))
278 ret = gpio_request(twl_gpiochip.base + gpio, NULL);
282 mutex_lock(&gpio_lock);
283 if (gpio_usage_count & BIT(gpio)) {
286 /* First time usage? - switch on GPIO module */
287 if (!gpio_usage_count) {
288 ret = gpio_twl4030_write(REG_GPIO_CTRL,
289 MASK_GPIO_CTRL_GPIO_ON);
290 ret = gpio_twl4030_write(REG_GPIO_SIH_CTRL, 0x00);
293 gpio_usage_count |= BIT(gpio);
295 gpio_free(twl_gpiochip.base + gpio);
297 mutex_unlock(&gpio_lock);
300 EXPORT_SYMBOL(twl4030_request_gpio);
303 * TWL4030 GPIO free module
305 int twl4030_free_gpio(int gpio)
309 if (unlikely(gpio >= TWL4030_GPIO_MAX))
312 mutex_lock(&gpio_lock);
314 if ((gpio_usage_count & BIT(gpio)) == 0) {
317 gpio_usage_count &= ~BIT(gpio);
318 gpio_free(twl_gpiochip.base + gpio);
321 /* Last time usage? - switch off GPIO module */
322 if (ret == 0 && !gpio_usage_count)
323 ret = gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
325 mutex_unlock(&gpio_lock);
328 EXPORT_SYMBOL(twl4030_free_gpio);
330 static int twl4030_set_gpio_direction(int gpio, int is_input)
332 u8 d_bnk = gpio >> 3;
333 u8 d_msk = BIT(gpio & 0x7);
335 u8 base = REG_GPIODATADIR1 + d_bnk;
338 mutex_lock(&gpio_lock);
339 ret = gpio_twl4030_read(base);
346 ret = gpio_twl4030_write(base, reg);
348 mutex_unlock(&gpio_lock);
352 static int twl4030_set_gpio_dataout(int gpio, int enable)
354 u8 d_bnk = gpio >> 3;
355 u8 d_msk = BIT(gpio & 0x7);
359 base = REG_SETGPIODATAOUT1 + d_bnk;
361 base = REG_CLEARGPIODATAOUT1 + d_bnk;
363 return gpio_twl4030_write(base, d_msk);
366 int twl4030_get_gpio_datain(int gpio)
368 u8 d_bnk = gpio >> 3;
369 u8 d_off = gpio & 0x7;
373 if (unlikely((gpio >= TWL4030_GPIO_MAX)
374 || !(gpio_usage_count & BIT(gpio))))
377 base = REG_GPIODATAIN1 + d_bnk;
378 ret = gpio_twl4030_read(base);
380 ret = (ret >> d_off) & 0x1;
384 EXPORT_SYMBOL(twl4030_get_gpio_datain);
386 static int twl4030_set_gpio_edge_ctrl(int gpio, int edge)
388 u8 c_bnk = gpio >> 2;
389 u8 c_off = (gpio & 0x3) * 2;
395 base = REG_GPIO_EDR1 + c_bnk;
397 if (edge & IRQ_TYPE_EDGE_RISING)
398 c_msk |= BIT(c_off + 1);
399 if (edge & IRQ_TYPE_EDGE_FALLING)
402 mutex_lock(&gpio_lock);
403 ret = gpio_twl4030_read(base);
405 /* clear the previous rising/falling values */
407 reg &= ~(0x3 << c_off);
409 ret = gpio_twl4030_write(base, reg);
411 mutex_unlock(&gpio_lock);
416 * Configure debounce timing value for a GPIO pin on TWL4030
418 int twl4030_set_gpio_debounce(int gpio, int enable)
420 u8 d_bnk = gpio >> 3;
421 u8 d_msk = BIT(gpio & 0x7);
426 if (unlikely((gpio >= TWL4030_GPIO_MAX)
427 || !(gpio_usage_count & BIT(gpio))))
430 base = REG_GPIO_DEBEN1 + d_bnk;
431 mutex_lock(&gpio_lock);
432 ret = gpio_twl4030_read(base);
439 ret = gpio_twl4030_write(base, reg);
441 mutex_unlock(&gpio_lock);
444 EXPORT_SYMBOL(twl4030_set_gpio_debounce);
448 * Configure Card detect for GPIO pin on TWL4030
450 * This means: VMMC1 or VMMC2 is enabled or disabled based
451 * on the status of GPIO-0 or GPIO-1 pins (respectively).
453 int twl4030_set_gpio_card_detect(int gpio, int enable)
456 u8 msk = (1 << gpio);
459 /* Only GPIO 0 or 1 can be used for CD feature.. */
460 if (unlikely((gpio >= TWL4030_GPIO_MAX)
461 || !(gpio_usage_count & BIT(gpio))
462 || (gpio >= TWL4030_GPIO_MAX_CD))) {
466 mutex_lock(&gpio_lock);
467 ret = gpio_twl4030_read(REG_GPIO_CTRL);
470 reg = (u8) (ret | msk);
472 reg = (u8) (ret & ~msk);
474 ret = gpio_twl4030_write(REG_GPIO_CTRL, reg);
476 mutex_unlock(&gpio_lock);
481 /* MODULE FUNCTIONS */
484 * gpio_unmask_thread() runs as a kernel thread. It is awakened by the unmask
485 * method for the GPIO interrupts. It unmasks all of the GPIO interrupts
486 * specified in the gpio_pending_unmask bitmask. We have to do the unmasking
487 * in a kernel thread rather than directly in the unmask method because of the
488 * need to access the TWL4030 via the I2C bus. Note that we don't need to be
489 * concerned about race conditions where the request to unmask a GPIO interrupt
490 * has already been cancelled before this thread does the unmasking. If a GPIO
491 * interrupt is improperly unmasked, then the IRQ handler for it will mask it
492 * when an interrupt occurs.
494 static int twl4030_gpio_unmask_thread(void *data)
496 current->flags |= PF_NOFREEZE;
498 while (!kthread_should_stop()) {
500 unsigned int gpio_unmask;
501 unsigned int gpio_trigger;
504 gpio_unmask = gpio_pending_unmask;
505 gpio_pending_unmask = 0;
507 gpio_trigger = gpio_pending_trigger;
508 gpio_pending_trigger = 0;
511 for (irq = twl4030_gpio_irq_base; 0 != gpio_unmask;
512 gpio_unmask >>= 1, irq++) {
513 if (gpio_unmask & 0x1)
514 twl4030_gpio_unmask(irq);
517 for (irq = twl4030_gpio_irq_base;
519 gpio_trigger >>= 1, irq++) {
520 struct irq_desc *desc;
523 if (!(gpio_trigger & 0x1))
526 desc = irq_desc + irq;
527 spin_lock_irq(&desc->lock);
528 type = desc->status & IRQ_TYPE_SENSE_MASK;
529 spin_unlock_irq(&desc->lock);
531 twl4030_set_gpio_edge_ctrl(irq - twl4030_gpio_irq_base,
536 if (!gpio_pending_unmask && !gpio_pending_trigger)
537 set_current_state(TASK_INTERRUPTIBLE);
542 set_current_state(TASK_RUNNING);
547 * do_twl4030_gpio_irq() is the desc->handle method for each of the twl4030
548 * gpio interrupts. It executes in kernel thread context.
549 * On entry, cpu interrupts are enabled.
551 static void do_twl4030_gpio_irq(unsigned int irq, irq_desc_t *desc)
553 struct irqaction *action;
554 const unsigned int cpu = smp_processor_id();
556 desc->status |= IRQ_LEVEL;
559 * Acknowledge, clear _AND_ disable the interrupt.
561 twl4030_gpio_mask_and_ack(irq);
564 kstat_cpu(cpu).irqs[irq]++;
566 action = desc->action;
572 /* Call the ISR with cpu interrupts enabled. */
573 ret = action->handler(irq, action->dev_id);
574 if (ret == IRQ_HANDLED)
575 status |= action->flags;
577 action = action->next;
580 if (retval != IRQ_HANDLED)
581 printk(KERN_ERR "ISR for TWL4030 GPIO"
582 " irq %d can't handle interrupt\n",
586 twl4030_gpio_unmask(irq);
592 * do_twl4030_gpio_module_irq() is the desc->handle method for the twl4030 gpio
593 * module interrupt. It executes in kernel thread context.
594 * This is a chained interrupt, so there is no desc->action method for it.
595 * We query the gpio module interrupt controller in the twl4030 to determine
596 * which gpio lines are generating interrupt requests, and then call the
597 * desc->handle method for each gpio that needs service.
598 * On entry, cpu interrupts are disabled.
600 static void do_twl4030_gpio_module_irq(unsigned int irq, irq_desc_t *desc)
602 const unsigned int cpu = smp_processor_id();
604 desc->status |= IRQ_LEVEL;
606 * The desc->handle method would normally call the desc->chip->ack
607 * method here, but we won't bother since our ack method is NULL.
611 unsigned int gpio_isr;
613 kstat_cpu(cpu).irqs[irq]++;
616 mutex_lock(&gpio_lock);
617 if (gpio_read_isr(&gpio_isr))
619 mutex_unlock(&gpio_lock);
621 for (gpio_irq = twl4030_gpio_irq_base; 0 != gpio_isr;
622 gpio_isr >>= 1, gpio_irq++) {
623 if (gpio_isr & 0x1) {
624 irq_desc_t *d = irq_desc + gpio_irq;
625 d->handle_irq(gpio_irq, d);
631 * Here is where we should call the unmask method, but again we
632 * won't bother since it is NULL.
637 /*----------------------------------------------------------------------*/
639 static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
641 return twl4030_set_gpio_direction(offset, 1);
644 static int twl_get(struct gpio_chip *chip, unsigned offset)
646 int status = twl4030_get_gpio_datain(offset);
648 return (status < 0) ? 0 : status;
651 static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
653 twl4030_set_gpio_dataout(offset, value);
654 return twl4030_set_gpio_direction(offset, 0);
657 static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
659 twl4030_set_gpio_dataout(offset, value);
662 static struct gpio_chip twl_gpiochip = {
664 .owner = THIS_MODULE,
665 .direction_input = twl_direction_in,
667 .direction_output = twl_direction_out,
672 /*----------------------------------------------------------------------*/
674 static int __devinit gpio_twl4030_pulls(u32 ups, u32 downs)
677 unsigned i, gpio_bit;
679 /* For most pins, a pulldown was enabled by default.
680 * We should have data that's specific to this board.
682 for (gpio_bit = 1, i = 1; i < 6; i++) {
686 for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) {
688 bit_mask |= 1 << (j + 1);
689 else if (downs & gpio_bit)
690 bit_mask |= 1 << (j + 0);
692 message[i] = bit_mask;
695 return twl4030_i2c_write(TWL4030_MODULE_GPIO, message,
696 REG_GPIOPUPDCTR1, 5);
699 static int gpio_twl4030_remove(struct platform_device *pdev);
701 static int __devinit gpio_twl4030_probe(struct platform_device *pdev)
703 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
707 /* All GPIO interrupts are initially masked */
708 gpio_pending_unmask = 0;
709 gpio_imr_shadow = GPIO_32_MASK;
710 ret = gpio_write_imr(gpio_imr_shadow);
712 twl4030_gpio_irq_base = pdata->irq_base;
713 twl4030_gpio_irq_end = pdata->irq_end;
715 if ((twl4030_gpio_irq_end - twl4030_gpio_irq_base) > 0) {
718 "can't dispatch IRQs from modules\n");
721 if (twl4030_gpio_irq_end > NR_IRQS) {
723 "last IRQ is too large: %d\n",
724 twl4030_gpio_irq_end);
728 dev_notice(&pdev->dev,
729 "no IRQs being dispatched\n");
735 * Create a kernel thread to handle deferred unmasking of gpio
738 gpio_unmask_thread = kthread_create(twl4030_gpio_unmask_thread,
739 NULL, "twl4030 gpio");
740 if (!gpio_unmask_thread) {
742 "could not create twl4030 gpio unmask"
749 /* install an irq handler for each of the gpio interrupts */
750 for (irq = twl4030_gpio_irq_base; irq < twl4030_gpio_irq_end;
752 set_irq_chip_and_handler(irq, &twl4030_gpio_irq_chip,
753 do_twl4030_gpio_irq);
757 /* gpio module IRQ */
758 irq = platform_get_irq(pdev, 0);
761 * Install an irq handler to demultiplex the gpio module
764 set_irq_chained_handler(irq, do_twl4030_gpio_module_irq);
765 wake_up_process(gpio_unmask_thread);
767 dev_info(&pdev->dev, "IRQ %d chains IRQs %d..%d\n", irq,
768 twl4030_gpio_irq_base, twl4030_gpio_irq_end - 1);
774 * NOTE: boards may waste power if they don't set pullups
775 * and pulldowns correctly ... default for non-ULPI pins is
776 * pulldown, and some other pins may have external pullups
777 * or pulldowns. Careful!
779 ret = gpio_twl4030_pulls(pdata->pullups, pdata->pulldowns);
781 dev_dbg(&pdev->dev, "pullups %.05x %.05x --> %d\n",
782 pdata->pullups, pdata->pulldowns,
785 twl_gpiochip.base = pdata->gpio_base;
786 twl_gpiochip.ngpio = TWL4030_GPIO_MAX;
787 twl_gpiochip.dev = &pdev->dev;
789 ret = gpiochip_add(&twl_gpiochip);
792 "could not register gpiochip, %d\n",
794 twl_gpiochip.ngpio = 0;
795 gpio_twl4030_remove(pdev);
796 } else if (pdata->setup) {
799 status = pdata->setup(&pdev->dev,
800 pdata->gpio_base, TWL4030_GPIO_MAX);
802 dev_dbg(&pdev->dev, "setup --> %d\n", status);
809 static int __devexit gpio_twl4030_remove(struct platform_device *pdev)
811 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
815 if (pdata->teardown) {
816 status = pdata->teardown(&pdev->dev,
817 pdata->gpio_base, TWL4030_GPIO_MAX);
819 dev_dbg(&pdev->dev, "teardown --> %d\n", status);
824 status = gpiochip_remove(&twl_gpiochip);
828 if (is_module() || (twl4030_gpio_irq_end - twl4030_gpio_irq_base) <= 0)
831 /* uninstall the gpio demultiplexing interrupt handler */
832 irq = platform_get_irq(pdev, 0);
833 set_irq_handler(irq, NULL);
835 /* uninstall the irq handler for each of the gpio interrupts */
836 for (irq = twl4030_gpio_irq_base; irq < twl4030_gpio_irq_end; irq++)
837 set_irq_handler(irq, NULL);
839 /* stop the gpio unmask kernel thread */
840 if (gpio_unmask_thread) {
841 kthread_stop(gpio_unmask_thread);
842 gpio_unmask_thread = NULL;
848 /* Note: this hardware lives inside an I2C-based multi-function device. */
849 MODULE_ALIAS("platform:twl4030_gpio");
851 static struct platform_driver gpio_twl4030_driver = {
852 .driver.name = "twl4030_gpio",
853 .driver.owner = THIS_MODULE,
854 .probe = gpio_twl4030_probe,
855 .remove = __devexit_p(gpio_twl4030_remove),
858 static int __init gpio_twl4030_init(void)
860 return platform_driver_register(&gpio_twl4030_driver);
862 subsys_initcall(gpio_twl4030_init);
864 static void __exit gpio_twl4030_exit(void)
866 platform_driver_unregister(&gpio_twl4030_driver);
868 module_exit(gpio_twl4030_exit);
870 MODULE_AUTHOR("Texas Instruments, Inc.");
871 MODULE_DESCRIPTION("GPIO interface for TWL4030");
872 MODULE_LICENSE("GPL");