2 * twl4030_gpio.c -- access to GPIOs on TWL4030/TPS659x0 chips
4 * Copyright (C) 2006-2007 Texas Instruments, Inc.
5 * Copyright (C) 2006 MontaVista Software, Inc.
7 * Code re-arranged and cleaned up by:
8 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * Andy Lowe / Nishanth Menon
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/kthread.h>
32 #include <linux/irq.h>
33 #include <linux/gpio.h>
34 #include <linux/platform_device.h>
35 #include <linux/slab.h>
37 #include <linux/i2c/twl4030.h>
41 * The GPIO "subchip" supports 18 GPIOs which can be configured as
42 * inputs or outputs, with pullups or pulldowns on each pin. Each
43 * GPIO can trigger interrupts on either or both edges.
45 * GPIO interrupts can be fed to either of two IRQ lines; this is
46 * intended to support multiple hosts.
48 * There are also two LED pins used sometimes as output-only GPIOs.
50 * FIXME code currently only handles the first IRQ line.
54 static inline void activate_irq(int irq)
57 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
58 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
60 set_irq_flags(irq, IRQF_VALID);
62 /* same effect on other architectures */
67 static struct gpio_chip twl_gpiochip;
68 static int twl4030_gpio_irq_base;
69 static int twl4030_gpio_irq_end;
71 /* genirq interfaces are not available to modules */
73 #define is_module() true
75 #define is_module() false
78 /* GPIO_CTRL Fields */
79 #define MASK_GPIO_CTRL_GPIO0CD1 BIT(0)
80 #define MASK_GPIO_CTRL_GPIO1CD2 BIT(1)
81 #define MASK_GPIO_CTRL_GPIO_ON BIT(2)
83 /* Mask for GPIO registers when aggregated into a 32-bit integer */
84 #define GPIO_32_MASK 0x0003ffff
87 static DEFINE_MUTEX(gpio_lock);
89 /* store usage of each GPIO. - each bit represents one GPIO */
90 static unsigned int gpio_usage_count;
92 /* protect what irq_chip modifies through its helper task */
93 static DEFINE_SPINLOCK(gpio_spinlock);
95 /* shadow the imr register; updates are delayed */
96 static u32 gpio_imr_shadow;
97 static bool gpio_pending_mask;
99 /* bitmask of requests to set gpio irq trigger type */
100 static unsigned int gpio_pending_trigger;
102 /* pointer to helper thread */
103 static struct task_struct *gpio_helper_thread;
106 * Helper functions to read and write the GPIO ISR and IMR registers as
107 * 32-bit integers. Functions return 0 on success, non-zero otherwise.
108 * The caller must hold gpio_lock.
111 /* NOTE: only the IRQ dispatcher may read ISR; reading it has
112 * side effects, because of the clear-on-read mechanism (COR=1).
114 static int gpio_read_isr(unsigned int *isr)
119 ret = twl4030_i2c_read(TWL4030_MODULE_GPIO, (u8 *) isr,
122 *isr &= GPIO_32_MASK;
127 /* IMR is written only during initialization and
128 * by request of the irq_chip code.
130 static int gpio_write_imr(unsigned int imr)
134 * The buffer passed to the twl4030_i2c_write() routine must have an
135 * extra byte at the beginning reserved for its internal use.
138 imr = cpu_to_le32(imr);
139 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &imr,
144 * These are the irqchip methods for the TWL4030 GPIO interrupts.
145 * Our IRQ handle method doesn't call these, but they will be called by
146 * other routines such as setup_irq() and enable_irq(). They are called
147 * with cpu interrupts disabled and with a lock on the irq_desc.lock
148 * spinlock. This complicates matters, because accessing the TWL4030 GPIO
149 * interrupt controller requires I2C bus transactions that can't be initiated
150 * in this context. Our solution is to defer accessing the interrupt
151 * controller to a kernel thread.
154 static void twl4030_gpio_irq_ack(unsigned int irq)
156 /* NOP -- dispatcher acks when it reads ISR */
159 static void twl4030_gpio_irq_mask(unsigned int irq)
161 int gpio = irq - twl4030_gpio_irq_base;
162 u32 mask = 1 << gpio;
165 spin_lock_irqsave(&gpio_spinlock, flags);
166 gpio_pending_mask = true;
167 gpio_imr_shadow |= mask;
168 if (gpio_helper_thread && gpio_helper_thread->state != TASK_RUNNING)
169 wake_up_process(gpio_helper_thread);
170 spin_unlock_irqrestore(&gpio_spinlock, flags);
173 static void twl4030_gpio_irq_unmask(unsigned int irq)
175 int gpio = irq - twl4030_gpio_irq_base;
176 u32 mask = 1 << gpio;
179 spin_lock_irqsave(&gpio_spinlock, flags);
180 gpio_pending_mask = true;
181 gpio_imr_shadow &= ~mask;
182 if (gpio_helper_thread && gpio_helper_thread->state != TASK_RUNNING)
183 wake_up_process(gpio_helper_thread);
184 spin_unlock_irqrestore(&gpio_spinlock, flags);
187 static int twl4030_gpio_irq_set_type(unsigned int irq, unsigned trigger)
189 struct irq_desc *desc = irq_desc + irq;
190 int gpio = irq - twl4030_gpio_irq_base;
193 trigger &= IRQ_TYPE_SENSE_MASK;
194 if (trigger & ~IRQ_TYPE_EDGE_BOTH)
196 if ((desc->status & IRQ_TYPE_SENSE_MASK) == trigger)
199 desc->status &= ~IRQ_TYPE_SENSE_MASK;
200 desc->status |= trigger;
202 spin_lock_irqsave(&gpio_spinlock, flags);
203 gpio_pending_trigger |= (1 << gpio);
204 if (gpio_helper_thread && gpio_helper_thread->state != TASK_RUNNING)
205 wake_up_process(gpio_helper_thread);
206 spin_unlock_irqrestore(&gpio_spinlock, flags);
211 static struct irq_chip twl4030_gpio_irq_chip = {
213 .ack = twl4030_gpio_irq_ack,
214 .mask = twl4030_gpio_irq_mask,
215 .unmask = twl4030_gpio_irq_unmask,
216 .set_type = twl4030_gpio_irq_set_type,
221 * To configure TWL4030 GPIO module registers
223 static inline int gpio_twl4030_write(u8 address, u8 data)
225 return twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
229 * To read a TWL4030 GPIO module register
231 static inline int gpio_twl4030_read(u8 address)
236 ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
237 return (ret < 0) ? ret : data;
241 * twl4030 GPIO request function
243 int twl4030_request_gpio(int gpio)
247 if (unlikely(gpio >= TWL4030_GPIO_MAX))
250 ret = gpio_request(twl_gpiochip.base + gpio, NULL);
254 mutex_lock(&gpio_lock);
255 if (gpio_usage_count & BIT(gpio)) {
258 /* First time usage? - switch on GPIO module */
259 if (!gpio_usage_count) {
260 ret = gpio_twl4030_write(REG_GPIO_CTRL,
261 MASK_GPIO_CTRL_GPIO_ON);
265 gpio_usage_count |= BIT(gpio);
267 gpio_free(twl_gpiochip.base + gpio);
269 mutex_unlock(&gpio_lock);
272 EXPORT_SYMBOL(twl4030_request_gpio);
275 * TWL4030 GPIO free module
277 int twl4030_free_gpio(int gpio)
281 if (unlikely(gpio >= TWL4030_GPIO_MAX))
284 mutex_lock(&gpio_lock);
286 if ((gpio_usage_count & BIT(gpio)) == 0) {
289 gpio_usage_count &= ~BIT(gpio);
290 gpio_free(twl_gpiochip.base + gpio);
293 /* Last time usage? - switch off GPIO module */
294 if (ret == 0 && !gpio_usage_count)
295 ret = gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
297 mutex_unlock(&gpio_lock);
300 EXPORT_SYMBOL(twl4030_free_gpio);
302 static int twl4030_set_gpio_direction(int gpio, int is_input)
304 u8 d_bnk = gpio >> 3;
305 u8 d_msk = BIT(gpio & 0x7);
307 u8 base = REG_GPIODATADIR1 + d_bnk;
310 mutex_lock(&gpio_lock);
311 ret = gpio_twl4030_read(base);
318 ret = gpio_twl4030_write(base, reg);
320 mutex_unlock(&gpio_lock);
324 static int twl4030_set_gpio_dataout(int gpio, int enable)
326 u8 d_bnk = gpio >> 3;
327 u8 d_msk = BIT(gpio & 0x7);
331 base = REG_SETGPIODATAOUT1 + d_bnk;
333 base = REG_CLEARGPIODATAOUT1 + d_bnk;
335 return gpio_twl4030_write(base, d_msk);
338 int twl4030_get_gpio_datain(int gpio)
340 u8 d_bnk = gpio >> 3;
341 u8 d_off = gpio & 0x7;
345 if (unlikely((gpio >= TWL4030_GPIO_MAX)
346 || !(gpio_usage_count & BIT(gpio))))
349 base = REG_GPIODATAIN1 + d_bnk;
350 ret = gpio_twl4030_read(base);
352 ret = (ret >> d_off) & 0x1;
356 EXPORT_SYMBOL(twl4030_get_gpio_datain);
358 static int twl4030_set_gpio_edge_ctrl(int gpio, int edge)
360 u8 c_bnk = gpio >> 2;
361 u8 c_off = (gpio & 0x3) * 2;
367 base = REG_GPIO_EDR1 + c_bnk;
369 if (edge & IRQ_TYPE_EDGE_RISING)
370 c_msk |= BIT(c_off + 1);
371 if (edge & IRQ_TYPE_EDGE_FALLING)
374 mutex_lock(&gpio_lock);
375 ret = gpio_twl4030_read(base);
377 /* clear the previous rising/falling values */
379 reg &= ~(0x3 << c_off);
381 ret = gpio_twl4030_write(base, reg);
383 mutex_unlock(&gpio_lock);
388 * Configure debounce timing value for a GPIO pin on TWL4030
390 int twl4030_set_gpio_debounce(int gpio, int enable)
392 u8 d_bnk = gpio >> 3;
393 u8 d_msk = BIT(gpio & 0x7);
398 if (unlikely((gpio >= TWL4030_GPIO_MAX)
399 || !(gpio_usage_count & BIT(gpio))))
402 base = REG_GPIO_DEBEN1 + d_bnk;
403 mutex_lock(&gpio_lock);
404 ret = gpio_twl4030_read(base);
411 ret = gpio_twl4030_write(base, reg);
413 mutex_unlock(&gpio_lock);
416 EXPORT_SYMBOL(twl4030_set_gpio_debounce);
420 * Configure Card detect for GPIO pin on TWL4030
422 * This means: VMMC1 or VMMC2 is enabled or disabled based
423 * on the status of GPIO-0 or GPIO-1 pins (respectively).
425 int twl4030_set_gpio_card_detect(int gpio, int enable)
428 u8 msk = (1 << gpio);
431 /* Only GPIO 0 or 1 can be used for CD feature.. */
432 if (unlikely((gpio >= TWL4030_GPIO_MAX)
433 || !(gpio_usage_count & BIT(gpio))
434 || (gpio >= TWL4030_GPIO_MAX_CD))) {
438 mutex_lock(&gpio_lock);
439 ret = gpio_twl4030_read(REG_GPIO_CTRL);
442 reg = (u8) (ret | msk);
444 reg = (u8) (ret & ~msk);
446 ret = gpio_twl4030_write(REG_GPIO_CTRL, reg);
448 mutex_unlock(&gpio_lock);
453 /* MODULE FUNCTIONS */
456 * gpio_helper_thread() is a kernel thread that is awakened by irq_chip
457 * methods to update IRQ masks and trigger modes.
459 * We must do this in a thread rather than in irq_chip methods because of the
460 * need to access the TWL4030 via the I2C bus. Note that we don't need to be
461 * concerned about race conditions where the request to unmask a GPIO interrupt
462 * has already been cancelled before this thread does the unmasking. If a GPIO
463 * interrupt is improperly unmasked, then the IRQ handler for it will mask it
464 * when an interrupt occurs.
466 static int twl4030_gpio_helper_thread(void *dev)
468 current->flags |= PF_NOFREEZE;
470 while (!kthread_should_stop()) {
474 unsigned int gpio_trigger;
476 spin_lock_irq(&gpio_spinlock);
478 do_mask = gpio_pending_mask;
479 gpio_pending_mask = false;
480 local_imr = gpio_imr_shadow;
482 gpio_trigger = gpio_pending_trigger;
483 gpio_pending_trigger = 0;
485 spin_unlock_irq(&gpio_spinlock);
488 int status = gpio_write_imr(local_imr);
491 dev_err(dev, "write IMR err %d\n", status);
494 for (irq = twl4030_gpio_irq_base;
496 gpio_trigger >>= 1, irq++) {
497 struct irq_desc *desc;
500 if (!(gpio_trigger & 0x1))
503 desc = irq_desc + irq;
504 spin_lock_irq(&desc->lock);
505 type = desc->status & IRQ_TYPE_SENSE_MASK;
506 spin_unlock_irq(&desc->lock);
508 twl4030_set_gpio_edge_ctrl(irq - twl4030_gpio_irq_base,
512 spin_lock_irq(&gpio_spinlock);
513 if (!gpio_pending_mask && !gpio_pending_trigger)
514 set_current_state(TASK_INTERRUPTIBLE);
515 spin_unlock_irq(&gpio_spinlock);
519 set_current_state(TASK_RUNNING);
524 * do_twl4030_gpio_module_irq() is the desc->handle method for the twl4030 gpio
525 * module interrupt. It executes in kernel thread context.
526 * This is a chained interrupt, so there is no desc->action method for it.
527 * We query the gpio module interrupt controller in the twl4030 to determine
528 * which gpio lines are generating interrupt requests, and then call the
529 * desc->handle method for each gpio that needs service.
530 * On entry, cpu interrupts are disabled.
532 static void do_twl4030_gpio_module_irq(unsigned int irq, irq_desc_t *desc)
535 unsigned int gpio_isr;
537 /* PIH irqs like this can't be individually masked or acked ...
538 * so we don't even call the PIH irq_chip stub methods.
541 if (gpio_read_isr(&gpio_isr))
545 for (gpio_irq = twl4030_gpio_irq_base; 0 != gpio_isr;
546 gpio_isr >>= 1, gpio_irq++) {
548 generic_handle_irq(gpio_irq);
552 /*----------------------------------------------------------------------*/
554 static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
556 return twl4030_set_gpio_direction(offset, 1);
559 static int twl_get(struct gpio_chip *chip, unsigned offset)
561 int status = twl4030_get_gpio_datain(offset);
563 return (status < 0) ? 0 : status;
566 static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
568 twl4030_set_gpio_dataout(offset, value);
569 return twl4030_set_gpio_direction(offset, 0);
572 static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
574 twl4030_set_gpio_dataout(offset, value);
577 static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
579 /* NOTE: assumes IRQs are set up ... */
580 return twl4030_gpio_irq_base + offset;
583 static struct gpio_chip twl_gpiochip = {
585 .owner = THIS_MODULE,
586 .direction_input = twl_direction_in,
588 .direction_output = twl_direction_out,
590 .to_irq = twl_to_irq,
594 /*----------------------------------------------------------------------*/
596 static int __devinit gpio_twl4030_pulls(u32 ups, u32 downs)
599 unsigned i, gpio_bit;
601 /* For most pins, a pulldown was enabled by default.
602 * We should have data that's specific to this board.
604 for (gpio_bit = 1, i = 1; i < 6; i++) {
608 for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) {
610 bit_mask |= 1 << (j + 1);
611 else if (downs & gpio_bit)
612 bit_mask |= 1 << (j + 0);
614 message[i] = bit_mask;
617 return twl4030_i2c_write(TWL4030_MODULE_GPIO, message,
618 REG_GPIOPUPDCTR1, 5);
621 static int gpio_twl4030_remove(struct platform_device *pdev);
623 static int __devinit gpio_twl4030_probe(struct platform_device *pdev)
625 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
629 /* All GPIO interrupts are initially masked */
630 gpio_pending_mask = false;
631 gpio_imr_shadow = GPIO_32_MASK;
632 ret = gpio_write_imr(gpio_imr_shadow);
634 twl4030_gpio_irq_base = pdata->irq_base;
635 twl4030_gpio_irq_end = pdata->irq_end;
637 if ((twl4030_gpio_irq_end - twl4030_gpio_irq_base) > 0) {
640 "can't dispatch IRQs from modules\n");
643 if (twl4030_gpio_irq_end > NR_IRQS) {
645 "last IRQ is too large: %d\n",
646 twl4030_gpio_irq_end);
650 dev_notice(&pdev->dev,
651 "no IRQs being dispatched\n");
657 * Create a kernel thread to handle deferred operations on gpio
660 gpio_helper_thread = kthread_create(twl4030_gpio_helper_thread,
661 &pdev->dev, "twl4030 gpio");
662 if (!gpio_helper_thread) {
664 "could not create helper thread!\n");
670 /* install an irq handler for each of the gpio interrupts */
671 for (irq = twl4030_gpio_irq_base; irq < twl4030_gpio_irq_end;
673 set_irq_chip_and_handler(irq, &twl4030_gpio_irq_chip,
678 /* gpio module IRQ */
679 irq = platform_get_irq(pdev, 0);
681 /* COR=1 means irqs are acked by reading ISR
682 * PENDDIS=0 means pending events enabled
683 * EXCLEN=0 means route to both irq lines
685 gpio_twl4030_write(REG_GPIO_SIH_CTRL,
686 TWL4030_SIH_CTRL_COR_MASK);
689 * Install an irq handler to demultiplex the gpio module
692 set_irq_chained_handler(irq, do_twl4030_gpio_module_irq);
693 wake_up_process(gpio_helper_thread);
695 dev_info(&pdev->dev, "IRQ %d chains IRQs %d..%d\n", irq,
696 twl4030_gpio_irq_base, twl4030_gpio_irq_end - 1);
702 * NOTE: boards may waste power if they don't set pullups
703 * and pulldowns correctly ... default for non-ULPI pins is
704 * pulldown, and some other pins may have external pullups
705 * or pulldowns. Careful!
707 ret = gpio_twl4030_pulls(pdata->pullups, pdata->pulldowns);
709 dev_dbg(&pdev->dev, "pullups %.05x %.05x --> %d\n",
710 pdata->pullups, pdata->pulldowns,
713 twl_gpiochip.base = pdata->gpio_base;
714 twl_gpiochip.ngpio = TWL4030_GPIO_MAX;
715 twl_gpiochip.dev = &pdev->dev;
717 ret = gpiochip_add(&twl_gpiochip);
720 "could not register gpiochip, %d\n",
722 twl_gpiochip.ngpio = 0;
723 gpio_twl4030_remove(pdev);
724 } else if (pdata->setup) {
727 status = pdata->setup(&pdev->dev,
728 pdata->gpio_base, TWL4030_GPIO_MAX);
730 dev_dbg(&pdev->dev, "setup --> %d\n", status);
737 static int __devexit gpio_twl4030_remove(struct platform_device *pdev)
739 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
743 if (pdata->teardown) {
744 status = pdata->teardown(&pdev->dev,
745 pdata->gpio_base, TWL4030_GPIO_MAX);
747 dev_dbg(&pdev->dev, "teardown --> %d\n", status);
752 status = gpiochip_remove(&twl_gpiochip);
756 if (is_module() || (twl4030_gpio_irq_end - twl4030_gpio_irq_base) <= 0)
759 /* uninstall the gpio demultiplexing interrupt handler */
760 irq = platform_get_irq(pdev, 0);
761 set_irq_handler(irq, NULL);
763 /* uninstall the irq handler for each of the gpio interrupts */
764 for (irq = twl4030_gpio_irq_base; irq < twl4030_gpio_irq_end; irq++)
765 set_irq_handler(irq, NULL);
767 /* stop the gpio helper kernel thread */
768 if (gpio_helper_thread) {
769 kthread_stop(gpio_helper_thread);
770 gpio_helper_thread = NULL;
776 /* Note: this hardware lives inside an I2C-based multi-function device. */
777 MODULE_ALIAS("platform:twl4030_gpio");
779 static struct platform_driver gpio_twl4030_driver = {
780 .driver.name = "twl4030_gpio",
781 .driver.owner = THIS_MODULE,
782 .probe = gpio_twl4030_probe,
783 .remove = __devexit_p(gpio_twl4030_remove),
786 static int __init gpio_twl4030_init(void)
788 return platform_driver_register(&gpio_twl4030_driver);
790 subsys_initcall(gpio_twl4030_init);
792 static void __exit gpio_twl4030_exit(void)
794 platform_driver_unregister(&gpio_twl4030_driver);
796 module_exit(gpio_twl4030_exit);
798 MODULE_AUTHOR("Texas Instruments, Inc.");
799 MODULE_DESCRIPTION("GPIO interface for TWL4030");
800 MODULE_LICENSE("GPL");