2 * twl4030_gpio.c -- access to GPIOs on TWL4030/TPS659x0 chips
4 * Copyright (C) 2006-2007 Texas Instruments, Inc.
5 * Copyright (C) 2006 MontaVista Software, Inc.
7 * Code re-arranged and cleaned up by:
8 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * Andy Lowe / Nishanth Menon
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/module.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/init.h>
31 #include <linux/time.h>
32 #include <linux/interrupt.h>
33 #include <linux/device.h>
34 #include <linux/kthread.h>
35 #include <linux/irq.h>
36 #include <linux/gpio.h>
37 #include <linux/platform_device.h>
38 #include <linux/slab.h>
40 #include <linux/i2c/twl4030.h>
44 * The GPIO "subchip" supports 18 GPIOs which can be configured as
45 * inputs or outputs, with pullups or pulldowns on each pin. Each
46 * GPIO can trigger interrupts on either or both edges.
48 * GPIO interrupts can be fed to either of two IRQ lines; this is
49 * intended to support multiple hosts.
51 * There are also two LED pins used sometimes as output-only GPIOs.
53 * FIXME code currently only handles the first IRQ line.
57 static inline void activate_irq(int irq)
60 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
61 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
63 set_irq_flags(irq, IRQF_VALID);
65 /* same effect on other architectures */
70 static struct gpio_chip twl_gpiochip;
71 static int twl4030_gpio_irq_base;
72 static int twl4030_gpio_irq_end;
74 /* genirq interfaces are not available to modules */
76 #define is_module() true
78 #define is_module() false
81 /* GPIO_CTRL Fields */
82 #define MASK_GPIO_CTRL_GPIO0CD1 BIT(0)
83 #define MASK_GPIO_CTRL_GPIO1CD2 BIT(1)
84 #define MASK_GPIO_CTRL_GPIO_ON BIT(2)
86 /* Mask for GPIO registers when aggregated into a 32-bit integer */
87 #define GPIO_32_MASK 0x0003ffff
90 static DEFINE_MUTEX(gpio_lock);
92 /* store usage of each GPIO. - each bit represents one GPIO */
93 static unsigned int gpio_usage_count;
95 /* shadow the imr register */
96 static unsigned int gpio_imr_shadow;
98 /* bitmask of pending requests to unmask gpio interrupts */
99 static unsigned int gpio_pending_unmask;
101 /* bitmask of requests to set gpio irq trigger type */
102 static unsigned int gpio_pending_trigger;
104 /* pointer to gpio unmask thread struct */
105 static struct task_struct *gpio_unmask_thread;
108 * Helper functions to read and write the GPIO ISR and IMR registers as
109 * 32-bit integers. Functions return 0 on success, non-zero otherwise.
110 * The caller must hold gpio_lock.
113 static int gpio_read_isr(unsigned int *isr)
118 ret = twl4030_i2c_read(TWL4030_MODULE_GPIO, (u8 *) isr,
121 *isr &= GPIO_32_MASK;
126 static int gpio_write_isr(unsigned int isr)
130 * The buffer passed to the twl4030_i2c_write() routine must have an
131 * extra byte at the beginning reserved for its internal use.
134 isr = cpu_to_le32(isr);
135 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &isr,
139 static int gpio_write_imr(unsigned int imr)
143 * The buffer passed to the twl4030_i2c_write() routine must have an
144 * extra byte at the beginning reserved for its internal use.
147 imr = cpu_to_le32(imr);
148 return twl4030_i2c_write(TWL4030_MODULE_GPIO, (u8 *) &imr,
153 * These routines are analagous to the irqchip methods, but they are designed
154 * to be called from thread context with cpu interrupts enabled and with no
155 * locked spinlocks. We call these routines from our custom IRQ handler
156 * instead of the usual irqchip methods.
158 static void twl4030_gpio_mask_and_ack(unsigned int irq)
160 int gpio = irq - twl4030_gpio_irq_base;
162 mutex_lock(&gpio_lock);
164 gpio_imr_shadow |= (1 << gpio);
165 gpio_write_imr(gpio_imr_shadow);
167 gpio_write_isr(1 << gpio);
168 mutex_unlock(&gpio_lock);
171 static void twl4030_gpio_unmask(unsigned int irq)
173 int gpio = irq - twl4030_gpio_irq_base;
175 mutex_lock(&gpio_lock);
176 gpio_imr_shadow &= ~(1 << gpio);
177 gpio_write_imr(gpio_imr_shadow);
178 mutex_unlock(&gpio_lock);
182 * These are the irqchip methods for the TWL4030 GPIO interrupts.
183 * Our IRQ handle method doesn't call these, but they will be called by
184 * other routines such as setup_irq() and enable_irq(). They are called
185 * with cpu interrupts disabled and with a lock on the irq_controller_lock
186 * spinlock. This complicates matters, because accessing the TWL4030 GPIO
187 * interrupt controller requires I2C bus transactions that can't be initiated
188 * in this context. Our solution is to defer accessing the interrupt
189 * controller to a kernel thread. We only need to support the unmask method.
192 static void twl4030_gpio_irq_mask_and_ack(unsigned int irq)
196 static void twl4030_gpio_irq_mask(unsigned int irq)
200 static void twl4030_gpio_irq_unmask(unsigned int irq)
202 int gpio = irq - twl4030_gpio_irq_base;
204 gpio_pending_unmask |= (1 << gpio);
205 if (gpio_unmask_thread && gpio_unmask_thread->state != TASK_RUNNING)
206 wake_up_process(gpio_unmask_thread);
209 static int twl4030_gpio_irq_set_type(unsigned int irq, unsigned trigger)
211 struct irq_desc *desc = irq_desc + irq;
212 int gpio = irq - twl4030_gpio_irq_base;
214 trigger &= IRQ_TYPE_SENSE_MASK;
215 if (trigger & ~IRQ_TYPE_EDGE_BOTH)
217 if ((desc->status & IRQ_TYPE_SENSE_MASK) == trigger)
220 desc->status &= ~IRQ_TYPE_SENSE_MASK;
221 desc->status |= trigger;
223 /* REVISIT This makes the "unmask" thread do double duty,
224 * updating IRQ trigger modes too. Rename appropriately...
226 gpio_pending_trigger |= (1 << gpio);
227 if (gpio_unmask_thread && gpio_unmask_thread->state != TASK_RUNNING)
228 wake_up_process(gpio_unmask_thread);
233 static struct irq_chip twl4030_gpio_irq_chip = {
235 .ack = twl4030_gpio_irq_mask_and_ack,
236 .mask = twl4030_gpio_irq_mask,
237 .unmask = twl4030_gpio_irq_unmask,
238 .set_type = twl4030_gpio_irq_set_type,
243 * To configure TWL4030 GPIO module registers
245 static inline int gpio_twl4030_write(u8 address, u8 data)
247 return twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
251 * To read a TWL4030 GPIO module register
253 static inline int gpio_twl4030_read(u8 address)
258 ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
259 return (ret < 0) ? ret : data;
263 * twl4030 GPIO request function
265 int twl4030_request_gpio(int gpio)
269 if (unlikely(gpio >= TWL4030_GPIO_MAX))
272 ret = gpio_request(twl_gpiochip.base + gpio, NULL);
276 mutex_lock(&gpio_lock);
277 if (gpio_usage_count & BIT(gpio)) {
280 /* First time usage? - switch on GPIO module */
281 if (!gpio_usage_count) {
282 ret = gpio_twl4030_write(REG_GPIO_CTRL,
283 MASK_GPIO_CTRL_GPIO_ON);
284 ret = gpio_twl4030_write(REG_GPIO_SIH_CTRL, 0x00);
287 gpio_usage_count |= BIT(gpio);
289 gpio_free(twl_gpiochip.base + gpio);
291 mutex_unlock(&gpio_lock);
294 EXPORT_SYMBOL(twl4030_request_gpio);
297 * TWL4030 GPIO free module
299 int twl4030_free_gpio(int gpio)
303 if (unlikely(gpio >= TWL4030_GPIO_MAX))
306 mutex_lock(&gpio_lock);
308 if ((gpio_usage_count & BIT(gpio)) == 0) {
311 gpio_usage_count &= ~BIT(gpio);
312 gpio_free(twl_gpiochip.base + gpio);
315 /* Last time usage? - switch off GPIO module */
316 if (ret == 0 && !gpio_usage_count)
317 ret = gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
319 mutex_unlock(&gpio_lock);
322 EXPORT_SYMBOL(twl4030_free_gpio);
324 static int twl4030_set_gpio_direction(int gpio, int is_input)
326 u8 d_bnk = gpio >> 3;
327 u8 d_msk = BIT(gpio & 0x7);
329 u8 base = REG_GPIODATADIR1 + d_bnk;
332 mutex_lock(&gpio_lock);
333 ret = gpio_twl4030_read(base);
340 ret = gpio_twl4030_write(base, reg);
342 mutex_unlock(&gpio_lock);
346 static int twl4030_set_gpio_dataout(int gpio, int enable)
348 u8 d_bnk = gpio >> 3;
349 u8 d_msk = BIT(gpio & 0x7);
353 base = REG_SETGPIODATAOUT1 + d_bnk;
355 base = REG_CLEARGPIODATAOUT1 + d_bnk;
357 return gpio_twl4030_write(base, d_msk);
360 int twl4030_get_gpio_datain(int gpio)
362 u8 d_bnk = gpio >> 3;
363 u8 d_off = gpio & 0x7;
367 if (unlikely((gpio >= TWL4030_GPIO_MAX)
368 || !(gpio_usage_count & BIT(gpio))))
371 base = REG_GPIODATAIN1 + d_bnk;
372 ret = gpio_twl4030_read(base);
374 ret = (ret >> d_off) & 0x1;
378 EXPORT_SYMBOL(twl4030_get_gpio_datain);
380 static int twl4030_set_gpio_edge_ctrl(int gpio, int edge)
382 u8 c_bnk = gpio >> 2;
383 u8 c_off = (gpio & 0x3) * 2;
389 base = REG_GPIO_EDR1 + c_bnk;
391 if (edge & IRQ_TYPE_EDGE_RISING)
392 c_msk |= BIT(c_off + 1);
393 if (edge & IRQ_TYPE_EDGE_FALLING)
396 mutex_lock(&gpio_lock);
397 ret = gpio_twl4030_read(base);
399 /* clear the previous rising/falling values */
401 reg &= ~(0x3 << c_off);
403 ret = gpio_twl4030_write(base, reg);
405 mutex_unlock(&gpio_lock);
410 * Configure debounce timing value for a GPIO pin on TWL4030
412 int twl4030_set_gpio_debounce(int gpio, int enable)
414 u8 d_bnk = gpio >> 3;
415 u8 d_msk = BIT(gpio & 0x7);
420 if (unlikely((gpio >= TWL4030_GPIO_MAX)
421 || !(gpio_usage_count & BIT(gpio))))
424 base = REG_GPIO_DEBEN1 + d_bnk;
425 mutex_lock(&gpio_lock);
426 ret = gpio_twl4030_read(base);
433 ret = gpio_twl4030_write(base, reg);
435 mutex_unlock(&gpio_lock);
438 EXPORT_SYMBOL(twl4030_set_gpio_debounce);
442 * Configure Card detect for GPIO pin on TWL4030
444 * This means: VMMC1 or VMMC2 is enabled or disabled based
445 * on the status of GPIO-0 or GPIO-1 pins (respectively).
447 int twl4030_set_gpio_card_detect(int gpio, int enable)
450 u8 msk = (1 << gpio);
453 /* Only GPIO 0 or 1 can be used for CD feature.. */
454 if (unlikely((gpio >= TWL4030_GPIO_MAX)
455 || !(gpio_usage_count & BIT(gpio))
456 || (gpio >= TWL4030_GPIO_MAX_CD))) {
460 mutex_lock(&gpio_lock);
461 ret = gpio_twl4030_read(REG_GPIO_CTRL);
464 reg = (u8) (ret | msk);
466 reg = (u8) (ret & ~msk);
468 ret = gpio_twl4030_write(REG_GPIO_CTRL, reg);
470 mutex_unlock(&gpio_lock);
475 /* MODULE FUNCTIONS */
478 * gpio_unmask_thread() runs as a kernel thread. It is awakened by the unmask
479 * method for the GPIO interrupts. It unmasks all of the GPIO interrupts
480 * specified in the gpio_pending_unmask bitmask. We have to do the unmasking
481 * in a kernel thread rather than directly in the unmask method because of the
482 * need to access the TWL4030 via the I2C bus. Note that we don't need to be
483 * concerned about race conditions where the request to unmask a GPIO interrupt
484 * has already been cancelled before this thread does the unmasking. If a GPIO
485 * interrupt is improperly unmasked, then the IRQ handler for it will mask it
486 * when an interrupt occurs.
488 static int twl4030_gpio_unmask_thread(void *data)
490 current->flags |= PF_NOFREEZE;
492 while (!kthread_should_stop()) {
494 unsigned int gpio_unmask;
495 unsigned int gpio_trigger;
498 gpio_unmask = gpio_pending_unmask;
499 gpio_pending_unmask = 0;
501 gpio_trigger = gpio_pending_trigger;
502 gpio_pending_trigger = 0;
505 for (irq = twl4030_gpio_irq_base; 0 != gpio_unmask;
506 gpio_unmask >>= 1, irq++) {
507 if (gpio_unmask & 0x1)
508 twl4030_gpio_unmask(irq);
511 for (irq = twl4030_gpio_irq_base;
513 gpio_trigger >>= 1, irq++) {
514 struct irq_desc *desc;
517 if (!(gpio_trigger & 0x1))
520 desc = irq_desc + irq;
521 spin_lock_irq(&desc->lock);
522 type = desc->status & IRQ_TYPE_SENSE_MASK;
523 spin_unlock_irq(&desc->lock);
525 twl4030_set_gpio_edge_ctrl(irq - twl4030_gpio_irq_base,
530 if (!gpio_pending_unmask && !gpio_pending_trigger)
531 set_current_state(TASK_INTERRUPTIBLE);
536 set_current_state(TASK_RUNNING);
541 * do_twl4030_gpio_irq() is the desc->handle method for each of the twl4030
542 * gpio interrupts. It executes in kernel thread context.
543 * On entry, cpu interrupts are enabled.
545 static void do_twl4030_gpio_irq(unsigned int irq, irq_desc_t *desc)
547 struct irqaction *action;
548 const unsigned int cpu = smp_processor_id();
550 desc->status |= IRQ_LEVEL;
553 * Acknowledge, clear _AND_ disable the interrupt.
555 twl4030_gpio_mask_and_ack(irq);
558 kstat_cpu(cpu).irqs[irq]++;
560 action = desc->action;
566 /* Call the ISR with cpu interrupts enabled. */
567 ret = action->handler(irq, action->dev_id);
568 if (ret == IRQ_HANDLED)
569 status |= action->flags;
571 action = action->next;
574 if (retval != IRQ_HANDLED)
575 printk(KERN_ERR "ISR for TWL4030 GPIO"
576 " irq %d can't handle interrupt\n",
580 twl4030_gpio_unmask(irq);
586 * do_twl4030_gpio_module_irq() is the desc->handle method for the twl4030 gpio
587 * module interrupt. It executes in kernel thread context.
588 * This is a chained interrupt, so there is no desc->action method for it.
589 * We query the gpio module interrupt controller in the twl4030 to determine
590 * which gpio lines are generating interrupt requests, and then call the
591 * desc->handle method for each gpio that needs service.
592 * On entry, cpu interrupts are disabled.
594 static void do_twl4030_gpio_module_irq(unsigned int irq, irq_desc_t *desc)
596 const unsigned int cpu = smp_processor_id();
598 desc->status |= IRQ_LEVEL;
600 * The desc->handle method would normally call the desc->chip->ack
601 * method here, but we won't bother since our ack method is NULL.
605 unsigned int gpio_isr;
607 kstat_cpu(cpu).irqs[irq]++;
610 mutex_lock(&gpio_lock);
611 if (gpio_read_isr(&gpio_isr))
613 mutex_unlock(&gpio_lock);
615 for (gpio_irq = twl4030_gpio_irq_base; 0 != gpio_isr;
616 gpio_isr >>= 1, gpio_irq++) {
617 if (gpio_isr & 0x1) {
618 irq_desc_t *d = irq_desc + gpio_irq;
619 d->handle_irq(gpio_irq, d);
625 * Here is where we should call the unmask method, but again we
626 * won't bother since it is NULL.
631 /*----------------------------------------------------------------------*/
633 static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
635 return twl4030_set_gpio_direction(offset, 1);
638 static int twl_get(struct gpio_chip *chip, unsigned offset)
640 int status = twl4030_get_gpio_datain(offset);
642 return (status < 0) ? 0 : status;
645 static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
647 twl4030_set_gpio_dataout(offset, value);
648 return twl4030_set_gpio_direction(offset, 0);
651 static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
653 twl4030_set_gpio_dataout(offset, value);
656 static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
658 /* NOTE: assumes IRQs are set up ... */
659 return twl4030_gpio_irq_base + offset;
662 static struct gpio_chip twl_gpiochip = {
664 .owner = THIS_MODULE,
665 .direction_input = twl_direction_in,
667 .direction_output = twl_direction_out,
669 .to_irq = twl_to_irq,
673 /*----------------------------------------------------------------------*/
675 static int __devinit gpio_twl4030_pulls(u32 ups, u32 downs)
678 unsigned i, gpio_bit;
680 /* For most pins, a pulldown was enabled by default.
681 * We should have data that's specific to this board.
683 for (gpio_bit = 1, i = 1; i < 6; i++) {
687 for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) {
689 bit_mask |= 1 << (j + 1);
690 else if (downs & gpio_bit)
691 bit_mask |= 1 << (j + 0);
693 message[i] = bit_mask;
696 return twl4030_i2c_write(TWL4030_MODULE_GPIO, message,
697 REG_GPIOPUPDCTR1, 5);
700 static int gpio_twl4030_remove(struct platform_device *pdev);
702 static int __devinit gpio_twl4030_probe(struct platform_device *pdev)
704 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
708 /* All GPIO interrupts are initially masked */
709 gpio_pending_unmask = 0;
710 gpio_imr_shadow = GPIO_32_MASK;
711 ret = gpio_write_imr(gpio_imr_shadow);
713 twl4030_gpio_irq_base = pdata->irq_base;
714 twl4030_gpio_irq_end = pdata->irq_end;
716 if ((twl4030_gpio_irq_end - twl4030_gpio_irq_base) > 0) {
719 "can't dispatch IRQs from modules\n");
722 if (twl4030_gpio_irq_end > NR_IRQS) {
724 "last IRQ is too large: %d\n",
725 twl4030_gpio_irq_end);
729 dev_notice(&pdev->dev,
730 "no IRQs being dispatched\n");
736 * Create a kernel thread to handle deferred unmasking of gpio
739 gpio_unmask_thread = kthread_create(twl4030_gpio_unmask_thread,
740 NULL, "twl4030 gpio");
741 if (!gpio_unmask_thread) {
743 "could not create twl4030 gpio unmask"
750 /* install an irq handler for each of the gpio interrupts */
751 for (irq = twl4030_gpio_irq_base; irq < twl4030_gpio_irq_end;
753 set_irq_chip_and_handler(irq, &twl4030_gpio_irq_chip,
754 do_twl4030_gpio_irq);
758 /* gpio module IRQ */
759 irq = platform_get_irq(pdev, 0);
762 * Install an irq handler to demultiplex the gpio module
765 set_irq_chained_handler(irq, do_twl4030_gpio_module_irq);
766 wake_up_process(gpio_unmask_thread);
768 dev_info(&pdev->dev, "IRQ %d chains IRQs %d..%d\n", irq,
769 twl4030_gpio_irq_base, twl4030_gpio_irq_end - 1);
775 * NOTE: boards may waste power if they don't set pullups
776 * and pulldowns correctly ... default for non-ULPI pins is
777 * pulldown, and some other pins may have external pullups
778 * or pulldowns. Careful!
780 ret = gpio_twl4030_pulls(pdata->pullups, pdata->pulldowns);
782 dev_dbg(&pdev->dev, "pullups %.05x %.05x --> %d\n",
783 pdata->pullups, pdata->pulldowns,
786 twl_gpiochip.base = pdata->gpio_base;
787 twl_gpiochip.ngpio = TWL4030_GPIO_MAX;
788 twl_gpiochip.dev = &pdev->dev;
790 ret = gpiochip_add(&twl_gpiochip);
793 "could not register gpiochip, %d\n",
795 twl_gpiochip.ngpio = 0;
796 gpio_twl4030_remove(pdev);
797 } else if (pdata->setup) {
800 status = pdata->setup(&pdev->dev,
801 pdata->gpio_base, TWL4030_GPIO_MAX);
803 dev_dbg(&pdev->dev, "setup --> %d\n", status);
810 static int __devexit gpio_twl4030_remove(struct platform_device *pdev)
812 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
816 if (pdata->teardown) {
817 status = pdata->teardown(&pdev->dev,
818 pdata->gpio_base, TWL4030_GPIO_MAX);
820 dev_dbg(&pdev->dev, "teardown --> %d\n", status);
825 status = gpiochip_remove(&twl_gpiochip);
829 if (is_module() || (twl4030_gpio_irq_end - twl4030_gpio_irq_base) <= 0)
832 /* uninstall the gpio demultiplexing interrupt handler */
833 irq = platform_get_irq(pdev, 0);
834 set_irq_handler(irq, NULL);
836 /* uninstall the irq handler for each of the gpio interrupts */
837 for (irq = twl4030_gpio_irq_base; irq < twl4030_gpio_irq_end; irq++)
838 set_irq_handler(irq, NULL);
840 /* stop the gpio unmask kernel thread */
841 if (gpio_unmask_thread) {
842 kthread_stop(gpio_unmask_thread);
843 gpio_unmask_thread = NULL;
849 /* Note: this hardware lives inside an I2C-based multi-function device. */
850 MODULE_ALIAS("platform:twl4030_gpio");
852 static struct platform_driver gpio_twl4030_driver = {
853 .driver.name = "twl4030_gpio",
854 .driver.owner = THIS_MODULE,
855 .probe = gpio_twl4030_probe,
856 .remove = __devexit_p(gpio_twl4030_remove),
859 static int __init gpio_twl4030_init(void)
861 return platform_driver_register(&gpio_twl4030_driver);
863 subsys_initcall(gpio_twl4030_init);
865 static void __exit gpio_twl4030_exit(void)
867 platform_driver_unregister(&gpio_twl4030_driver);
869 module_exit(gpio_twl4030_exit);
871 MODULE_AUTHOR("Texas Instruments, Inc.");
872 MODULE_DESCRIPTION("GPIO interface for TWL4030");
873 MODULE_LICENSE("GPL");