drivers/char/watchdog/omap_wdt.c

   1 /*
   2  * linux/drivers/char/watchdog/omap_wdt.c
   3  *
   4  * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
   5  *
   6  * Author: MontaVista Software, Inc.
   7  *       <gdavis@mvista.com> or <source@mvista.com>
   8  *
   9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10  * terms of the GNU General Public License version 2. This program is
  11  * licensed "as is" without any warranty of any kind, whether express
  12  * or implied.
  13  *
  14  * History:
  15  *
  16  * 20030527: George G. Davis <gdavis@mvista.com>
  17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
  20  *
  21  * Copyright (c) 2004 Texas Instruments.
  22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
  23  *      2. Ported to 2.6 kernel
  24  *
  25  * Copyright (c) 2005 David Brownell
  26  *      Use the driver model and standard identifiers; handle bigger timeouts.
  27  */
  28
  29 #include <linux/module.h>
  30 #include <linux/types.h>
  31 #include <linux/kernel.h>
  32 #include <linux/fs.h>
  33 #include <linux/mm.h>
  34 #include <linux/miscdevice.h>
  35 #include <linux/watchdog.h>
  36 #include <linux/reboot.h>
  37 #include <linux/smp_lock.h>
  38 #include <linux/init.h>
  39 #include <linux/err.h>
  40 #include <linux/platform_device.h>
  41 #include <linux/moduleparam.h>
  42 #include <linux/clk.h>
  43
  44 #include <asm/io.h>
  45 #include <asm/uaccess.h>
  46 #include <asm/hardware.h>
  47 #include <asm/bitops.h>
  48
  49 #include <asm/arch/prcm.h>
  50
  51 #include "omap_wdt.h"
  52
  53 static struct platform_device *omap_wdt_dev;
  54
  55 static unsigned timer_margin;
  56 module_param(timer_margin, uint, 0);
  57 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  58
  59 static unsigned int wdt_trgr_pattern = 0x1234;
  60 struct omap_wdt_dev {
  61         void __iomem    *base;          /* physical */
  62         struct device   *dev;
  63         int             omap_wdt_users;
  64         struct clk      *armwdt_ck;
  65         struct clk      *mpu_wdt_ick;
  66         struct clk      *mpu_wdt_fck;
  67         struct resource *mem;
  68         struct miscdevice omap_wdt_miscdev;
  69 };
  70
  71 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
  72 {
  73         void __iomem    *base = wdev->base;
  74         /* wait for posted write to complete */
  75         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  76                 cpu_relax();
  77         wdt_trgr_pattern = ~wdt_trgr_pattern;
  78         omap_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  79         /* wait for posted write to complete */
  80         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  81                 cpu_relax();
  82         /* reloaded WCRR from WLDR */
  83 }
  84
  85 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  86 {
  87         void __iomem *base;
  88         base = wdev->base;
  89         /* Sequence to enable the watchdog */
  90         omap_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  91         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  92                 cpu_relax();
  93         omap_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  94         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  95                 cpu_relax();
  96 }
  97
  98 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  99 {
 100         void __iomem *base;
 101         base = wdev->base;
 102         /* sequence required to disable watchdog */
 103         omap_writel(0xAAAA, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
 104         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
 105                 cpu_relax();
 106         omap_writel(0x5555, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
 107         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
 108                 cpu_relax();
 109 }
 110
 111 static void omap_wdt_adjust_timeout(unsigned new_timeout)
 112 {
 113         if (new_timeout < TIMER_MARGIN_MIN)
 114                 new_timeout = TIMER_MARGIN_DEFAULT;
 115         if (new_timeout > TIMER_MARGIN_MAX)
 116                 new_timeout = TIMER_MARGIN_MAX;
 117         timer_margin = new_timeout;
 118 }
 119
 120 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
 121 {
 122         u32 pre_margin = GET_WLDR_VAL(timer_margin);
 123         void __iomem *base;
 124         base = wdev->base;
 125
 126         /* just count up at 32 KHz */
 127         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
 128                 cpu_relax();
 129         omap_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
 130         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
 131                 cpu_relax();
 132 }
 133
 134 /*
 135  *      Allow only one task to hold it open
 136  */
 137
 138 static int omap_wdt_open(struct inode *inode, struct file *file)
 139 {
 140         struct omap_wdt_dev *wdev;
 141         void __iomem *base;
 142         wdev = platform_get_drvdata(omap_wdt_dev);
 143         base = wdev->base;
 144         if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
 145                 return -EBUSY;
 146
 147         if (cpu_is_omap16xx())
 148                 clk_enable(wdev->armwdt_ck);    /* Enable the clock */
 149
 150         if (cpu_is_omap24xx()) {
 151                 clk_enable(wdev->mpu_wdt_ick);    /* Enable the interface clock */
 152                 clk_enable(wdev->mpu_wdt_fck);    /* Enable the functional clock */
 153         }
 154
 155         /* initialize prescaler */
 156         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
 157                 cpu_relax();
 158         omap_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
 159         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
 160                 cpu_relax();
 161
 162         file->private_data = (void *) wdev;
 163
 164         omap_wdt_set_timeout(wdev);
 165         omap_wdt_enable(wdev);
 166
 167         return 0;
 168 }
 169
 170 static int omap_wdt_release(struct inode *inode, struct file *file)
 171 {
 172         struct omap_wdt_dev *wdev;
 173         wdev = file->private_data;
 174         /*
 175          *      Shut off the timer unless NOWAYOUT is defined.
 176          */
 177 #ifndef CONFIG_WATCHDOG_NOWAYOUT
 178
 179         omap_wdt_disable(wdev);
 180
 181         if (cpu_is_omap16xx()) {
 182                 clk_disable(wdev->armwdt_ck);   /* Disable the clock */
 183                 clk_put(wdev->armwdt_ck);
 184                 wdev->armwdt_ck = NULL;
 185         }
 186
 187         if (cpu_is_omap24xx()) {
 188                 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
 189                 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
 190                 clk_put(wdev->mpu_wdt_ick);
 191                 clk_put(wdev->mpu_wdt_fck);
 192                 wdev->mpu_wdt_ick = NULL;
 193                 wdev->mpu_wdt_fck = NULL;
 194         }
 195 #else
 196         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
 197 #endif
 198         wdev->omap_wdt_users = 0;
 199         return 0;
 200 }
 201
 202 static ssize_t
 203 omap_wdt_write(struct file *file, const char __user *data,
 204                 size_t len, loff_t *ppos)
 205 {
 206         struct omap_wdt_dev *wdev;
 207         wdev = file->private_data;
 208         /* Refresh LOAD_TIME. */
 209         if (len)
 210                 omap_wdt_ping(wdev);
 211         return len;
 212 }
 213
 214 static int
 215 omap_wdt_ioctl(struct inode *inode, struct file *file,
 216         unsigned int cmd, unsigned long arg)
 217 {
 218         struct omap_wdt_dev *wdev;
 219         int new_margin;
 220         static struct watchdog_info ident = {
 221                 .identity = "OMAP Watchdog",
 222                 .options = WDIOF_SETTIMEOUT,
 223                 .firmware_version = 0,
 224         };
 225         wdev = file->private_data;
 226
 227         switch (cmd) {
 228         default:
 229                 return -ENOIOCTLCMD;
 230         case WDIOC_GETSUPPORT:
 231                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
 232                                 sizeof(ident));
 233         case WDIOC_GETSTATUS:
 234                 return put_user(0, (int __user *)arg);
 235         case WDIOC_GETBOOTSTATUS:
 236                 if (cpu_is_omap16xx())
 237                         return put_user(omap_readw(ARM_SYSST),
 238                                         (int __user *)arg);
 239                 if (cpu_is_omap24xx())
 240                         return put_user(omap_prcm_get_reset_sources(),
 241                                         (int __user *)arg);
 242         case WDIOC_KEEPALIVE:
 243                 omap_wdt_ping(wdev);
 244                 return 0;
 245         case WDIOC_SETTIMEOUT:
 246                 if (get_user(new_margin, (int __user *)arg))
 247                         return -EFAULT;
 248                 omap_wdt_adjust_timeout(new_margin);
 249
 250                 omap_wdt_disable(wdev);
 251                 omap_wdt_set_timeout(wdev);
 252                 omap_wdt_enable(wdev);
 253
 254                 omap_wdt_ping(wdev);
 255                 /* Fall */
 256         case WDIOC_GETTIMEOUT:
 257                 return put_user(timer_margin, (int __user *)arg);
 258         }
 259         return 0;
 260 }
 261
 262 static const struct file_operations omap_wdt_fops = {
 263         .owner = THIS_MODULE,
 264         .write = omap_wdt_write,
 265         .ioctl = omap_wdt_ioctl,
 266         .open = omap_wdt_open,
 267         .release = omap_wdt_release,
 268 };
 269
 270
 271 static int __init omap_wdt_probe(struct platform_device *pdev)
 272 {
 273         struct resource *res, *mem;
 274         int ret;
 275         struct omap_wdt_dev *wdev;
 276
 277         /* reserve static register mappings */
 278         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 279         if (!res)
 280                 return -ENOENT;
 281
 282         if (omap_wdt_dev)
 283                 return -EBUSY;
 284
 285         mem = request_mem_region(res->start, res->end - res->start + 1,
 286                                  pdev->name);
 287         if (mem == NULL)
 288                 return -EBUSY;
 289
 290         wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
 291         if (!wdev) {
 292                 ret = -ENOMEM;
 293                 goto fail;
 294         }
 295         wdev->omap_wdt_users = 0;
 296         wdev->mem = mem;
 297
 298         if (cpu_is_omap16xx()) {
 299                 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
 300                 if (IS_ERR(wdev->armwdt_ck)) {
 301                         ret = PTR_ERR(wdev->armwdt_ck);
 302                         wdev->armwdt_ck = NULL;
 303                         goto fail;
 304                 }
 305         }
 306
 307         if (cpu_is_omap24xx()) {
 308                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
 309                 if (IS_ERR(wdev->mpu_wdt_ick)) {
 310                         ret = PTR_ERR(wdev->mpu_wdt_ick);
 311                         wdev->mpu_wdt_ick = NULL;
 312                         goto fail;
 313                 }
 314                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
 315                 if (IS_ERR(wdev->mpu_wdt_fck)) {
 316                         ret = PTR_ERR(wdev->mpu_wdt_fck);
 317                         wdev->mpu_wdt_fck = NULL;
 318                         goto fail;
 319                 }
 320         }
 321         wdev->base = (void __iomem *) (mem->start);
 322         platform_set_drvdata(pdev, wdev);
 323
 324         omap_wdt_disable(wdev);
 325         omap_wdt_adjust_timeout(timer_margin);
 326
 327         wdev->omap_wdt_miscdev.parent = &pdev->dev;
 328         wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
 329         wdev->omap_wdt_miscdev.name = "watchdog";
 330         wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
 331
 332         ret = misc_register(&(wdev->omap_wdt_miscdev));
 333         if (ret)
 334                 goto fail;
 335
 336         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
 337                 omap_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
 338                 timer_margin);
 339
 340         /* autogate OCP interface clock */
 341         omap_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
 342
 343         omap_wdt_dev = pdev;
 344
 345         return 0;
 346
 347 fail:
 348         if (wdev) {
 349                 platform_set_drvdata(pdev, NULL);
 350                 if (wdev->armwdt_ck)
 351                         clk_put(wdev->armwdt_ck);
 352                 if (wdev->mpu_wdt_ick)
 353                         clk_put(wdev->mpu_wdt_ick);
 354                 if (wdev->mpu_wdt_fck)
 355                         clk_put(wdev->mpu_wdt_fck);
 356                 kfree(wdev);
 357         }
 358         if (mem) {
 359                 release_resource(mem);
 360         }
 361         return ret;
 362 }
 363
 364 static void omap_wdt_shutdown(struct platform_device *pdev)
 365 {
 366         struct omap_wdt_dev *wdev;
 367         wdev = platform_get_drvdata(pdev);
 368         omap_wdt_disable(wdev);
 369 }
 370
 371 static int omap_wdt_remove(struct platform_device *pdev)
 372 {
 373         struct omap_wdt_dev *wdev;
 374         wdev = platform_get_drvdata(pdev);
 375
 376         misc_deregister(&(wdev->omap_wdt_miscdev));
 377         release_resource(wdev->mem);
 378         platform_set_drvdata(pdev, NULL);
 379         if (wdev->armwdt_ck)
 380                 clk_put(wdev->armwdt_ck);
 381         if (wdev->mpu_wdt_ick)
 382                 clk_put(wdev->mpu_wdt_ick);
 383         if (wdev->mpu_wdt_fck)
 384                 clk_put(wdev->mpu_wdt_fck);
 385         kfree(wdev);
 386         omap_wdt_dev = NULL;
 387         return 0;
 388 }
 389
 390 #ifdef  CONFIG_PM
 391
 392 /* REVISIT ... not clear this is the best way to handle system suspend; and
 393  * it's very inappropriate for selective device suspend (e.g. suspending this
 394  * through sysfs rather than by stopping the watchdog daemon).  Also, this
 395  * may not play well enough with NOWAYOUT...
 396  */
 397
 398 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
 399 {
 400         struct omap_wdt_dev *wdev;
 401         wdev = platform_get_drvdata(pdev);
 402         if (wdev->omap_wdt_users)
 403                 omap_wdt_disable(wdev);
 404         return 0;
 405 }
 406
 407 static int omap_wdt_resume(struct platform_device *pdev)
 408 {
 409         struct omap_wdt_dev *wdev;
 410         wdev = platform_get_drvdata(pdev);
 411         if (wdev->omap_wdt_users) {
 412                 omap_wdt_enable(wdev);
 413                 omap_wdt_ping(wdev);
 414         }
 415         return 0;
 416 }
 417
 418 #else
 419 #define omap_wdt_suspend        NULL
 420 #define omap_wdt_resume         NULL
 421 #endif
 422
 423 static struct platform_driver omap_wdt_driver = {
 424         .probe          = omap_wdt_probe,
 425         .remove         = omap_wdt_remove,
 426         .shutdown       = omap_wdt_shutdown,
 427         .suspend        = omap_wdt_suspend,
 428         .resume         = omap_wdt_resume,
 429         .driver         = {
 430                 .owner  = THIS_MODULE,
 431                 .name   = "omap_wdt",
 432         },
 433 };
 434
 435 static int __init omap_wdt_init(void)
 436 {
 437         return platform_driver_register(&omap_wdt_driver);
 438 }
 439
 440 static void __exit omap_wdt_exit(void)
 441 {
 442         platform_driver_unregister(&omap_wdt_driver);
 443 }
 444
 445 module_init(omap_wdt_init);
 446 module_exit(omap_wdt_exit);
 447
 448 MODULE_AUTHOR("George G. Davis");
 449 MODULE_LICENSE("GPL");
 450 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);