2 * linux/drivers/char/omap_wdt.c
4 * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@redhat.com>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/config.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/reboot.h>
38 #include <linux/smp_lock.h>
39 #include <linux/init.h>
40 #include <linux/err.h>
41 #include <linux/platform_device.h>
42 #include <linux/moduleparam.h>
45 #include <asm/uaccess.h>
46 #include <asm/hardware.h>
47 #include <asm/bitops.h>
48 #include <asm/hardware/clock.h>
50 #include <asm/arch/prcm.h>
54 static unsigned timer_margin;
55 module_param(timer_margin, uint, 0);
56 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
58 static int omap_wdt_users;
59 static struct clk *armwdt_ck = NULL;
60 static struct clk *mpu_wdt_ick = NULL;
61 static struct clk *mpu_wdt_fck = NULL;
63 static unsigned int wdt_trgr_pattern = 0x1234;
65 static void omap_wdt_ping(void)
67 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) ; /* wait for posted write to complete */
68 wdt_trgr_pattern = ~wdt_trgr_pattern;
69 omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
70 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) ; /* wait for posted write to complete */
71 /* reloaded WCRR from WLDR */
74 static void omap_wdt_enable(void)
76 /* Sequence to enable the watchdog */
77 omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
78 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ;
79 omap_writel(0x4444, OMAP_WATCHDOG_SPR);
80 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ;
83 static void omap_wdt_disable(void)
85 /* sequence required to disable watchdog */
86 omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
87 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ;
88 omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
89 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ;
92 static void omap_wdt_adjust_timeout(unsigned new_timeout)
94 if (new_timeout < TIMER_MARGIN_MIN)
95 new_timeout = TIMER_MARGIN_DEFAULT;
96 if (new_timeout > TIMER_MARGIN_MAX)
97 new_timeout = TIMER_MARGIN_MAX;
98 timer_margin = new_timeout;
101 static void omap_wdt_set_timeout(void)
103 u32 pre_margin = GET_WLDR_VAL(timer_margin);
105 /* just count up at 32 KHz */
106 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
108 omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
109 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
114 * Allow only one task to hold it open
117 static int omap_wdt_open(struct inode *inode, struct file *file)
119 if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
122 if (cpu_is_omap16xx()) {
123 clk_use(armwdt_ck); /* Enable the clock */
126 if (cpu_is_omap24xx()) {
127 clk_use(mpu_wdt_ick); /* Enable the interface clock */
128 clk_use(mpu_wdt_fck); /* Enable the functional clock */
131 /* initialize prescaler */
132 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
134 omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
135 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
138 omap_wdt_set_timeout();
143 static int omap_wdt_release(struct inode *inode, struct file *file)
146 * Shut off the timer unless NOWAYOUT is defined.
148 #ifndef CONFIG_WATCHDOG_NOWAYOUT
151 if (cpu_is_omap16xx()) {
152 clk_unuse(armwdt_ck); /* Disable the clock */
157 if (cpu_is_omap24xx()) {
158 clk_unuse(mpu_wdt_ick); /* Disable the clock */
159 clk_unuse(mpu_wdt_fck); /* Disable the clock */
160 clk_put(mpu_wdt_ick);
161 clk_put(mpu_wdt_fck);
166 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
173 omap_wdt_write(struct file *file, const char __user * data,
174 size_t len, loff_t * ppos)
176 /* Refresh LOAD_TIME. */
183 omap_wdt_ioctl(struct inode *inode, struct file *file,
184 unsigned int cmd, unsigned long arg)
187 static struct watchdog_info ident = {
188 .identity = "OMAP Watchdog",
189 .options = WDIOF_SETTIMEOUT,
190 .firmware_version = 0,
196 case WDIOC_GETSUPPORT:
197 return copy_to_user((struct watchdog_info __user *)arg, &ident,
199 case WDIOC_GETSTATUS:
200 return put_user(0, (int __user *)arg);
201 case WDIOC_GETBOOTSTATUS:
202 if (cpu_is_omap16xx())
203 return put_user(omap_readw(ARM_SYSST),
205 if (cpu_is_omap24xx())
206 return put_user(omap_prcm_get_reset_sources(),
208 case WDIOC_KEEPALIVE:
211 case WDIOC_SETTIMEOUT:
212 if (get_user(new_margin, (int __user *)arg))
214 omap_wdt_adjust_timeout(new_margin);
217 omap_wdt_set_timeout();
222 case WDIOC_GETTIMEOUT:
223 return put_user(timer_margin, (int __user *)arg);
227 static struct file_operations omap_wdt_fops = {
228 .owner = THIS_MODULE,
229 .write = omap_wdt_write,
230 .ioctl = omap_wdt_ioctl,
231 .open = omap_wdt_open,
232 .release = omap_wdt_release,
235 static struct miscdevice omap_wdt_miscdev = {
236 .minor = WATCHDOG_MINOR,
238 .fops = &omap_wdt_fops
241 static int __init omap_wdt_probe(struct platform_device *pdev)
243 struct resource *res, *mem;
246 /* reserve static register mappings */
247 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
251 mem = request_mem_region(res->start, res->end - res->start + 1,
256 platform_set_drvdata(pdev, mem);
260 if (cpu_is_omap16xx()) {
261 armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
262 if (IS_ERR(armwdt_ck)) {
263 ret = PTR_ERR(armwdt_ck);
269 if (cpu_is_omap24xx()) {
270 mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
271 if (IS_ERR(mpu_wdt_ick)) {
272 ret = PTR_ERR(mpu_wdt_ick);
276 mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
277 if (IS_ERR(mpu_wdt_fck)) {
278 ret = PTR_ERR(mpu_wdt_fck);
285 omap_wdt_adjust_timeout(timer_margin);
287 omap_wdt_miscdev.dev = &pdev->dev;
288 ret = misc_register(&omap_wdt_miscdev);
292 pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
294 /* autogate OCP interface clock */
295 omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
302 clk_put(mpu_wdt_ick);
304 clk_put(mpu_wdt_fck);
305 release_resource(mem);
309 static void omap_wdt_shutdown(struct platform_device *pdev)
314 static int omap_wdt_remove(struct platform_device *pdev)
316 struct resource *mem = platform_get_drvdata(pdev);
317 misc_deregister(&omap_wdt_miscdev);
318 release_resource(mem);
322 clk_put(mpu_wdt_ick);
324 clk_put(mpu_wdt_fck);
330 /* REVISIT ... not clear this is the best way to handle system suspend; and
331 * it's very inappropriate for selective device suspend (e.g. suspending this
332 * through sysfs rather than by stopping the watchdog daemon). Also, this
333 * may not play well enough with NOWAYOUT...
336 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
343 static int omap_wdt_resume(struct platform_device *pdev)
345 if (omap_wdt_users) {
353 #define omap_wdt_suspend NULL
354 #define omap_wdt_resume NULL
357 static struct platform_driver omap_wdt_driver = {
358 .probe = omap_wdt_probe,
359 .remove = omap_wdt_remove,
360 .shutdown = omap_wdt_shutdown,
361 .suspend = omap_wdt_suspend,
362 .resume = omap_wdt_resume,
364 .owner = THIS_MODULE,
369 static int __init omap_wdt_init(void)
371 return platform_driver_register(&omap_wdt_driver);
374 static void __exit omap_wdt_exit(void)
376 platform_driver_unregister(&omap_wdt_driver);
379 module_init(omap_wdt_init);
380 module_exit(omap_wdt_exit);
382 MODULE_AUTHOR("George G. Davis");
383 MODULE_LICENSE("GPL");
384 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);