2 * linux/drivers/char/watchdog/omap_wdt.c
4 * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@redhat.com>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
44 #include <asm/uaccess.h>
45 #include <asm/hardware.h>
46 #include <asm/bitops.h>
48 #include <asm/arch/prcm.h>
52 static struct platform_device *omap_wdt_dev;
54 static unsigned timer_margin;
55 module_param(timer_margin, uint, 0);
56 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
58 static unsigned int wdt_trgr_pattern = 0x1234;
60 void __iomem *base; /* physical */
63 struct clk *armwdt_ck;
64 struct clk *mpu_wdt_ick;
65 struct clk *mpu_wdt_fck;
67 struct miscdevice omap_wdt_miscdev;
70 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
72 void __iomem *base = wdev->base;
73 /* wait for posted write to complete */
74 while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
76 wdt_trgr_pattern = ~wdt_trgr_pattern;
77 omap_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
78 /* wait for posted write to complete */
79 while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
81 /* reloaded WCRR from WLDR */
84 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
88 /* Sequence to enable the watchdog */
89 omap_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
90 while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
92 omap_writel(0x4444, base + OMAP_WATCHDOG_SPR);
93 while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
101 /* sequence required to disable watchdog */
102 omap_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
103 while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
105 omap_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
106 while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
110 static void omap_wdt_adjust_timeout(unsigned new_timeout)
112 if (new_timeout < TIMER_MARGIN_MIN)
113 new_timeout = TIMER_MARGIN_DEFAULT;
114 if (new_timeout > TIMER_MARGIN_MAX)
115 new_timeout = TIMER_MARGIN_MAX;
116 timer_margin = new_timeout;
119 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
121 u32 pre_margin = GET_WLDR_VAL(timer_margin);
125 /* just count up at 32 KHz */
126 while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
128 omap_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
129 while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
134 * Allow only one task to hold it open
137 static int omap_wdt_open(struct inode *inode, struct file *file)
139 struct omap_wdt_dev *wdev;
141 wdev = platform_get_drvdata(omap_wdt_dev);
143 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
146 if (cpu_is_omap16xx())
147 clk_enable(wdev->armwdt_ck); /* Enable the clock */
149 if (cpu_is_omap24xx()) {
150 clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */
151 clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */
154 /* initialize prescaler */
155 while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
157 omap_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
158 while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
161 file->private_data = (void *) wdev;
163 omap_wdt_set_timeout(wdev);
164 omap_wdt_enable(wdev);
165 return nonseekable_open(inode, file);
168 static int omap_wdt_release(struct inode *inode, struct file *file)
170 struct omap_wdt_dev *wdev;
171 wdev = file->private_data;
173 * Shut off the timer unless NOWAYOUT is defined.
175 #ifndef CONFIG_WATCHDOG_NOWAYOUT
177 omap_wdt_disable(wdev);
179 if (cpu_is_omap16xx()) {
180 clk_disable(wdev->armwdt_ck); /* Disable the clock */
181 clk_put(wdev->armwdt_ck);
182 wdev->armwdt_ck = NULL;
185 if (cpu_is_omap24xx()) {
186 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
187 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
188 clk_put(wdev->mpu_wdt_ick);
189 clk_put(wdev->mpu_wdt_fck);
190 wdev->mpu_wdt_ick = NULL;
191 wdev->mpu_wdt_fck = NULL;
194 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
196 wdev->omap_wdt_users = 0;
201 omap_wdt_write(struct file *file, const char __user *data,
202 size_t len, loff_t *ppos)
204 struct omap_wdt_dev *wdev;
205 wdev = file->private_data;
206 /* Refresh LOAD_TIME. */
213 omap_wdt_ioctl(struct inode *inode, struct file *file,
214 unsigned int cmd, unsigned long arg)
216 struct omap_wdt_dev *wdev;
218 static struct watchdog_info ident = {
219 .identity = "OMAP Watchdog",
220 .options = WDIOF_SETTIMEOUT,
221 .firmware_version = 0,
223 wdev = file->private_data;
228 case WDIOC_GETSUPPORT:
229 return copy_to_user((struct watchdog_info __user *)arg, &ident,
231 case WDIOC_GETSTATUS:
232 return put_user(0, (int __user *)arg);
233 case WDIOC_GETBOOTSTATUS:
234 if (cpu_is_omap16xx())
235 return put_user(omap_readw(ARM_SYSST),
237 if (cpu_is_omap24xx())
238 return put_user(omap_prcm_get_reset_sources(),
240 case WDIOC_KEEPALIVE:
243 case WDIOC_SETTIMEOUT:
244 if (get_user(new_margin, (int __user *)arg))
246 omap_wdt_adjust_timeout(new_margin);
248 omap_wdt_disable(wdev);
249 omap_wdt_set_timeout(wdev);
250 omap_wdt_enable(wdev);
254 case WDIOC_GETTIMEOUT:
255 return put_user(timer_margin, (int __user *)arg);
260 static const struct file_operations omap_wdt_fops = {
261 .owner = THIS_MODULE,
262 .write = omap_wdt_write,
263 .ioctl = omap_wdt_ioctl,
264 .open = omap_wdt_open,
265 .release = omap_wdt_release,
269 static int __init omap_wdt_probe(struct platform_device *pdev)
271 struct resource *res, *mem;
273 struct omap_wdt_dev *wdev;
275 /* reserve static register mappings */
276 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
283 mem = request_mem_region(res->start, res->end - res->start + 1,
288 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
293 wdev->omap_wdt_users = 0;
296 if (cpu_is_omap16xx()) {
297 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
298 if (IS_ERR(wdev->armwdt_ck)) {
299 ret = PTR_ERR(wdev->armwdt_ck);
300 wdev->armwdt_ck = NULL;
305 if (cpu_is_omap24xx()) {
306 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
307 if (IS_ERR(wdev->mpu_wdt_ick)) {
308 ret = PTR_ERR(wdev->mpu_wdt_ick);
309 wdev->mpu_wdt_ick = NULL;
312 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
313 if (IS_ERR(wdev->mpu_wdt_fck)) {
314 ret = PTR_ERR(wdev->mpu_wdt_fck);
315 wdev->mpu_wdt_fck = NULL;
319 wdev->base = (void __iomem *) (mem->start);
320 platform_set_drvdata(pdev, wdev);
322 omap_wdt_disable(wdev);
323 omap_wdt_adjust_timeout(timer_margin);
325 wdev->omap_wdt_miscdev.parent = &pdev->dev;
326 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
327 wdev->omap_wdt_miscdev.name = "watchdog";
328 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
330 ret = misc_register(&(wdev->omap_wdt_miscdev));
334 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
335 omap_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
338 /* autogate OCP interface clock */
339 omap_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
347 platform_set_drvdata(pdev, NULL);
349 clk_put(wdev->armwdt_ck);
350 if (wdev->mpu_wdt_ick)
351 clk_put(wdev->mpu_wdt_ick);
352 if (wdev->mpu_wdt_fck)
353 clk_put(wdev->mpu_wdt_fck);
357 release_resource(mem);
362 static void omap_wdt_shutdown(struct platform_device *pdev)
364 struct omap_wdt_dev *wdev;
365 wdev = platform_get_drvdata(pdev);
366 omap_wdt_disable(wdev);
369 static int omap_wdt_remove(struct platform_device *pdev)
371 struct omap_wdt_dev *wdev;
372 wdev = platform_get_drvdata(pdev);
374 misc_deregister(&(wdev->omap_wdt_miscdev));
375 release_resource(wdev->mem);
376 platform_set_drvdata(pdev, NULL);
378 clk_put(wdev->armwdt_ck);
379 if (wdev->mpu_wdt_ick)
380 clk_put(wdev->mpu_wdt_ick);
381 if (wdev->mpu_wdt_fck)
382 clk_put(wdev->mpu_wdt_fck);
390 /* REVISIT ... not clear this is the best way to handle system suspend; and
391 * it's very inappropriate for selective device suspend (e.g. suspending this
392 * through sysfs rather than by stopping the watchdog daemon). Also, this
393 * may not play well enough with NOWAYOUT...
396 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
398 struct omap_wdt_dev *wdev;
399 wdev = platform_get_drvdata(pdev);
400 if (wdev->omap_wdt_users)
401 omap_wdt_disable(wdev);
405 static int omap_wdt_resume(struct platform_device *pdev)
407 struct omap_wdt_dev *wdev;
408 wdev = platform_get_drvdata(pdev);
409 if (wdev->omap_wdt_users) {
410 omap_wdt_enable(wdev);
417 #define omap_wdt_suspend NULL
418 #define omap_wdt_resume NULL
421 static struct platform_driver omap_wdt_driver = {
422 .probe = omap_wdt_probe,
423 .remove = omap_wdt_remove,
424 .shutdown = omap_wdt_shutdown,
425 .suspend = omap_wdt_suspend,
426 .resume = omap_wdt_resume,
428 .owner = THIS_MODULE,
433 static int __init omap_wdt_init(void)
435 return platform_driver_register(&omap_wdt_driver);
438 static void __exit omap_wdt_exit(void)
440 platform_driver_unregister(&omap_wdt_driver);
443 module_init(omap_wdt_init);
444 module_exit(omap_wdt_exit);
446 MODULE_AUTHOR("George G. Davis");
447 MODULE_LICENSE("GPL");
448 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);