]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blob - drivers/char/watchdog/omap_wdt.c
Merge omap-upstream
[linux-2.6-omap-h63xx.git] / drivers / char / watchdog / omap_wdt.c
1 /*
2  * linux/drivers/char/watchdog/omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *       <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
23  *      2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *      Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
42
43 #include <asm/io.h>
44 #include <asm/uaccess.h>
45 #include <asm/hardware.h>
46 #include <asm/bitops.h>
47
48 #include <asm/arch/prcm.h>
49
50 #include "omap_wdt.h"
51
52 static struct platform_device *omap_wdt_dev;
53
54 static unsigned timer_margin;
55 module_param(timer_margin, uint, 0);
56 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
57
58 static unsigned int wdt_trgr_pattern = 0x1234;
59 struct omap_wdt_dev {
60         void __iomem    *base;          /* physical */
61         struct device   *dev;
62         int             omap_wdt_users;
63         struct clk      *armwdt_ck;
64         struct clk      *mpu_wdt_ick;
65         struct clk      *mpu_wdt_fck;
66         struct resource *mem;
67         struct miscdevice omap_wdt_miscdev;
68 };
69
70 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
71 {
72         void __iomem    *base = wdev->base;
73         /* wait for posted write to complete */
74         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
75                 cpu_relax();
76         wdt_trgr_pattern = ~wdt_trgr_pattern;
77         omap_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
78         /* wait for posted write to complete */
79         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
80                 cpu_relax();
81         /* reloaded WCRR from WLDR */
82 }
83
84 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
85 {
86         void __iomem *base;
87         base = wdev->base;
88         /* Sequence to enable the watchdog */
89         omap_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
90         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
91                 cpu_relax();
92         omap_writel(0x4444, base + OMAP_WATCHDOG_SPR);
93         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94                 cpu_relax();
95 }
96
97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
98 {
99         void __iomem *base;
100         base = wdev->base;
101         /* sequence required to disable watchdog */
102         omap_writel(0xAAAA, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
103         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
104                 cpu_relax();
105         omap_writel(0x5555, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
106         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
107                 cpu_relax();
108 }
109
110 static void omap_wdt_adjust_timeout(unsigned new_timeout)
111 {
112         if (new_timeout < TIMER_MARGIN_MIN)
113                 new_timeout = TIMER_MARGIN_DEFAULT;
114         if (new_timeout > TIMER_MARGIN_MAX)
115                 new_timeout = TIMER_MARGIN_MAX;
116         timer_margin = new_timeout;
117 }
118
119 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
120 {
121         u32 pre_margin = GET_WLDR_VAL(timer_margin);
122         void __iomem *base;
123         base = wdev->base;
124
125         /* just count up at 32 KHz */
126         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
127                 cpu_relax();
128         omap_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
129         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
130                 cpu_relax();
131 }
132
133 /*
134  *      Allow only one task to hold it open
135  */
136
137 static int omap_wdt_open(struct inode *inode, struct file *file)
138 {
139         struct omap_wdt_dev *wdev;
140         void __iomem *base;
141         wdev = platform_get_drvdata(omap_wdt_dev);
142         base = wdev->base;
143         if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
144                 return -EBUSY;
145
146         if (cpu_is_omap16xx())
147                 clk_enable(wdev->armwdt_ck);    /* Enable the clock */
148
149         if (cpu_is_omap24xx()) {
150                 clk_enable(wdev->mpu_wdt_ick);    /* Enable the interface clock */
151                 clk_enable(wdev->mpu_wdt_fck);    /* Enable the functional clock */
152         }
153
154         /* initialize prescaler */
155         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
156                 cpu_relax();
157         omap_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
158         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
159                 cpu_relax();
160
161         file->private_data = (void *) wdev;
162
163         omap_wdt_set_timeout(wdev);
164         omap_wdt_enable(wdev);
165         return nonseekable_open(inode, file);
166 }
167
168 static int omap_wdt_release(struct inode *inode, struct file *file)
169 {
170         struct omap_wdt_dev *wdev;
171         wdev = file->private_data;
172         /*
173          *      Shut off the timer unless NOWAYOUT is defined.
174          */
175 #ifndef CONFIG_WATCHDOG_NOWAYOUT
176
177         omap_wdt_disable(wdev);
178
179         if (cpu_is_omap16xx()) {
180                 clk_disable(wdev->armwdt_ck);   /* Disable the clock */
181                 clk_put(wdev->armwdt_ck);
182                 wdev->armwdt_ck = NULL;
183         }
184
185         if (cpu_is_omap24xx()) {
186                 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
187                 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
188                 clk_put(wdev->mpu_wdt_ick);
189                 clk_put(wdev->mpu_wdt_fck);
190                 wdev->mpu_wdt_ick = NULL;
191                 wdev->mpu_wdt_fck = NULL;
192         }
193 #else
194         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
195 #endif
196         wdev->omap_wdt_users = 0;
197         return 0;
198 }
199
200 static ssize_t
201 omap_wdt_write(struct file *file, const char __user *data,
202                 size_t len, loff_t *ppos)
203 {
204         struct omap_wdt_dev *wdev;
205         wdev = file->private_data;
206         /* Refresh LOAD_TIME. */
207         if (len)
208                 omap_wdt_ping(wdev);
209         return len;
210 }
211
212 static int
213 omap_wdt_ioctl(struct inode *inode, struct file *file,
214         unsigned int cmd, unsigned long arg)
215 {
216         struct omap_wdt_dev *wdev;
217         int new_margin;
218         static struct watchdog_info ident = {
219                 .identity = "OMAP Watchdog",
220                 .options = WDIOF_SETTIMEOUT,
221                 .firmware_version = 0,
222         };
223         wdev = file->private_data;
224
225         switch (cmd) {
226         default:
227                 return -ENOTTY;
228         case WDIOC_GETSUPPORT:
229                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
230                                 sizeof(ident));
231         case WDIOC_GETSTATUS:
232                 return put_user(0, (int __user *)arg);
233         case WDIOC_GETBOOTSTATUS:
234                 if (cpu_is_omap16xx())
235                         return put_user(omap_readw(ARM_SYSST),
236                                         (int __user *)arg);
237                 if (cpu_is_omap24xx())
238                         return put_user(omap_prcm_get_reset_sources(),
239                                         (int __user *)arg);
240         case WDIOC_KEEPALIVE:
241                 omap_wdt_ping(wdev);
242                 return 0;
243         case WDIOC_SETTIMEOUT:
244                 if (get_user(new_margin, (int __user *)arg))
245                         return -EFAULT;
246                 omap_wdt_adjust_timeout(new_margin);
247
248                 omap_wdt_disable(wdev);
249                 omap_wdt_set_timeout(wdev);
250                 omap_wdt_enable(wdev);
251
252                 omap_wdt_ping(wdev);
253                 /* Fall */
254         case WDIOC_GETTIMEOUT:
255                 return put_user(timer_margin, (int __user *)arg);
256         }
257         return 0;
258 }
259
260 static const struct file_operations omap_wdt_fops = {
261         .owner = THIS_MODULE,
262         .write = omap_wdt_write,
263         .ioctl = omap_wdt_ioctl,
264         .open = omap_wdt_open,
265         .release = omap_wdt_release,
266 };
267
268
269 static int __init omap_wdt_probe(struct platform_device *pdev)
270 {
271         struct resource *res, *mem;
272         int ret;
273         struct omap_wdt_dev *wdev;
274
275         /* reserve static register mappings */
276         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
277         if (!res)
278                 return -ENOENT;
279
280         if (omap_wdt_dev)
281                 return -EBUSY;
282
283         mem = request_mem_region(res->start, res->end - res->start + 1,
284                                  pdev->name);
285         if (mem == NULL)
286                 return -EBUSY;
287
288         wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
289         if (!wdev) {
290                 ret = -ENOMEM;
291                 goto fail;
292         }
293         wdev->omap_wdt_users = 0;
294         wdev->mem = mem;
295
296         if (cpu_is_omap16xx()) {
297                 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
298                 if (IS_ERR(wdev->armwdt_ck)) {
299                         ret = PTR_ERR(wdev->armwdt_ck);
300                         wdev->armwdt_ck = NULL;
301                         goto fail;
302                 }
303         }
304
305         if (cpu_is_omap24xx()) {
306                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
307                 if (IS_ERR(wdev->mpu_wdt_ick)) {
308                         ret = PTR_ERR(wdev->mpu_wdt_ick);
309                         wdev->mpu_wdt_ick = NULL;
310                         goto fail;
311                 }
312                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
313                 if (IS_ERR(wdev->mpu_wdt_fck)) {
314                         ret = PTR_ERR(wdev->mpu_wdt_fck);
315                         wdev->mpu_wdt_fck = NULL;
316                         goto fail;
317                 }
318         }
319         wdev->base = (void __iomem *) (mem->start);
320         platform_set_drvdata(pdev, wdev);
321
322         omap_wdt_disable(wdev);
323         omap_wdt_adjust_timeout(timer_margin);
324
325         wdev->omap_wdt_miscdev.parent = &pdev->dev;
326         wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
327         wdev->omap_wdt_miscdev.name = "watchdog";
328         wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
329
330         ret = misc_register(&(wdev->omap_wdt_miscdev));
331         if (ret)
332                 goto fail;
333
334         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
335                 omap_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
336                 timer_margin);
337
338         /* autogate OCP interface clock */
339         omap_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
340
341         omap_wdt_dev = pdev;
342
343         return 0;
344
345 fail:
346         if (wdev) {
347                 platform_set_drvdata(pdev, NULL);
348                 if (wdev->armwdt_ck)
349                         clk_put(wdev->armwdt_ck);
350                 if (wdev->mpu_wdt_ick)
351                         clk_put(wdev->mpu_wdt_ick);
352                 if (wdev->mpu_wdt_fck)
353                         clk_put(wdev->mpu_wdt_fck);
354                 kfree(wdev);
355         }
356         if (mem) {
357                 release_resource(mem);
358         }
359         return ret;
360 }
361
362 static void omap_wdt_shutdown(struct platform_device *pdev)
363 {
364         struct omap_wdt_dev *wdev;
365         wdev = platform_get_drvdata(pdev);
366         omap_wdt_disable(wdev);
367 }
368
369 static int omap_wdt_remove(struct platform_device *pdev)
370 {
371         struct omap_wdt_dev *wdev;
372         wdev = platform_get_drvdata(pdev);
373
374         misc_deregister(&(wdev->omap_wdt_miscdev));
375         release_resource(wdev->mem);
376         platform_set_drvdata(pdev, NULL);
377         if (wdev->armwdt_ck)
378                 clk_put(wdev->armwdt_ck);
379         if (wdev->mpu_wdt_ick)
380                 clk_put(wdev->mpu_wdt_ick);
381         if (wdev->mpu_wdt_fck)
382                 clk_put(wdev->mpu_wdt_fck);
383         kfree(wdev);
384         omap_wdt_dev = NULL;
385         return 0;
386 }
387
388 #ifdef  CONFIG_PM
389
390 /* REVISIT ... not clear this is the best way to handle system suspend; and
391  * it's very inappropriate for selective device suspend (e.g. suspending this
392  * through sysfs rather than by stopping the watchdog daemon).  Also, this
393  * may not play well enough with NOWAYOUT...
394  */
395
396 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
397 {
398         struct omap_wdt_dev *wdev;
399         wdev = platform_get_drvdata(pdev);
400         if (wdev->omap_wdt_users)
401                 omap_wdt_disable(wdev);
402         return 0;
403 }
404
405 static int omap_wdt_resume(struct platform_device *pdev)
406 {
407         struct omap_wdt_dev *wdev;
408         wdev = platform_get_drvdata(pdev);
409         if (wdev->omap_wdt_users) {
410                 omap_wdt_enable(wdev);
411                 omap_wdt_ping(wdev);
412         }
413         return 0;
414 }
415
416 #else
417 #define omap_wdt_suspend        NULL
418 #define omap_wdt_resume         NULL
419 #endif
420
421 static struct platform_driver omap_wdt_driver = {
422         .probe          = omap_wdt_probe,
423         .remove         = omap_wdt_remove,
424         .shutdown       = omap_wdt_shutdown,
425         .suspend        = omap_wdt_suspend,
426         .resume         = omap_wdt_resume,
427         .driver         = {
428                 .owner  = THIS_MODULE,
429                 .name   = "omap_wdt",
430         },
431 };
432
433 static int __init omap_wdt_init(void)
434 {
435         return platform_driver_register(&omap_wdt_driver);
436 }
437
438 static void __exit omap_wdt_exit(void)
439 {
440         platform_driver_unregister(&omap_wdt_driver);
441 }
442
443 module_init(omap_wdt_init);
444 module_exit(omap_wdt_exit);
445
446 MODULE_AUTHOR("George G. Davis");
447 MODULE_LICENSE("GPL");
448 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);