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1 /*
2  * linux/drivers/char/omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *       <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
23  *      2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *      Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28
29 #include <linux/module.h>
30 #include <linux/config.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/fs.h>
34 #include <linux/mm.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/reboot.h>
38 #include <linux/smp_lock.h>
39 #include <linux/init.h>
40 #include <linux/err.h>
41 #include <linux/platform_device.h>
42 #include <linux/moduleparam.h>
43 #include <linux/clk.h>
44
45 #include <asm/io.h>
46 #include <asm/uaccess.h>
47 #include <asm/hardware.h>
48 #include <asm/bitops.h>
49
50 #include <asm/arch/prcm.h>
51
52 #include "omap_wdt.h"
53
54 static unsigned timer_margin;
55 module_param(timer_margin, uint, 0);
56 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
57
58 static int omap_wdt_users;
59 static struct clk *armwdt_ck = NULL;
60 static struct clk *mpu_wdt_ick = NULL;
61 static struct clk *mpu_wdt_fck = NULL;
62
63 static unsigned int wdt_trgr_pattern = 0x1234;
64
65 static void omap_wdt_ping(void)
66 {
67         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) ;        /* wait for posted write to complete */
68         wdt_trgr_pattern = ~wdt_trgr_pattern;
69         omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
70         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) ;        /* wait for posted write to complete */
71         /* reloaded WCRR from WLDR */
72 }
73
74 static void omap_wdt_enable(void)
75 {
76         /* Sequence to enable the watchdog */
77         omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
78         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ;
79         omap_writel(0x4444, OMAP_WATCHDOG_SPR);
80         while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ;
81 }
82
83 static void omap_wdt_disable(void)
84 {
85         /* sequence required to disable watchdog */
86         omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
87         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ;
88         omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
89         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ;
90 }
91
92 static void omap_wdt_adjust_timeout(unsigned new_timeout)
93 {
94         if (new_timeout < TIMER_MARGIN_MIN)
95                 new_timeout = TIMER_MARGIN_DEFAULT;
96         if (new_timeout > TIMER_MARGIN_MAX)
97                 new_timeout = TIMER_MARGIN_MAX;
98         timer_margin = new_timeout;
99 }
100
101 static void omap_wdt_set_timeout(void)
102 {
103         u32 pre_margin = GET_WLDR_VAL(timer_margin);
104
105         /* just count up at 32 KHz */
106         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
107                 continue;
108         omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
109         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
110                 continue;
111 }
112
113 /*
114  *      Allow only one task to hold it open
115  */
116
117 static int omap_wdt_open(struct inode *inode, struct file *file)
118 {
119         if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
120                 return -EBUSY;
121
122         if (cpu_is_omap16xx()) {
123                 clk_enable(armwdt_ck);  /* Enable the clock */
124         }
125
126         if (cpu_is_omap24xx()) {
127                 clk_enable(mpu_wdt_ick);        /* Enable the interface clock */
128                 clk_enable(mpu_wdt_fck);        /* Enable the functional clock */
129         }
130
131         /* initialize prescaler */
132         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
133                 continue;
134         omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
135         while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
136                 continue;
137
138         omap_wdt_set_timeout();
139         omap_wdt_enable();
140         return 0;
141 }
142
143 static int omap_wdt_release(struct inode *inode, struct file *file)
144 {
145         /*
146          *      Shut off the timer unless NOWAYOUT is defined.
147          */
148 #ifndef CONFIG_WATCHDOG_NOWAYOUT
149         omap_wdt_disable();
150
151         if (cpu_is_omap16xx()) {
152                 clk_disable(armwdt_ck); /* Disable the clock */
153                 clk_put(armwdt_ck);
154                 armwdt_ck = NULL;
155         }
156
157         if (cpu_is_omap24xx()) {
158                 clk_disable(mpu_wdt_ick);       /* Disable the clock */
159                 clk_disable(mpu_wdt_fck);       /* Disable the clock */
160                 clk_put(mpu_wdt_ick);
161                 clk_put(mpu_wdt_fck);
162                 mpu_wdt_ick = NULL;
163                 mpu_wdt_fck = NULL;
164         }
165 #else
166         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
167 #endif
168         omap_wdt_users = 0;
169         return 0;
170 }
171
172 static ssize_t
173 omap_wdt_write(struct file *file, const char __user * data,
174         size_t len, loff_t * ppos)
175 {
176         /* Refresh LOAD_TIME. */
177         if (len)
178                 omap_wdt_ping();
179         return len;
180 }
181
182 static int
183 omap_wdt_ioctl(struct inode *inode, struct file *file,
184         unsigned int cmd, unsigned long arg)
185 {
186         int new_margin;
187         static struct watchdog_info ident = {
188                 .identity = "OMAP Watchdog",
189                 .options = WDIOF_SETTIMEOUT,
190                 .firmware_version = 0,
191         };
192
193         switch (cmd) {
194         default:
195                 return -ENOIOCTLCMD;
196         case WDIOC_GETSUPPORT:
197                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
198         sizeof(ident));
199         case WDIOC_GETSTATUS:
200                 return put_user(0, (int __user *)arg);
201         case WDIOC_GETBOOTSTATUS:
202                 if (cpu_is_omap16xx())
203                         return put_user(omap_readw(ARM_SYSST),
204                                         (int __user *)arg);
205                 if (cpu_is_omap24xx())
206                         return put_user(omap_prcm_get_reset_sources(),
207                                         (int __user *)arg);
208         case WDIOC_KEEPALIVE:
209                 omap_wdt_ping();
210                 return 0;
211         case WDIOC_SETTIMEOUT:
212                 if (get_user(new_margin, (int __user *)arg))
213                         return -EFAULT;
214                 omap_wdt_adjust_timeout(new_margin);
215
216                 omap_wdt_disable();
217                 omap_wdt_set_timeout();
218                 omap_wdt_enable();
219
220                 omap_wdt_ping();
221                 /* Fall */
222         case WDIOC_GETTIMEOUT:
223                 return put_user(timer_margin, (int __user *)arg);
224         }
225 }
226
227 static struct file_operations omap_wdt_fops = {
228         .owner = THIS_MODULE,
229         .write = omap_wdt_write,
230         .ioctl = omap_wdt_ioctl,
231         .open = omap_wdt_open,
232         .release = omap_wdt_release,
233 };
234
235 static struct miscdevice omap_wdt_miscdev = {
236         .minor = WATCHDOG_MINOR,
237         .name = "watchdog",
238         .fops = &omap_wdt_fops
239 };
240
241 static int __init omap_wdt_probe(struct platform_device *pdev)
242 {
243         struct resource *res, *mem;
244         int ret;
245
246         /* reserve static register mappings */
247         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
248         if (!res)
249                 return -ENOENT;
250
251         mem = request_mem_region(res->start, res->end - res->start + 1,
252                                  pdev->name);
253         if (mem == NULL)
254                 return -EBUSY;
255
256         platform_set_drvdata(pdev, mem);
257
258         omap_wdt_users = 0;
259
260         if (cpu_is_omap16xx()) {
261                 armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
262                 if (IS_ERR(armwdt_ck)) {
263                         ret = PTR_ERR(armwdt_ck);
264                         armwdt_ck = NULL;
265                         goto fail;
266                 }
267         }
268
269         if (cpu_is_omap24xx()) {
270                 mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
271                 if (IS_ERR(mpu_wdt_ick)) {
272                         ret = PTR_ERR(mpu_wdt_ick);
273                         mpu_wdt_ick = NULL;
274                         goto fail;
275                 }
276                 mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
277                 if (IS_ERR(mpu_wdt_fck)) {
278                         ret = PTR_ERR(mpu_wdt_fck);
279                         mpu_wdt_fck = NULL;
280                         goto fail;
281                 }
282         }
283
284         omap_wdt_disable();
285         omap_wdt_adjust_timeout(timer_margin);
286
287         omap_wdt_miscdev.dev = &pdev->dev;
288         ret = misc_register(&omap_wdt_miscdev);
289         if (ret)
290                 goto fail;
291
292         pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
293
294         /* autogate OCP interface clock */
295         omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
296         return 0;
297
298 fail:
299         if (armwdt_ck)
300                 clk_put(armwdt_ck);
301         if (mpu_wdt_ick)
302                 clk_put(mpu_wdt_ick);
303         if (mpu_wdt_fck)
304                 clk_put(mpu_wdt_fck);
305         release_resource(mem);
306         return ret;
307 }
308
309 static void omap_wdt_shutdown(struct platform_device *pdev)
310 {
311         omap_wdt_disable();
312 }
313
314 static int omap_wdt_remove(struct platform_device *pdev)
315 {
316         struct resource *mem = platform_get_drvdata(pdev);
317         misc_deregister(&omap_wdt_miscdev);
318         release_resource(mem);
319         if (armwdt_ck)
320                 clk_put(armwdt_ck);
321         if (mpu_wdt_ick)
322                 clk_put(mpu_wdt_ick);
323         if (mpu_wdt_fck)
324                 clk_put(mpu_wdt_fck);
325         return 0;
326 }
327
328 #ifdef  CONFIG_PM
329
330 /* REVISIT ... not clear this is the best way to handle system suspend; and
331  * it's very inappropriate for selective device suspend (e.g. suspending this
332  * through sysfs rather than by stopping the watchdog daemon).  Also, this
333  * may not play well enough with NOWAYOUT...
334  */
335
336 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
337 {
338         if (omap_wdt_users)
339                 omap_wdt_disable();
340         return 0;
341 }
342
343 static int omap_wdt_resume(struct platform_device *pdev)
344 {
345         if (omap_wdt_users) {
346                 omap_wdt_enable();
347                 omap_wdt_ping();
348         }
349         return 0;
350 }
351
352 #else
353 #define omap_wdt_suspend        NULL
354 #define omap_wdt_resume         NULL
355 #endif
356
357 static struct platform_driver omap_wdt_driver = {
358         .probe          = omap_wdt_probe,
359         .remove         = omap_wdt_remove,
360         .shutdown       = omap_wdt_shutdown,
361         .suspend        = omap_wdt_suspend,
362         .resume         = omap_wdt_resume,
363         .driver         = {
364                 .owner  = THIS_MODULE,
365                 .name   = "omap_wdt",
366         },
367 };
368
369 static int __init omap_wdt_init(void)
370 {
371         return platform_driver_register(&omap_wdt_driver);
372 }
373
374 static void __exit omap_wdt_exit(void)
375 {
376         platform_driver_unregister(&omap_wdt_driver);
377 }
378
379 module_init(omap_wdt_init);
380 module_exit(omap_wdt_exit);
381
382 MODULE_AUTHOR("George G. Davis");
383 MODULE_LICENSE("GPL");
384 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);