2 * linux/drivers/char/omap_wdt.c
4 * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@redhat.com>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/config.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/reboot.h>
38 #include <linux/smp_lock.h>
39 #include <linux/init.h>
40 #include <linux/err.h>
41 #include <linux/platform_device.h>
42 #include <linux/moduleparam.h>
45 #include <asm/uaccess.h>
46 #include <asm/hardware.h>
47 #include <asm/bitops.h>
48 #include <asm/hardware/clock.h>
50 #ifdef CONFIG_ARCH_OMAP24XX
51 #include <asm/arch/prcm.h>
56 static unsigned timer_margin;
57 module_param(timer_margin, uint, 0);
58 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
60 static int omap_wdt_users;
61 static struct clk *armwdt_ck = NULL;
62 static struct clk *mpu_wdt_ick = NULL;
63 static struct clk *mpu_wdt_fck = NULL;
65 static unsigned int wdt_trgr_pattern = 0x1234;
67 static void omap_wdt_ping(void)
69 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) ; /* wait for posted write to complete */
70 wdt_trgr_pattern = ~wdt_trgr_pattern;
71 omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
72 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) ; /* wait for posted write to complete */
73 /* reloaded WCRR from WLDR */
76 static void omap_wdt_enable(void)
78 /* Sequence to enable the watchdog */
79 omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
80 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ;
81 omap_writel(0x4444, OMAP_WATCHDOG_SPR);
82 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) ;
85 static void omap_wdt_disable(void)
87 /* sequence required to disable watchdog */
88 omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
89 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ;
90 omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
91 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) ;
94 static void omap_wdt_adjust_timeout(unsigned new_timeout)
96 if (new_timeout < TIMER_MARGIN_MIN)
97 new_timeout = TIMER_MARGIN_DEFAULT;
98 if (new_timeout > TIMER_MARGIN_MAX)
99 new_timeout = TIMER_MARGIN_MAX;
100 timer_margin = new_timeout;
103 static void omap_wdt_set_timeout(void)
105 u32 pre_margin = GET_WLDR_VAL(timer_margin);
107 /* just count up at 32 KHz */
108 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
110 omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
111 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
116 * Allow only one task to hold it open
119 static int omap_wdt_open(struct inode *inode, struct file *file)
121 if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
124 if (cpu_is_omap16xx()) {
125 clk_use(armwdt_ck); /* Enable the clock */
128 if (cpu_is_omap24xx()) {
129 clk_use(mpu_wdt_ick); /* Enable the interface clock */
130 clk_use(mpu_wdt_fck); /* Enable the functional clock */
133 /* initialize prescaler */
134 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
136 omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
137 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
140 omap_wdt_set_timeout();
145 static int omap_wdt_release(struct inode *inode, struct file *file)
148 * Shut off the timer unless NOWAYOUT is defined.
150 #ifndef CONFIG_WATCHDOG_NOWAYOUT
153 if (cpu_is_omap16xx()) {
154 clk_unuse(armwdt_ck); /* Disable the clock */
159 if (cpu_is_omap24xx()) {
160 clk_unuse(mpu_wdt_ick); /* Disable the clock */
161 clk_unuse(mpu_wdt_fck); /* Disable the clock */
162 clk_put(mpu_wdt_ick);
163 clk_put(mpu_wdt_fck);
168 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
175 omap_wdt_write(struct file *file, const char __user * data,
176 size_t len, loff_t * ppos)
178 /* Refresh LOAD_TIME. */
185 omap_wdt_ioctl(struct inode *inode, struct file *file,
186 unsigned int cmd, unsigned long arg)
189 static struct watchdog_info ident = {
190 .identity = "OMAP Watchdog",
191 .options = WDIOF_SETTIMEOUT,
192 .firmware_version = 0,
198 case WDIOC_GETSUPPORT:
199 return copy_to_user((struct watchdog_info __user *)arg, &ident,
201 case WDIOC_GETSTATUS:
202 return put_user(0, (int __user *)arg);
203 case WDIOC_GETBOOTSTATUS:
204 if (cpu_is_omap16xx())
205 return put_user(omap_readw(ARM_SYSST),
207 if (cpu_is_omap24xx())
208 return put_user(RM_RSTST_WKUP, (int __user *)arg);
209 case WDIOC_KEEPALIVE:
212 case WDIOC_SETTIMEOUT:
213 if (get_user(new_margin, (int __user *)arg))
215 omap_wdt_adjust_timeout(new_margin);
218 omap_wdt_set_timeout();
223 case WDIOC_GETTIMEOUT:
224 return put_user(timer_margin, (int __user *)arg);
228 static struct file_operations omap_wdt_fops = {
229 .owner = THIS_MODULE,
230 .write = omap_wdt_write,
231 .ioctl = omap_wdt_ioctl,
232 .open = omap_wdt_open,
233 .release = omap_wdt_release,
236 static struct miscdevice omap_wdt_miscdev = {
237 .minor = WATCHDOG_MINOR,
239 .fops = &omap_wdt_fops
242 static int __init omap_wdt_probe(struct device *dev)
244 struct platform_device *pdev = to_platform_device(dev);
245 struct resource *res, *mem;
248 /* reserve static register mappings */
249 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
253 mem = request_mem_region(res->start, res->end - res->start + 1,
258 dev_set_drvdata(dev, mem);
262 if (cpu_is_omap16xx()) {
263 armwdt_ck = clk_get(dev, "armwdt_ck");
264 if (IS_ERR(armwdt_ck)) {
265 ret = PTR_ERR(armwdt_ck);
271 if (cpu_is_omap24xx()) {
272 mpu_wdt_ick = clk_get(dev, "mpu_wdt_ick");
273 if (IS_ERR(mpu_wdt_ick)) {
274 ret = PTR_ERR(mpu_wdt_ick);
278 mpu_wdt_fck = clk_get(dev, "mpu_wdt_fck");
279 if (IS_ERR(mpu_wdt_fck)) {
280 ret = PTR_ERR(mpu_wdt_fck);
287 omap_wdt_adjust_timeout(timer_margin);
289 omap_wdt_miscdev.dev = dev;
290 ret = misc_register(&omap_wdt_miscdev);
294 pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
296 /* autogate OCP interface clock */
297 omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
304 clk_put(mpu_wdt_ick);
306 clk_put(mpu_wdt_fck);
307 release_resource(mem);
311 static void omap_wdt_shutdown(struct device *dev)
316 static int __exit omap_wdt_remove(struct device *dev)
318 struct resource *mem = dev_get_drvdata(dev);
319 misc_deregister(&omap_wdt_miscdev);
320 release_resource(mem);
324 clk_put(mpu_wdt_ick);
326 clk_put(mpu_wdt_fck);
332 /* REVISIT ... not clear this is the best way to handle system suspend; and
333 * it's very inappropriate for selective device suspend (e.g. suspending this
334 * through sysfs rather than by stopping the watchdog daemon). Also, this
335 * may not play well enough with NOWAYOUT...
338 static int omap_wdt_suspend(struct device *dev, pm_message_t state)
345 static int omap_wdt_resume(struct device *dev)
347 if (omap_wdt_users) {
355 #define omap_wdt_suspend NULL
356 #define omap_wdt_resume NULL
359 static struct device_driver omap_wdt_driver = {
361 .bus = &platform_bus_type,
362 .probe = omap_wdt_probe,
363 .shutdown = omap_wdt_shutdown,
364 .remove = __exit_p(omap_wdt_remove),
365 .suspend = omap_wdt_suspend,
366 .resume = omap_wdt_resume,
369 static int __init omap_wdt_init(void)
371 return driver_register(&omap_wdt_driver);
374 static void __exit omap_wdt_exit(void)
376 driver_unregister(&omap_wdt_driver);
379 module_init(omap_wdt_init);
380 module_exit(omap_wdt_exit);
382 MODULE_AUTHOR("George G. Davis");
383 MODULE_LICENSE("GPL");
384 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);