2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
35 #include <asm/current.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
40 #include <asm/div64.h>
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec.htm
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
56 #if BITS_PER_LONG == 64
57 #define write_counter(V, MC) writeq(V, MC)
58 #define read_counter(MC) readq(MC)
60 #define write_counter(V, MC) writel(V, MC)
61 #define read_counter(MC) readl(MC)
64 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
66 /* This clocksource driver currently only works on ia64 */
68 static void __iomem *hpet_mctr;
70 static cycle_t read_hpet(void)
72 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
75 static struct clocksource clocksource_hpet = {
79 .mask = CLOCKSOURCE_MASK(64),
80 .mult = 0, /*to be caluclated*/
82 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
84 static struct clocksource *hpet_clocksource;
87 /* A lock for concurrent access by app and isr hpet activity. */
88 static DEFINE_SPINLOCK(hpet_lock);
89 /* A lock for concurrent intermodule access to hpet and isr hpet activity. */
90 static DEFINE_SPINLOCK(hpet_task_lock);
92 #define HPET_DEV_NAME (7)
95 struct hpets *hd_hpets;
96 struct hpet __iomem *hd_hpet;
97 struct hpet_timer __iomem *hd_timer;
98 unsigned long hd_ireqfreq;
99 unsigned long hd_irqdata;
100 wait_queue_head_t hd_waitqueue;
101 struct fasync_struct *hd_async_queue;
102 struct hpet_task *hd_task;
103 unsigned int hd_flags;
105 unsigned int hd_hdwirq;
106 char hd_name[HPET_DEV_NAME];
110 struct hpets *hp_next;
111 struct hpet __iomem *hp_hpet;
112 unsigned long hp_hpet_phys;
113 struct clocksource *hp_clocksource;
114 unsigned long long hp_tick_freq;
115 unsigned long hp_delta;
116 unsigned int hp_ntimer;
117 unsigned int hp_which;
118 struct hpet_dev hp_dev[1];
121 static struct hpets *hpets;
123 #define HPET_OPEN 0x0001
124 #define HPET_IE 0x0002 /* interrupt enabled */
125 #define HPET_PERIODIC 0x0004
126 #define HPET_SHARED_IRQ 0x0008
130 static inline unsigned long long readq(void __iomem *addr)
132 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
137 static inline void writeq(unsigned long long v, void __iomem *addr)
139 writel(v & 0xffffffff, addr);
140 writel(v >> 32, addr + 4);
144 static irqreturn_t hpet_interrupt(int irq, void *data)
146 struct hpet_dev *devp;
150 isr = 1 << (devp - devp->hd_hpets->hp_dev);
152 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
153 !(isr & readl(&devp->hd_hpet->hpet_isr)))
156 spin_lock(&hpet_lock);
160 * For non-periodic timers, increment the accumulator.
161 * This has the effect of treating non-periodic like periodic.
163 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
166 t = devp->hd_ireqfreq;
167 m = read_counter(&devp->hd_hpet->hpet_mc);
168 write_counter(t + m + devp->hd_hpets->hp_delta,
169 &devp->hd_timer->hpet_compare);
172 if (devp->hd_flags & HPET_SHARED_IRQ)
173 writel(isr, &devp->hd_hpet->hpet_isr);
174 spin_unlock(&hpet_lock);
176 spin_lock(&hpet_task_lock);
178 devp->hd_task->ht_func(devp->hd_task->ht_data);
179 spin_unlock(&hpet_task_lock);
181 wake_up_interruptible(&devp->hd_waitqueue);
183 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
188 static void hpet_timer_set_irq(struct hpet_dev *devp)
192 struct hpet_timer __iomem *timer;
194 spin_lock_irq(&hpet_lock);
195 if (devp->hd_hdwirq) {
196 spin_unlock_irq(&hpet_lock);
200 timer = devp->hd_timer;
202 /* we prefer level triggered mode */
203 v = readl(&timer->hpet_config);
204 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
205 v |= Tn_INT_TYPE_CNF_MASK;
206 writel(v, &timer->hpet_config);
208 spin_unlock_irq(&hpet_lock);
210 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
211 Tn_INT_ROUTE_CAP_SHIFT;
214 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
215 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
217 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
222 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ;
223 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) {
225 if (irq >= NR_IRQS) {
230 gsi = acpi_register_gsi(irq, ACPI_LEVEL_SENSITIVE,
235 /* FIXME: Setup interrupt source table */
238 if (irq < HPET_MAX_IRQ) {
239 spin_lock_irq(&hpet_lock);
240 v = readl(&timer->hpet_config);
241 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
242 writel(v, &timer->hpet_config);
243 devp->hd_hdwirq = gsi;
244 spin_unlock_irq(&hpet_lock);
249 static int hpet_open(struct inode *inode, struct file *file)
251 struct hpet_dev *devp;
255 if (file->f_mode & FMODE_WRITE)
259 spin_lock_irq(&hpet_lock);
261 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
262 for (i = 0; i < hpetp->hp_ntimer; i++)
263 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN
264 || hpetp->hp_dev[i].hd_task)
267 devp = &hpetp->hp_dev[i];
272 spin_unlock_irq(&hpet_lock);
277 file->private_data = devp;
278 devp->hd_irqdata = 0;
279 devp->hd_flags |= HPET_OPEN;
280 spin_unlock_irq(&hpet_lock);
283 hpet_timer_set_irq(devp);
289 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
291 DECLARE_WAITQUEUE(wait, current);
294 struct hpet_dev *devp;
296 devp = file->private_data;
297 if (!devp->hd_ireqfreq)
300 if (count < sizeof(unsigned long))
303 add_wait_queue(&devp->hd_waitqueue, &wait);
306 set_current_state(TASK_INTERRUPTIBLE);
308 spin_lock_irq(&hpet_lock);
309 data = devp->hd_irqdata;
310 devp->hd_irqdata = 0;
311 spin_unlock_irq(&hpet_lock);
315 else if (file->f_flags & O_NONBLOCK) {
318 } else if (signal_pending(current)) {
319 retval = -ERESTARTSYS;
325 retval = put_user(data, (unsigned long __user *)buf);
327 retval = sizeof(unsigned long);
329 __set_current_state(TASK_RUNNING);
330 remove_wait_queue(&devp->hd_waitqueue, &wait);
335 static unsigned int hpet_poll(struct file *file, poll_table * wait)
338 struct hpet_dev *devp;
340 devp = file->private_data;
342 if (!devp->hd_ireqfreq)
345 poll_wait(file, &devp->hd_waitqueue, wait);
347 spin_lock_irq(&hpet_lock);
348 v = devp->hd_irqdata;
349 spin_unlock_irq(&hpet_lock);
352 return POLLIN | POLLRDNORM;
357 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
359 #ifdef CONFIG_HPET_MMAP
360 struct hpet_dev *devp;
363 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
366 devp = file->private_data;
367 addr = devp->hd_hpets->hp_hpet_phys;
369 if (addr & (PAGE_SIZE - 1))
372 vma->vm_flags |= VM_IO;
373 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
375 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
376 PAGE_SIZE, vma->vm_page_prot)) {
377 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
388 static int hpet_fasync(int fd, struct file *file, int on)
390 struct hpet_dev *devp;
392 devp = file->private_data;
394 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
400 static int hpet_release(struct inode *inode, struct file *file)
402 struct hpet_dev *devp;
403 struct hpet_timer __iomem *timer;
406 devp = file->private_data;
407 timer = devp->hd_timer;
409 spin_lock_irq(&hpet_lock);
411 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
412 &timer->hpet_config);
417 devp->hd_ireqfreq = 0;
419 if (devp->hd_flags & HPET_PERIODIC
420 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
423 v = readq(&timer->hpet_config);
424 v ^= Tn_TYPE_CNF_MASK;
425 writeq(v, &timer->hpet_config);
428 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
429 spin_unlock_irq(&hpet_lock);
434 if (file->f_flags & FASYNC)
435 hpet_fasync(-1, file, 0);
437 file->private_data = NULL;
441 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
444 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
447 struct hpet_dev *devp;
449 devp = file->private_data;
450 return hpet_ioctl_common(devp, cmd, arg, 0);
453 static int hpet_ioctl_ieon(struct hpet_dev *devp)
455 struct hpet_timer __iomem *timer;
456 struct hpet __iomem *hpet;
459 unsigned long g, v, t, m;
460 unsigned long flags, isr;
462 timer = devp->hd_timer;
463 hpet = devp->hd_hpet;
464 hpetp = devp->hd_hpets;
466 if (!devp->hd_ireqfreq)
469 spin_lock_irq(&hpet_lock);
471 if (devp->hd_flags & HPET_IE) {
472 spin_unlock_irq(&hpet_lock);
476 devp->hd_flags |= HPET_IE;
478 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
479 devp->hd_flags |= HPET_SHARED_IRQ;
480 spin_unlock_irq(&hpet_lock);
482 irq = devp->hd_hdwirq;
485 unsigned long irq_flags;
487 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
488 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
489 ? IRQF_SHARED : IRQF_DISABLED;
490 if (request_irq(irq, hpet_interrupt, irq_flags,
491 devp->hd_name, (void *)devp)) {
492 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
498 spin_lock_irq(&hpet_lock);
499 devp->hd_flags ^= HPET_IE;
500 spin_unlock_irq(&hpet_lock);
505 t = devp->hd_ireqfreq;
506 v = readq(&timer->hpet_config);
507 g = v | Tn_INT_ENB_CNF_MASK;
509 if (devp->hd_flags & HPET_PERIODIC) {
510 write_counter(t, &timer->hpet_compare);
511 g |= Tn_TYPE_CNF_MASK;
512 v |= Tn_TYPE_CNF_MASK;
513 writeq(v, &timer->hpet_config);
514 v |= Tn_VAL_SET_CNF_MASK;
515 writeq(v, &timer->hpet_config);
516 local_irq_save(flags);
517 m = read_counter(&hpet->hpet_mc);
518 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
520 local_irq_save(flags);
521 m = read_counter(&hpet->hpet_mc);
522 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
525 if (devp->hd_flags & HPET_SHARED_IRQ) {
526 isr = 1 << (devp - devp->hd_hpets->hp_dev);
527 writel(isr, &hpet->hpet_isr);
529 writeq(g, &timer->hpet_config);
530 local_irq_restore(flags);
535 /* converts Hz to number of timer ticks */
536 static inline unsigned long hpet_time_div(struct hpets *hpets,
539 unsigned long long m;
541 m = hpets->hp_tick_freq + (dis >> 1);
543 return (unsigned long)m;
547 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
549 struct hpet_timer __iomem *timer;
550 struct hpet __iomem *hpet;
561 timer = devp->hd_timer;
562 hpet = devp->hd_hpet;
563 hpetp = devp->hd_hpets;
566 return hpet_ioctl_ieon(devp);
575 if ((devp->hd_flags & HPET_IE) == 0)
577 v = readq(&timer->hpet_config);
578 v &= ~Tn_INT_ENB_CNF_MASK;
579 writeq(v, &timer->hpet_config);
581 free_irq(devp->hd_irq, devp);
584 devp->hd_flags ^= HPET_IE;
588 struct hpet_info info;
590 if (devp->hd_ireqfreq)
592 hpet_time_div(hpetp, devp->hd_ireqfreq);
594 info.hi_ireqfreq = 0;
596 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
597 info.hi_hpet = hpetp->hp_which;
598 info.hi_timer = devp - hpetp->hp_dev;
600 memcpy((void *)arg, &info, sizeof(info));
602 if (copy_to_user((void __user *)arg, &info,
608 v = readq(&timer->hpet_config);
609 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
613 devp->hd_flags |= HPET_PERIODIC;
616 v = readq(&timer->hpet_config);
617 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
621 if (devp->hd_flags & HPET_PERIODIC &&
622 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
623 v = readq(&timer->hpet_config);
624 v ^= Tn_TYPE_CNF_MASK;
625 writeq(v, &timer->hpet_config);
627 devp->hd_flags &= ~HPET_PERIODIC;
630 if (!kernel && (arg > hpet_max_freq) &&
631 !capable(CAP_SYS_RESOURCE)) {
641 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
647 static const struct file_operations hpet_fops = {
648 .owner = THIS_MODULE,
654 .release = hpet_release,
655 .fasync = hpet_fasync,
659 static int hpet_is_known(struct hpet_data *hdp)
663 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
664 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
670 static inline int hpet_tpcheck(struct hpet_task *tp)
672 struct hpet_dev *devp;
675 devp = tp->ht_opaque;
680 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
681 if (devp >= hpetp->hp_dev
682 && devp < (hpetp->hp_dev + hpetp->hp_ntimer)
683 && devp->hd_hpet == hpetp->hp_hpet)
690 int hpet_unregister(struct hpet_task *tp)
692 struct hpet_dev *devp;
693 struct hpet_timer __iomem *timer;
696 if ((err = hpet_tpcheck(tp)))
699 spin_lock_irq(&hpet_task_lock);
700 spin_lock(&hpet_lock);
702 devp = tp->ht_opaque;
703 if (devp->hd_task != tp) {
704 spin_unlock(&hpet_lock);
705 spin_unlock_irq(&hpet_task_lock);
709 timer = devp->hd_timer;
710 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
711 &timer->hpet_config);
712 devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC);
713 devp->hd_task = NULL;
714 spin_unlock(&hpet_lock);
715 spin_unlock_irq(&hpet_task_lock);
721 static ctl_table hpet_table[] = {
723 .ctl_name = CTL_UNNUMBERED,
724 .procname = "max-user-freq",
725 .data = &hpet_max_freq,
726 .maxlen = sizeof(int),
728 .proc_handler = &proc_dointvec,
733 static ctl_table hpet_root[] = {
735 .ctl_name = CTL_UNNUMBERED,
744 static ctl_table dev_root[] = {
755 static struct ctl_table_header *sysctl_header;
758 * Adjustment for when arming the timer with
759 * initial conditions. That is, main counter
760 * ticks expired before interrupts are enabled.
762 #define TICK_CALIBRATE (1000UL)
764 static unsigned long hpet_calibrate(struct hpets *hpetp)
766 struct hpet_timer __iomem *timer = NULL;
767 unsigned long t, m, count, i, flags, start;
768 struct hpet_dev *devp;
770 struct hpet __iomem *hpet;
772 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
773 if ((devp->hd_flags & HPET_OPEN) == 0) {
774 timer = devp->hd_timer;
781 hpet = hpetp->hp_hpet;
782 t = read_counter(&timer->hpet_compare);
785 count = hpet_time_div(hpetp, TICK_CALIBRATE);
787 local_irq_save(flags);
789 start = read_counter(&hpet->hpet_mc);
792 m = read_counter(&hpet->hpet_mc);
793 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
794 } while (i++, (m - start) < count);
796 local_irq_restore(flags);
798 return (m - start) / i;
801 int hpet_alloc(struct hpet_data *hdp)
804 struct hpet_dev *devp;
808 struct hpet __iomem *hpet;
809 static struct hpets *last = NULL;
810 unsigned long period;
811 unsigned long long temp;
814 * hpet_alloc can be called by platform dependent code.
815 * If platform dependent code has allocated the hpet that
816 * ACPI has also reported, then we catch it here.
818 if (hpet_is_known(hdp)) {
819 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
824 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
825 sizeof(struct hpet_dev));
827 hpetp = kzalloc(siz, GFP_KERNEL);
832 hpetp->hp_which = hpet_nhpet++;
833 hpetp->hp_hpet = hdp->hd_address;
834 hpetp->hp_hpet_phys = hdp->hd_phys_address;
836 hpetp->hp_ntimer = hdp->hd_nirqs;
838 for (i = 0; i < hdp->hd_nirqs; i++)
839 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
841 hpet = hpetp->hp_hpet;
843 cap = readq(&hpet->hpet_cap);
845 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
847 if (hpetp->hp_ntimer != ntimer) {
848 printk(KERN_WARNING "hpet: number irqs doesn't agree"
849 " with number of timers\n");
855 last->hp_next = hpetp;
861 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
862 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
863 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
864 temp += period >> 1; /* round */
865 do_div(temp, period);
866 hpetp->hp_tick_freq = temp; /* ticks per second */
868 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
869 hpetp->hp_which, hdp->hd_phys_address,
870 hpetp->hp_ntimer > 1 ? "s" : "");
871 for (i = 0; i < hpetp->hp_ntimer; i++)
872 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
875 printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n",
876 hpetp->hp_which, hpetp->hp_ntimer,
877 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq);
879 mcfg = readq(&hpet->hpet_config);
880 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
881 write_counter(0L, &hpet->hpet_mc);
882 mcfg |= HPET_ENABLE_CNF_MASK;
883 writeq(mcfg, &hpet->hpet_config);
886 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
887 struct hpet_timer __iomem *timer;
889 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
891 devp->hd_hpets = hpetp;
892 devp->hd_hpet = hpet;
893 devp->hd_timer = timer;
896 * If the timer was reserved by platform code,
897 * then make timer unavailable for opens.
899 if (hdp->hd_state & (1 << i)) {
900 devp->hd_flags = HPET_OPEN;
904 init_waitqueue_head(&devp->hd_waitqueue);
907 hpetp->hp_delta = hpet_calibrate(hpetp);
909 /* This clocksource driver currently only works on ia64 */
911 if (!hpet_clocksource) {
912 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
913 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
914 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
915 clocksource_hpet.shift);
916 clocksource_register(&clocksource_hpet);
917 hpetp->hp_clocksource = &clocksource_hpet;
918 hpet_clocksource = &clocksource_hpet;
925 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
927 struct hpet_data *hdp;
929 struct acpi_resource_address64 addr;
933 status = acpi_resource_to_address64(res, &addr);
935 if (ACPI_SUCCESS(status)) {
936 hdp->hd_phys_address = addr.minimum;
937 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
939 if (hpet_is_known(hdp)) {
940 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
941 __func__, hdp->hd_phys_address);
942 iounmap(hdp->hd_address);
943 return AE_ALREADY_EXISTS;
945 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
946 struct acpi_resource_fixed_memory32 *fixmem32;
948 fixmem32 = &res->data.fixed_memory32;
952 hdp->hd_phys_address = fixmem32->address;
953 hdp->hd_address = ioremap(fixmem32->address,
956 if (hpet_is_known(hdp)) {
957 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
958 __func__, hdp->hd_phys_address);
959 iounmap(hdp->hd_address);
960 return AE_ALREADY_EXISTS;
962 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
963 struct acpi_resource_extended_irq *irqp;
966 irqp = &res->data.extended_irq;
968 for (i = 0; i < irqp->interrupt_count; i++) {
969 irq = acpi_register_gsi(irqp->interrupts[i],
970 irqp->triggering, irqp->polarity);
974 hdp->hd_irq[hdp->hd_nirqs] = irq;
982 static int hpet_acpi_add(struct acpi_device *device)
985 struct hpet_data data;
987 memset(&data, 0, sizeof(data));
990 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
991 hpet_resources, &data);
993 if (ACPI_FAILURE(result))
996 if (!data.hd_address || !data.hd_nirqs) {
997 printk("%s: no address or irqs in _CRS\n", __func__);
1001 return hpet_alloc(&data);
1004 static int hpet_acpi_remove(struct acpi_device *device, int type)
1006 /* XXX need to unregister clocksource, dealloc mem, etc */
1010 static const struct acpi_device_id hpet_device_ids[] = {
1014 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1016 static struct acpi_driver hpet_acpi_driver = {
1018 .ids = hpet_device_ids,
1020 .add = hpet_acpi_add,
1021 .remove = hpet_acpi_remove,
1025 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1027 static int __init hpet_init(void)
1031 result = misc_register(&hpet_misc);
1035 sysctl_header = register_sysctl_table(dev_root);
1037 result = acpi_bus_register_driver(&hpet_acpi_driver);
1040 unregister_sysctl_table(sysctl_header);
1041 misc_deregister(&hpet_misc);
1048 static void __exit hpet_exit(void)
1050 acpi_bus_unregister_driver(&hpet_acpi_driver);
1053 unregister_sysctl_table(sysctl_header);
1054 misc_deregister(&hpet_misc);
1059 module_init(hpet_init);
1060 module_exit(hpet_exit);
1061 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1062 MODULE_LICENSE("GPL");