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drm/i965: On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank
[linux-2.6-omap-h63xx.git] / drivers / char / drm / i915_irq.c
1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
2  */
3 /*
4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5  * All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sub license, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the
16  * next paragraph) shall be included in all copies or substantial portions
17  * of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  */
28
29 #include "drmP.h"
30 #include "drm.h"
31 #include "i915_drm.h"
32 #include "i915_drv.h"
33
34 #define USER_INT_FLAG (1<<1)
35 #define VSYNC_PIPEB_FLAG (1<<5)
36 #define VSYNC_PIPEA_FLAG (1<<7)
37
38 #define MAX_NOPID ((u32)~0)
39
40 /**
41  * Emit blits for scheduled buffer swaps.
42  *
43  * This function will be called with the HW lock held.
44  */
45 static void i915_vblank_tasklet(struct drm_device *dev)
46 {
47         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
48         unsigned long irqflags;
49         struct list_head *list, *tmp, hits, *hit;
50         int nhits, nrects, slice[2], upper[2], lower[2], i;
51         unsigned counter[2] = { atomic_read(&dev->vbl_received),
52                                 atomic_read(&dev->vbl_received2) };
53         struct drm_drawable_info *drw;
54         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
55         u32 cpp = dev_priv->cpp;
56         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
57                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
58                                 XY_SRC_COPY_BLT_WRITE_RGB)
59                              : XY_SRC_COPY_BLT_CMD;
60         u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
61                           (cpp << 23) | (1 << 24);
62         RING_LOCALS;
63
64         DRM_DEBUG("\n");
65
66         INIT_LIST_HEAD(&hits);
67
68         nhits = nrects = 0;
69
70         spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
71
72         /* Find buffer swaps scheduled for this vertical blank */
73         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
74                 drm_i915_vbl_swap_t *vbl_swap =
75                         list_entry(list, drm_i915_vbl_swap_t, head);
76
77                 if ((counter[vbl_swap->pipe] - vbl_swap->sequence) > (1<<23))
78                         continue;
79
80                 list_del(list);
81                 dev_priv->swaps_pending--;
82
83                 spin_unlock(&dev_priv->swaps_lock);
84                 spin_lock(&dev->drw_lock);
85
86                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
87
88                 if (!drw) {
89                         spin_unlock(&dev->drw_lock);
90                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
91                         spin_lock(&dev_priv->swaps_lock);
92                         continue;
93                 }
94
95                 list_for_each(hit, &hits) {
96                         drm_i915_vbl_swap_t *swap_cmp =
97                                 list_entry(hit, drm_i915_vbl_swap_t, head);
98                         struct drm_drawable_info *drw_cmp =
99                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
100
101                         if (drw_cmp &&
102                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
103                                 list_add_tail(list, hit);
104                                 break;
105                         }
106                 }
107
108                 spin_unlock(&dev->drw_lock);
109
110                 /* List of hits was empty, or we reached the end of it */
111                 if (hit == &hits)
112                         list_add_tail(list, hits.prev);
113
114                 nhits++;
115
116                 spin_lock(&dev_priv->swaps_lock);
117         }
118
119         if (nhits == 0) {
120                 spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
121                 return;
122         }
123
124         spin_unlock(&dev_priv->swaps_lock);
125
126         i915_kernel_lost_context(dev);
127
128         if (IS_I965G(dev)) {
129                 BEGIN_LP_RING(4);
130
131                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
132                 OUT_RING(0);
133                 OUT_RING(((sarea_priv->width - 1) & 0xffff) | ((sarea_priv->height - 1) << 16));
134                 OUT_RING(0);
135                 ADVANCE_LP_RING();
136         } else {
137                 BEGIN_LP_RING(6);
138
139                 OUT_RING(GFX_OP_DRAWRECT_INFO);
140                 OUT_RING(0);
141                 OUT_RING(0);
142                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
143                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
144                 OUT_RING(0);
145
146                 ADVANCE_LP_RING();
147         }
148
149         sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
150
151         upper[0] = upper[1] = 0;
152         slice[0] = max(sarea_priv->pipeA_h / nhits, 1);
153         slice[1] = max(sarea_priv->pipeB_h / nhits, 1);
154         lower[0] = sarea_priv->pipeA_y + slice[0];
155         lower[1] = sarea_priv->pipeB_y + slice[0];
156
157         spin_lock(&dev->drw_lock);
158
159         /* Emit blits for buffer swaps, partitioning both outputs into as many
160          * slices as there are buffer swaps scheduled in order to avoid tearing
161          * (based on the assumption that a single buffer swap would always
162          * complete before scanout starts).
163          */
164         for (i = 0; i++ < nhits;
165              upper[0] = lower[0], lower[0] += slice[0],
166              upper[1] = lower[1], lower[1] += slice[1]) {
167                 if (i == nhits)
168                         lower[0] = lower[1] = sarea_priv->height;
169
170                 list_for_each(hit, &hits) {
171                         drm_i915_vbl_swap_t *swap_hit =
172                                 list_entry(hit, drm_i915_vbl_swap_t, head);
173                         struct drm_clip_rect *rect;
174                         int num_rects, pipe;
175                         unsigned short top, bottom;
176
177                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
178
179                         if (!drw)
180                                 continue;
181
182                         rect = drw->rects;
183                         pipe = swap_hit->pipe;
184                         top = upper[pipe];
185                         bottom = lower[pipe];
186
187                         for (num_rects = drw->num_rects; num_rects--; rect++) {
188                                 int y1 = max(rect->y1, top);
189                                 int y2 = min(rect->y2, bottom);
190
191                                 if (y1 >= y2)
192                                         continue;
193
194                                 BEGIN_LP_RING(8);
195
196                                 OUT_RING(cmd);
197                                 OUT_RING(pitchropcpp);
198                                 OUT_RING((y1 << 16) | rect->x1);
199                                 OUT_RING((y2 << 16) | rect->x2);
200                                 OUT_RING(sarea_priv->front_offset);
201                                 OUT_RING((y1 << 16) | rect->x1);
202                                 OUT_RING(pitchropcpp & 0xffff);
203                                 OUT_RING(sarea_priv->back_offset);
204
205                                 ADVANCE_LP_RING();
206                         }
207                 }
208         }
209
210         spin_unlock_irqrestore(&dev->drw_lock, irqflags);
211
212         list_for_each_safe(hit, tmp, &hits) {
213                 drm_i915_vbl_swap_t *swap_hit =
214                         list_entry(hit, drm_i915_vbl_swap_t, head);
215
216                 list_del(hit);
217
218                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
219         }
220 }
221
222 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
223 {
224         struct drm_device *dev = (struct drm_device *) arg;
225         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
226         u16 temp;
227         u32 pipea_stats, pipeb_stats;
228
229         pipea_stats = I915_READ(I915REG_PIPEASTAT);
230         pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
231
232         temp = I915_READ16(I915REG_INT_IDENTITY_R);
233
234         temp &= (USER_INT_FLAG | VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG);
235
236         DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp);
237
238         if (temp == 0)
239                 return IRQ_NONE;
240
241         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
242         (void) I915_READ16(I915REG_INT_IDENTITY_R);
243         DRM_READMEMORYBARRIER();
244
245         dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
246
247         if (temp & USER_INT_FLAG)
248                 DRM_WAKEUP(&dev_priv->irq_queue);
249
250         if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
251                 int vblank_pipe = dev_priv->vblank_pipe;
252
253                 if ((vblank_pipe &
254                      (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B))
255                     == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) {
256                         if (temp & VSYNC_PIPEA_FLAG)
257                                 atomic_inc(&dev->vbl_received);
258                         if (temp & VSYNC_PIPEB_FLAG)
259                                 atomic_inc(&dev->vbl_received2);
260                 } else if (((temp & VSYNC_PIPEA_FLAG) &&
261                             (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) ||
262                            ((temp & VSYNC_PIPEB_FLAG) &&
263                             (vblank_pipe & DRM_I915_VBLANK_PIPE_B)))
264                         atomic_inc(&dev->vbl_received);
265
266                 DRM_WAKEUP(&dev->vbl_queue);
267                 drm_vbl_send_signals(dev);
268
269                 if (dev_priv->swaps_pending > 0)
270                         drm_locked_tasklet(dev, i915_vblank_tasklet);
271                 I915_WRITE(I915REG_PIPEASTAT,
272                         pipea_stats|I915_VBLANK_INTERRUPT_ENABLE|
273                         I915_VBLANK_CLEAR);
274                 I915_WRITE(I915REG_PIPEBSTAT,
275                         pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE|
276                         I915_VBLANK_CLEAR);
277         }
278
279         return IRQ_HANDLED;
280 }
281
282 static int i915_emit_irq(struct drm_device * dev)
283 {
284         drm_i915_private_t *dev_priv = dev->dev_private;
285         RING_LOCALS;
286
287         i915_kernel_lost_context(dev);
288
289         DRM_DEBUG("\n");
290
291         dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter;
292
293         if (dev_priv->counter > 0x7FFFFFFFUL)
294                 dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
295
296         BEGIN_LP_RING(6);
297         OUT_RING(CMD_STORE_DWORD_IDX);
298         OUT_RING(20);
299         OUT_RING(dev_priv->counter);
300         OUT_RING(0);
301         OUT_RING(0);
302         OUT_RING(GFX_OP_USER_INTERRUPT);
303         ADVANCE_LP_RING();
304
305         return dev_priv->counter;
306 }
307
308 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
309 {
310         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
311         int ret = 0;
312
313         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
314                   READ_BREADCRUMB(dev_priv));
315
316         if (READ_BREADCRUMB(dev_priv) >= irq_nr)
317                 return 0;
318
319         dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
320
321         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
322                     READ_BREADCRUMB(dev_priv) >= irq_nr);
323
324         if (ret == -EBUSY) {
325                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
326                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
327         }
328
329         dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
330         return ret;
331 }
332
333 static int i915_driver_vblank_do_wait(struct drm_device *dev, unsigned int *sequence,
334                                       atomic_t *counter)
335 {
336         drm_i915_private_t *dev_priv = dev->dev_private;
337         unsigned int cur_vblank;
338         int ret = 0;
339
340         if (!dev_priv) {
341                 DRM_ERROR("called with no initialization\n");
342                 return -EINVAL;
343         }
344
345         DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
346                     (((cur_vblank = atomic_read(counter))
347                         - *sequence) <= (1<<23)));
348
349         *sequence = cur_vblank;
350
351         return ret;
352 }
353
354
355 int i915_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence)
356 {
357         return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received);
358 }
359
360 int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence)
361 {
362         return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received2);
363 }
364
365 /* Needs the lock as it touches the ring.
366  */
367 int i915_irq_emit(struct drm_device *dev, void *data,
368                          struct drm_file *file_priv)
369 {
370         drm_i915_private_t *dev_priv = dev->dev_private;
371         drm_i915_irq_emit_t *emit = data;
372         int result;
373
374         LOCK_TEST_WITH_RETURN(dev, file_priv);
375
376         if (!dev_priv) {
377                 DRM_ERROR("called with no initialization\n");
378                 return -EINVAL;
379         }
380
381         result = i915_emit_irq(dev);
382
383         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
384                 DRM_ERROR("copy_to_user\n");
385                 return -EFAULT;
386         }
387
388         return 0;
389 }
390
391 /* Doesn't need the hardware lock.
392  */
393 int i915_irq_wait(struct drm_device *dev, void *data,
394                          struct drm_file *file_priv)
395 {
396         drm_i915_private_t *dev_priv = dev->dev_private;
397         drm_i915_irq_wait_t *irqwait = data;
398
399         if (!dev_priv) {
400                 DRM_ERROR("called with no initialization\n");
401                 return -EINVAL;
402         }
403
404         return i915_wait_irq(dev, irqwait->irq_seq);
405 }
406
407 static void i915_enable_interrupt (struct drm_device *dev)
408 {
409         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
410         u16 flag;
411
412         flag = 0;
413         if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)
414                 flag |= VSYNC_PIPEA_FLAG;
415         if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
416                 flag |= VSYNC_PIPEB_FLAG;
417
418         I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag);
419 }
420
421 /* Set the vblank monitor pipe
422  */
423 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
424                          struct drm_file *file_priv)
425 {
426         drm_i915_private_t *dev_priv = dev->dev_private;
427         drm_i915_vblank_pipe_t *pipe = data;
428
429         if (!dev_priv) {
430                 DRM_ERROR("called with no initialization\n");
431                 return -EINVAL;
432         }
433
434         if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
435                 DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
436                 return -EINVAL;
437         }
438
439         dev_priv->vblank_pipe = pipe->pipe;
440
441         i915_enable_interrupt (dev);
442
443         return 0;
444 }
445
446 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
447                          struct drm_file *file_priv)
448 {
449         drm_i915_private_t *dev_priv = dev->dev_private;
450         drm_i915_vblank_pipe_t *pipe = data;
451         u16 flag;
452
453         if (!dev_priv) {
454                 DRM_ERROR("called with no initialization\n");
455                 return -EINVAL;
456         }
457
458         flag = I915_READ(I915REG_INT_ENABLE_R);
459         pipe->pipe = 0;
460         if (flag & VSYNC_PIPEA_FLAG)
461                 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
462         if (flag & VSYNC_PIPEB_FLAG)
463                 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
464
465         return 0;
466 }
467
468 /**
469  * Schedule buffer swap at given vertical blank.
470  */
471 int i915_vblank_swap(struct drm_device *dev, void *data,
472                      struct drm_file *file_priv)
473 {
474         drm_i915_private_t *dev_priv = dev->dev_private;
475         drm_i915_vblank_swap_t *swap = data;
476         drm_i915_vbl_swap_t *vbl_swap;
477         unsigned int pipe, seqtype, curseq;
478         unsigned long irqflags;
479         struct list_head *list;
480
481         if (!dev_priv) {
482                 DRM_ERROR("%s called with no initialization\n", __func__);
483                 return -EINVAL;
484         }
485
486         if (dev_priv->sarea_priv->rotation) {
487                 DRM_DEBUG("Rotation not supported\n");
488                 return -EINVAL;
489         }
490
491         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
492                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)) {
493                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
494                 return -EINVAL;
495         }
496
497         pipe = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
498
499         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
500
501         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
502                 DRM_ERROR("Invalid pipe %d\n", pipe);
503                 return -EINVAL;
504         }
505
506         spin_lock_irqsave(&dev->drw_lock, irqflags);
507
508         if (!drm_get_drawable_info(dev, swap->drawable)) {
509                 spin_unlock_irqrestore(&dev->drw_lock, irqflags);
510                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
511                 return -EINVAL;
512         }
513
514         spin_unlock_irqrestore(&dev->drw_lock, irqflags);
515
516         curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received);
517
518         if (seqtype == _DRM_VBLANK_RELATIVE)
519                 swap->sequence += curseq;
520
521         if ((curseq - swap->sequence) <= (1<<23)) {
522                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
523                         swap->sequence = curseq + 1;
524                 } else {
525                         DRM_DEBUG("Missed target sequence\n");
526                         return -EINVAL;
527                 }
528         }
529
530         spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
531
532         list_for_each(list, &dev_priv->vbl_swaps.head) {
533                 vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
534
535                 if (vbl_swap->drw_id == swap->drawable &&
536                     vbl_swap->pipe == pipe &&
537                     vbl_swap->sequence == swap->sequence) {
538                         spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
539                         DRM_DEBUG("Already scheduled\n");
540                         return 0;
541                 }
542         }
543
544         spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
545
546         if (dev_priv->swaps_pending >= 100) {
547                 DRM_DEBUG("Too many swaps queued\n");
548                 return -EBUSY;
549         }
550
551         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
552
553         if (!vbl_swap) {
554                 DRM_ERROR("Failed to allocate memory to queue swap\n");
555                 return -ENOMEM;
556         }
557
558         DRM_DEBUG("\n");
559
560         vbl_swap->drw_id = swap->drawable;
561         vbl_swap->pipe = pipe;
562         vbl_swap->sequence = swap->sequence;
563
564         spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
565
566         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
567         dev_priv->swaps_pending++;
568
569         spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
570
571         return 0;
572 }
573
574 /* drm_dma.h hooks
575 */
576 void i915_driver_irq_preinstall(struct drm_device * dev)
577 {
578         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
579
580         I915_WRITE16(I915REG_HWSTAM, 0xfffe);
581         I915_WRITE16(I915REG_INT_MASK_R, 0x0);
582         I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
583 }
584
585 void i915_driver_irq_postinstall(struct drm_device * dev)
586 {
587         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
588
589         spin_lock_init(&dev_priv->swaps_lock);
590         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
591         dev_priv->swaps_pending = 0;
592
593         if (!dev_priv->vblank_pipe)
594                 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
595         i915_enable_interrupt(dev);
596         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
597 }
598
599 void i915_driver_irq_uninstall(struct drm_device * dev)
600 {
601         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
602         u16 temp;
603
604         if (!dev_priv)
605                 return;
606
607         I915_WRITE16(I915REG_HWSTAM, 0xffff);
608         I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
609         I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
610
611         temp = I915_READ16(I915REG_INT_IDENTITY_R);
612         I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
613 }