drivers/char/drm/i830_dma.c

   1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  28  *          Jeff Hartmann <jhartmann@valinux.com>
  29  *          Keith Whitwell <keith@tungstengraphics.com>
  30  *          Abraham vd Merwe <abraham@2d3d.co.za>
  31  *
  32  */
  33
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "i830_drm.h"
  37 #include "i830_drv.h"
  38 #include <linux/interrupt.h>    /* For task queue support */
  39 #include <linux/pagemap.h>      /* For FASTCALL on unlock_page() */
  40 #include <linux/delay.h>
  41 #include <asm/uaccess.h>
  42
  43 #define I830_BUF_FREE           2
  44 #define I830_BUF_CLIENT         1
  45 #define I830_BUF_HARDWARE       0
  46
  47 #define I830_BUF_UNMAPPED 0
  48 #define I830_BUF_MAPPED   1
  49
  50 static struct drm_buf *i830_freelist_get(struct drm_device * dev)
  51 {
  52         struct drm_device_dma *dma = dev->dma;
  53         int i;
  54         int used;
  55
  56         /* Linear search might not be the best solution */
  57
  58         for (i = 0; i < dma->buf_count; i++) {
  59                 struct drm_buf *buf = dma->buflist[i];
  60                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  61                 /* In use is already a pointer */
  62                 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
  63                                I830_BUF_CLIENT);
  64                 if (used == I830_BUF_FREE) {
  65                         return buf;
  66                 }
  67         }
  68         return NULL;
  69 }
  70
  71 /* This should only be called if the buffer is not sent to the hardware
  72  * yet, the hardware updates in use for us once its on the ring buffer.
  73  */
  74
  75 static int i830_freelist_put(struct drm_device * dev, struct drm_buf * buf)
  76 {
  77         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  78         int used;
  79
  80         /* In use is already a pointer */
  81         used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
  82         if (used != I830_BUF_CLIENT) {
  83                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
  84                 return -EINVAL;
  85         }
  86
  87         return 0;
  88 }
  89
  90 static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
  91 {
  92         struct drm_file *priv = filp->private_data;
  93         struct drm_device *dev;
  94         drm_i830_private_t *dev_priv;
  95         struct drm_buf *buf;
  96         drm_i830_buf_priv_t *buf_priv;
  97
  98         lock_kernel();
  99         dev = priv->head->dev;
 100         dev_priv = dev->dev_private;
 101         buf = dev_priv->mmap_buffer;
 102         buf_priv = buf->dev_private;
 103
 104         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
 105         vma->vm_file = filp;
 106
 107         buf_priv->currently_mapped = I830_BUF_MAPPED;
 108         unlock_kernel();
 109
 110         if (io_remap_pfn_range(vma, vma->vm_start,
 111                                vma->vm_pgoff,
 112                                vma->vm_end - vma->vm_start, vma->vm_page_prot))
 113                 return -EAGAIN;
 114         return 0;
 115 }
 116
 117 static const struct file_operations i830_buffer_fops = {
 118         .open = drm_open,
 119         .release = drm_release,
 120         .ioctl = drm_ioctl,
 121         .mmap = i830_mmap_buffers,
 122         .fasync = drm_fasync,
 123 };
 124
 125 static int i830_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
 126 {
 127         struct drm_device *dev = file_priv->head->dev;
 128         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 129         drm_i830_private_t *dev_priv = dev->dev_private;
 130         const struct file_operations *old_fops;
 131         unsigned long virtual;
 132         int retcode = 0;
 133
 134         if (buf_priv->currently_mapped == I830_BUF_MAPPED)
 135                 return -EINVAL;
 136
 137         down_write(&current->mm->mmap_sem);
 138         old_fops = file_priv->filp->f_op;
 139         file_priv->filp->f_op = &i830_buffer_fops;
 140         dev_priv->mmap_buffer = buf;
 141         virtual = do_mmap(file_priv->filp, 0, buf->total, PROT_READ | PROT_WRITE,
 142                           MAP_SHARED, buf->bus_address);
 143         dev_priv->mmap_buffer = NULL;
 144         file_priv->filp->f_op = old_fops;
 145         if (IS_ERR((void *)virtual)) {  /* ugh */
 146                 /* Real error */
 147                 DRM_ERROR("mmap error\n");
 148                 retcode = PTR_ERR((void *)virtual);
 149                 buf_priv->virtual = NULL;
 150         } else {
 151                 buf_priv->virtual = (void __user *)virtual;
 152         }
 153         up_write(&current->mm->mmap_sem);
 154
 155         return retcode;
 156 }
 157
 158 static int i830_unmap_buffer(struct drm_buf * buf)
 159 {
 160         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 161         int retcode = 0;
 162
 163         if (buf_priv->currently_mapped != I830_BUF_MAPPED)
 164                 return -EINVAL;
 165
 166         down_write(&current->mm->mmap_sem);
 167         retcode = do_munmap(current->mm,
 168                             (unsigned long)buf_priv->virtual,
 169                             (size_t) buf->total);
 170         up_write(&current->mm->mmap_sem);
 171
 172         buf_priv->currently_mapped = I830_BUF_UNMAPPED;
 173         buf_priv->virtual = NULL;
 174
 175         return retcode;
 176 }
 177
 178 static int i830_dma_get_buffer(struct drm_device * dev, drm_i830_dma_t * d,
 179                                struct drm_file *file_priv)
 180 {
 181         struct drm_buf *buf;
 182         drm_i830_buf_priv_t *buf_priv;
 183         int retcode = 0;
 184
 185         buf = i830_freelist_get(dev);
 186         if (!buf) {
 187                 retcode = -ENOMEM;
 188                 DRM_DEBUG("retcode=%d\n", retcode);
 189                 return retcode;
 190         }
 191
 192         retcode = i830_map_buffer(buf, file_priv);
 193         if (retcode) {
 194                 i830_freelist_put(dev, buf);
 195                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 196                 return retcode;
 197         }
 198         buf->file_priv = file_priv;
 199         buf_priv = buf->dev_private;
 200         d->granted = 1;
 201         d->request_idx = buf->idx;
 202         d->request_size = buf->total;
 203         d->virtual = buf_priv->virtual;
 204
 205         return retcode;
 206 }
 207
 208 static int i830_dma_cleanup(struct drm_device * dev)
 209 {
 210         struct drm_device_dma *dma = dev->dma;
 211
 212         /* Make sure interrupts are disabled here because the uninstall ioctl
 213          * may not have been called from userspace and after dev_private
 214          * is freed, it's too late.
 215          */
 216         if (dev->irq_enabled)
 217                 drm_irq_uninstall(dev);
 218
 219         if (dev->dev_private) {
 220                 int i;
 221                 drm_i830_private_t *dev_priv =
 222                     (drm_i830_private_t *) dev->dev_private;
 223
 224                 if (dev_priv->ring.virtual_start) {
 225                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
 226                 }
 227                 if (dev_priv->hw_status_page) {
 228                         pci_free_consistent(dev->pdev, PAGE_SIZE,
 229                                             dev_priv->hw_status_page,
 230                                             dev_priv->dma_status_page);
 231                         /* Need to rewrite hardware status page */
 232                         I830_WRITE(0x02080, 0x1ffff000);
 233                 }
 234
 235                 drm_free(dev->dev_private, sizeof(drm_i830_private_t),
 236                          DRM_MEM_DRIVER);
 237                 dev->dev_private = NULL;
 238
 239                 for (i = 0; i < dma->buf_count; i++) {
 240                         struct drm_buf *buf = dma->buflist[i];
 241                         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 242                         if (buf_priv->kernel_virtual && buf->total)
 243                                 drm_core_ioremapfree(&buf_priv->map, dev);
 244                 }
 245         }
 246         return 0;
 247 }
 248
 249 int i830_wait_ring(struct drm_device * dev, int n, const char *caller)
 250 {
 251         drm_i830_private_t *dev_priv = dev->dev_private;
 252         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 253         int iters = 0;
 254         unsigned long end;
 255         unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 256
 257         end = jiffies + (HZ * 3);
 258         while (ring->space < n) {
 259                 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 260                 ring->space = ring->head - (ring->tail + 8);
 261                 if (ring->space < 0)
 262                         ring->space += ring->Size;
 263
 264                 if (ring->head != last_head) {
 265                         end = jiffies + (HZ * 3);
 266                         last_head = ring->head;
 267                 }
 268
 269                 iters++;
 270                 if (time_before(end, jiffies)) {
 271                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
 272                         DRM_ERROR("lockup\n");
 273                         goto out_wait_ring;
 274                 }
 275                 udelay(1);
 276                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
 277         }
 278
 279       out_wait_ring:
 280         return iters;
 281 }
 282
 283 static void i830_kernel_lost_context(struct drm_device * dev)
 284 {
 285         drm_i830_private_t *dev_priv = dev->dev_private;
 286         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 287
 288         ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 289         ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
 290         ring->space = ring->head - (ring->tail + 8);
 291         if (ring->space < 0)
 292                 ring->space += ring->Size;
 293
 294         if (ring->head == ring->tail)
 295                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
 296 }
 297
 298 static int i830_freelist_init(struct drm_device * dev, drm_i830_private_t * dev_priv)
 299 {
 300         struct drm_device_dma *dma = dev->dma;
 301         int my_idx = 36;
 302         u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
 303         int i;
 304
 305         if (dma->buf_count > 1019) {
 306                 /* Not enough space in the status page for the freelist */
 307                 return -EINVAL;
 308         }
 309
 310         for (i = 0; i < dma->buf_count; i++) {
 311                 struct drm_buf *buf = dma->buflist[i];
 312                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 313
 314                 buf_priv->in_use = hw_status++;
 315                 buf_priv->my_use_idx = my_idx;
 316                 my_idx += 4;
 317
 318                 *buf_priv->in_use = I830_BUF_FREE;
 319
 320                 buf_priv->map.offset = buf->bus_address;
 321                 buf_priv->map.size = buf->total;
 322                 buf_priv->map.type = _DRM_AGP;
 323                 buf_priv->map.flags = 0;
 324                 buf_priv->map.mtrr = 0;
 325
 326                 drm_core_ioremap(&buf_priv->map, dev);
 327                 buf_priv->kernel_virtual = buf_priv->map.handle;
 328         }
 329         return 0;
 330 }
 331
 332 static int i830_dma_initialize(struct drm_device * dev,
 333                                drm_i830_private_t * dev_priv,
 334                                drm_i830_init_t * init)
 335 {
 336         struct drm_map_list *r_list;
 337
 338         memset(dev_priv, 0, sizeof(drm_i830_private_t));
 339
 340         list_for_each_entry(r_list, &dev->maplist, head) {
 341                 if (r_list->map &&
 342                     r_list->map->type == _DRM_SHM &&
 343                     r_list->map->flags & _DRM_CONTAINS_LOCK) {
 344                         dev_priv->sarea_map = r_list->map;
 345                         break;
 346                 }
 347         }
 348
 349         if (!dev_priv->sarea_map) {
 350                 dev->dev_private = (void *)dev_priv;
 351                 i830_dma_cleanup(dev);
 352                 DRM_ERROR("can not find sarea!\n");
 353                 return -EINVAL;
 354         }
 355         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 356         if (!dev_priv->mmio_map) {
 357                 dev->dev_private = (void *)dev_priv;
 358                 i830_dma_cleanup(dev);
 359                 DRM_ERROR("can not find mmio map!\n");
 360                 return -EINVAL;
 361         }
 362         dev->agp_buffer_token = init->buffers_offset;
 363         dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
 364         if (!dev->agp_buffer_map) {
 365                 dev->dev_private = (void *)dev_priv;
 366                 i830_dma_cleanup(dev);
 367                 DRM_ERROR("can not find dma buffer map!\n");
 368                 return -EINVAL;
 369         }
 370
 371         dev_priv->sarea_priv = (drm_i830_sarea_t *)
 372             ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
 373
 374         dev_priv->ring.Start = init->ring_start;
 375         dev_priv->ring.End = init->ring_end;
 376         dev_priv->ring.Size = init->ring_size;
 377
 378         dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
 379         dev_priv->ring.map.size = init->ring_size;
 380         dev_priv->ring.map.type = _DRM_AGP;
 381         dev_priv->ring.map.flags = 0;
 382         dev_priv->ring.map.mtrr = 0;
 383
 384         drm_core_ioremap(&dev_priv->ring.map, dev);
 385
 386         if (dev_priv->ring.map.handle == NULL) {
 387                 dev->dev_private = (void *)dev_priv;
 388                 i830_dma_cleanup(dev);
 389                 DRM_ERROR("can not ioremap virtual address for"
 390                           " ring buffer\n");
 391                 return -ENOMEM;
 392         }
 393
 394         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 395
 396         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 397
 398         dev_priv->w = init->w;
 399         dev_priv->h = init->h;
 400         dev_priv->pitch = init->pitch;
 401         dev_priv->back_offset = init->back_offset;
 402         dev_priv->depth_offset = init->depth_offset;
 403         dev_priv->front_offset = init->front_offset;
 404
 405         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
 406         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
 407         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
 408
 409         DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1);
 410         DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
 411         DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1);
 412         DRM_DEBUG("pitch_bits %x\n", init->pitch_bits);
 413
 414         dev_priv->cpp = init->cpp;
 415         /* We are using separate values as placeholders for mechanisms for
 416          * private backbuffer/depthbuffer usage.
 417          */
 418
 419         dev_priv->back_pitch = init->back_pitch;
 420         dev_priv->depth_pitch = init->depth_pitch;
 421         dev_priv->do_boxes = 0;
 422         dev_priv->use_mi_batchbuffer_start = 0;
 423
 424         /* Program Hardware Status Page */
 425         dev_priv->hw_status_page =
 426             pci_alloc_consistent(dev->pdev, PAGE_SIZE,
 427                                  &dev_priv->dma_status_page);
 428         if (!dev_priv->hw_status_page) {
 429                 dev->dev_private = (void *)dev_priv;
 430                 i830_dma_cleanup(dev);
 431                 DRM_ERROR("Can not allocate hardware status page\n");
 432                 return -ENOMEM;
 433         }
 434         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 435         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 436
 437         I830_WRITE(0x02080, dev_priv->dma_status_page);
 438         DRM_DEBUG("Enabled hardware status page\n");
 439
 440         /* Now we need to init our freelist */
 441         if (i830_freelist_init(dev, dev_priv) != 0) {
 442                 dev->dev_private = (void *)dev_priv;
 443                 i830_dma_cleanup(dev);
 444                 DRM_ERROR("Not enough space in the status page for"
 445                           " the freelist\n");
 446                 return -ENOMEM;
 447         }
 448         dev->dev_private = (void *)dev_priv;
 449
 450         return 0;
 451 }
 452
 453 static int i830_dma_init(struct inode *inode, struct drm_file *file_priv,
 454                          unsigned int cmd, unsigned long arg)
 455 {
 456         struct drm_device *dev = file_priv->head->dev;
 457         drm_i830_private_t *dev_priv;
 458         drm_i830_init_t init;
 459         int retcode = 0;
 460
 461         if (copy_from_user(&init, (void *__user)arg, sizeof(init)))
 462                 return -EFAULT;
 463
 464         switch (init.func) {
 465         case I830_INIT_DMA:
 466                 dev_priv = drm_alloc(sizeof(drm_i830_private_t),
 467                                      DRM_MEM_DRIVER);
 468                 if (dev_priv == NULL)
 469                         return -ENOMEM;
 470                 retcode = i830_dma_initialize(dev, dev_priv, &init);
 471                 break;
 472         case I830_CLEANUP_DMA:
 473                 retcode = i830_dma_cleanup(dev);
 474                 break;
 475         default:
 476                 retcode = -EINVAL;
 477                 break;
 478         }
 479
 480         return retcode;
 481 }
 482
 483 #define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
 484 #define ST1_ENABLE               (1<<16)
 485 #define ST1_MASK                 (0xffff)
 486
 487 /* Most efficient way to verify state for the i830 is as it is
 488  * emitted.  Non-conformant state is silently dropped.
 489  */
 490 static void i830EmitContextVerified(struct drm_device * dev, unsigned int *code)
 491 {
 492         drm_i830_private_t *dev_priv = dev->dev_private;
 493         int i, j = 0;
 494         unsigned int tmp;
 495         RING_LOCALS;
 496
 497         BEGIN_LP_RING(I830_CTX_SETUP_SIZE + 4);
 498
 499         for (i = 0; i < I830_CTXREG_BLENDCOLR0; i++) {
 500                 tmp = code[i];
 501                 if ((tmp & (7 << 29)) == CMD_3D &&
 502                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
 503                         OUT_RING(tmp);
 504                         j++;
 505                 } else {
 506                         DRM_ERROR("Skipping %d\n", i);
 507                 }
 508         }
 509
 510         OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD);
 511         OUT_RING(code[I830_CTXREG_BLENDCOLR]);
 512         j += 2;
 513
 514         for (i = I830_CTXREG_VF; i < I830_CTXREG_MCSB0; i++) {
 515                 tmp = code[i];
 516                 if ((tmp & (7 << 29)) == CMD_3D &&
 517                     (tmp & (0x1f << 24)) < (0x1d << 24)) {
 518                         OUT_RING(tmp);
 519                         j++;
 520                 } else {
 521                         DRM_ERROR("Skipping %d\n", i);
 522                 }
 523         }
 524
 525         OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD);
 526         OUT_RING(code[I830_CTXREG_MCSB1]);
 527         j += 2;
 528
 529         if (j & 1)
 530                 OUT_RING(0);
 531
 532         ADVANCE_LP_RING();
 533 }
 534
 535 static void i830EmitTexVerified(struct drm_device * dev, unsigned int *code)
 536 {
 537         drm_i830_private_t *dev_priv = dev->dev_private;
 538         int i, j = 0;
 539         unsigned int tmp;
 540         RING_LOCALS;
 541
 542         if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
 543             (code[I830_TEXREG_MI0] & ~(0xf * LOAD_TEXTURE_MAP0)) ==
 544             (STATE3D_LOAD_STATE_IMMEDIATE_2 | 4)) {
 545
 546                 BEGIN_LP_RING(I830_TEX_SETUP_SIZE);
 547
 548                 OUT_RING(code[I830_TEXREG_MI0]);        /* TM0LI */
 549                 OUT_RING(code[I830_TEXREG_MI1]);        /* TM0S0 */
 550                 OUT_RING(code[I830_TEXREG_MI2]);        /* TM0S1 */
 551                 OUT_RING(code[I830_TEXREG_MI3]);        /* TM0S2 */
 552                 OUT_RING(code[I830_TEXREG_MI4]);        /* TM0S3 */
 553                 OUT_RING(code[I830_TEXREG_MI5]);        /* TM0S4 */
 554
 555                 for (i = 6; i < I830_TEX_SETUP_SIZE; i++) {
 556                         tmp = code[i];
 557                         OUT_RING(tmp);
 558                         j++;
 559                 }
 560
 561                 if (j & 1)
 562                         OUT_RING(0);
 563
 564                 ADVANCE_LP_RING();
 565         } else
 566                 printk("rejected packet %x\n", code[0]);
 567 }
 568
 569 static void i830EmitTexBlendVerified(struct drm_device * dev,
 570                                      unsigned int *code, unsigned int num)
 571 {
 572         drm_i830_private_t *dev_priv = dev->dev_private;
 573         int i, j = 0;
 574         unsigned int tmp;
 575         RING_LOCALS;
 576
 577         if (!num)
 578                 return;
 579
 580         BEGIN_LP_RING(num + 1);
 581
 582         for (i = 0; i < num; i++) {
 583                 tmp = code[i];
 584                 OUT_RING(tmp);
 585                 j++;
 586         }
 587
 588         if (j & 1)
 589                 OUT_RING(0);
 590
 591         ADVANCE_LP_RING();
 592 }
 593
 594 static void i830EmitTexPalette(struct drm_device * dev,
 595                                unsigned int *palette, int number, int is_shared)
 596 {
 597         drm_i830_private_t *dev_priv = dev->dev_private;
 598         int i;
 599         RING_LOCALS;
 600
 601         return;
 602
 603         BEGIN_LP_RING(258);
 604
 605         if (is_shared == 1) {
 606                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
 607                          MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH);
 608         } else {
 609                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
 610         }
 611         for (i = 0; i < 256; i++) {
 612                 OUT_RING(palette[i]);
 613         }
 614         OUT_RING(0);
 615         /* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop!
 616          */
 617 }
 618
 619 /* Need to do some additional checking when setting the dest buffer.
 620  */
 621 static void i830EmitDestVerified(struct drm_device * dev, unsigned int *code)
 622 {
 623         drm_i830_private_t *dev_priv = dev->dev_private;
 624         unsigned int tmp;
 625         RING_LOCALS;
 626
 627         BEGIN_LP_RING(I830_DEST_SETUP_SIZE + 10);
 628
 629         tmp = code[I830_DESTREG_CBUFADDR];
 630         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
 631                 if (((int)outring) & 8) {
 632                         OUT_RING(0);
 633                         OUT_RING(0);
 634                 }
 635
 636                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
 637                 OUT_RING(BUF_3D_ID_COLOR_BACK |
 638                          BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
 639                          BUF_3D_USE_FENCE);
 640                 OUT_RING(tmp);
 641                 OUT_RING(0);
 642
 643                 OUT_RING(CMD_OP_DESTBUFFER_INFO);
 644                 OUT_RING(BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
 645                          BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
 646                 OUT_RING(dev_priv->zi1);
 647                 OUT_RING(0);
 648         } else {
 649                 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
 650                           tmp, dev_priv->front_di1, dev_priv->back_di1);
 651         }
 652
 653         /* invarient:
 654          */
 655
 656         OUT_RING(GFX_OP_DESTBUFFER_VARS);
 657         OUT_RING(code[I830_DESTREG_DV1]);
 658
 659         OUT_RING(GFX_OP_DRAWRECT_INFO);
 660         OUT_RING(code[I830_DESTREG_DR1]);
 661         OUT_RING(code[I830_DESTREG_DR2]);
 662         OUT_RING(code[I830_DESTREG_DR3]);
 663         OUT_RING(code[I830_DESTREG_DR4]);
 664
 665         /* Need to verify this */
 666         tmp = code[I830_DESTREG_SENABLE];
 667         if ((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
 668                 OUT_RING(tmp);
 669         } else {
 670                 DRM_ERROR("bad scissor enable\n");
 671                 OUT_RING(0);
 672         }
 673
 674         OUT_RING(GFX_OP_SCISSOR_RECT);
 675         OUT_RING(code[I830_DESTREG_SR1]);
 676         OUT_RING(code[I830_DESTREG_SR2]);
 677         OUT_RING(0);
 678
 679         ADVANCE_LP_RING();
 680 }
 681
 682 static void i830EmitStippleVerified(struct drm_device * dev, unsigned int *code)
 683 {
 684         drm_i830_private_t *dev_priv = dev->dev_private;
 685         RING_LOCALS;
 686
 687         BEGIN_LP_RING(2);
 688         OUT_RING(GFX_OP_STIPPLE);
 689         OUT_RING(code[1]);
 690         ADVANCE_LP_RING();
 691 }
 692
 693 static void i830EmitState(struct drm_device * dev)
 694 {
 695         drm_i830_private_t *dev_priv = dev->dev_private;
 696         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 697         unsigned int dirty = sarea_priv->dirty;
 698
 699         DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
 700
 701         if (dirty & I830_UPLOAD_BUFFERS) {
 702                 i830EmitDestVerified(dev, sarea_priv->BufferState);
 703                 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
 704         }
 705
 706         if (dirty & I830_UPLOAD_CTX) {
 707                 i830EmitContextVerified(dev, sarea_priv->ContextState);
 708                 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
 709         }
 710
 711         if (dirty & I830_UPLOAD_TEX0) {
 712                 i830EmitTexVerified(dev, sarea_priv->TexState[0]);
 713                 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
 714         }
 715
 716         if (dirty & I830_UPLOAD_TEX1) {
 717                 i830EmitTexVerified(dev, sarea_priv->TexState[1]);
 718                 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
 719         }
 720
 721         if (dirty & I830_UPLOAD_TEXBLEND0) {
 722                 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[0],
 723                                          sarea_priv->TexBlendStateWordsUsed[0]);
 724                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
 725         }
 726
 727         if (dirty & I830_UPLOAD_TEXBLEND1) {
 728                 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[1],
 729                                          sarea_priv->TexBlendStateWordsUsed[1]);
 730                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
 731         }
 732
 733         if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
 734                 i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
 735         } else {
 736                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
 737                         i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
 738                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
 739                 }
 740                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
 741                         i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
 742                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
 743                 }
 744
 745                 /* 1.3:
 746                  */
 747 #if 0
 748                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
 749                         i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
 750                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 751                 }
 752                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
 753                         i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
 754                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 755                 }
 756 #endif
 757         }
 758
 759         /* 1.3:
 760          */
 761         if (dirty & I830_UPLOAD_STIPPLE) {
 762                 i830EmitStippleVerified(dev, sarea_priv->StippleState);
 763                 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
 764         }
 765
 766         if (dirty & I830_UPLOAD_TEX2) {
 767                 i830EmitTexVerified(dev, sarea_priv->TexState2);
 768                 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
 769         }
 770
 771         if (dirty & I830_UPLOAD_TEX3) {
 772                 i830EmitTexVerified(dev, sarea_priv->TexState3);
 773                 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
 774         }
 775
 776         if (dirty & I830_UPLOAD_TEXBLEND2) {
 777                 i830EmitTexBlendVerified(dev,
 778                                          sarea_priv->TexBlendState2,
 779                                          sarea_priv->TexBlendStateWordsUsed2);
 780
 781                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
 782         }
 783
 784         if (dirty & I830_UPLOAD_TEXBLEND3) {
 785                 i830EmitTexBlendVerified(dev,
 786                                          sarea_priv->TexBlendState3,
 787                                          sarea_priv->TexBlendStateWordsUsed3);
 788                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
 789         }
 790 }
 791
 792 /* ================================================================
 793  * Performance monitoring functions
 794  */
 795
 796 static void i830_fill_box(struct drm_device * dev,
 797                           int x, int y, int w, int h, int r, int g, int b)
 798 {
 799         drm_i830_private_t *dev_priv = dev->dev_private;
 800         u32 color;
 801         unsigned int BR13, CMD;
 802         RING_LOCALS;
 803
 804         BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1 << 24);
 805         CMD = XY_COLOR_BLT_CMD;
 806         x += dev_priv->sarea_priv->boxes[0].x1;
 807         y += dev_priv->sarea_priv->boxes[0].y1;
 808
 809         if (dev_priv->cpp == 4) {
 810                 BR13 |= (1 << 25);
 811                 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
 812                 color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
 813         } else {
 814                 color = (((r & 0xf8) << 8) |
 815                          ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
 816         }
 817
 818         BEGIN_LP_RING(6);
 819         OUT_RING(CMD);
 820         OUT_RING(BR13);
 821         OUT_RING((y << 16) | x);
 822         OUT_RING(((y + h) << 16) | (x + w));
 823
 824         if (dev_priv->current_page == 1) {
 825                 OUT_RING(dev_priv->front_offset);
 826         } else {
 827                 OUT_RING(dev_priv->back_offset);
 828         }
 829
 830         OUT_RING(color);
 831         ADVANCE_LP_RING();
 832 }
 833
 834 static void i830_cp_performance_boxes(struct drm_device * dev)
 835 {
 836         drm_i830_private_t *dev_priv = dev->dev_private;
 837
 838         /* Purple box for page flipping
 839          */
 840         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP)
 841                 i830_fill_box(dev, 4, 4, 8, 8, 255, 0, 255);
 842
 843         /* Red box if we have to wait for idle at any point
 844          */
 845         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT)
 846                 i830_fill_box(dev, 16, 4, 8, 8, 255, 0, 0);
 847
 848         /* Blue box: lost context?
 849          */
 850         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT)
 851                 i830_fill_box(dev, 28, 4, 8, 8, 0, 0, 255);
 852
 853         /* Yellow box for texture swaps
 854          */
 855         if (dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD)
 856                 i830_fill_box(dev, 40, 4, 8, 8, 255, 255, 0);
 857
 858         /* Green box if hardware never idles (as far as we can tell)
 859          */
 860         if (!(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY))
 861                 i830_fill_box(dev, 64, 4, 8, 8, 0, 255, 0);
 862
 863         /* Draw bars indicating number of buffers allocated
 864          * (not a great measure, easily confused)
 865          */
 866         if (dev_priv->dma_used) {
 867                 int bar = dev_priv->dma_used / 10240;
 868                 if (bar > 100)
 869                         bar = 100;
 870                 if (bar < 1)
 871                         bar = 1;
 872                 i830_fill_box(dev, 4, 16, bar, 4, 196, 128, 128);
 873                 dev_priv->dma_used = 0;
 874         }
 875
 876         dev_priv->sarea_priv->perf_boxes = 0;
 877 }
 878
 879 static void i830_dma_dispatch_clear(struct drm_device * dev, int flags,
 880                                     unsigned int clear_color,
 881                                     unsigned int clear_zval,
 882                                     unsigned int clear_depthmask)
 883 {
 884         drm_i830_private_t *dev_priv = dev->dev_private;
 885         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 886         int nbox = sarea_priv->nbox;
 887         struct drm_clip_rect *pbox = sarea_priv->boxes;
 888         int pitch = dev_priv->pitch;
 889         int cpp = dev_priv->cpp;
 890         int i;
 891         unsigned int BR13, CMD, D_CMD;
 892         RING_LOCALS;
 893
 894         if (dev_priv->current_page == 1) {
 895                 unsigned int tmp = flags;
 896
 897                 flags &= ~(I830_FRONT | I830_BACK);
 898                 if (tmp & I830_FRONT)
 899                         flags |= I830_BACK;
 900                 if (tmp & I830_BACK)
 901                         flags |= I830_FRONT;
 902         }
 903
 904         i830_kernel_lost_context(dev);
 905
 906         switch (cpp) {
 907         case 2:
 908                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
 909                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 910                 break;
 911         case 4:
 912                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
 913                 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
 914                        XY_COLOR_BLT_WRITE_RGB);
 915                 D_CMD = XY_COLOR_BLT_CMD;
 916                 if (clear_depthmask & 0x00ffffff)
 917                         D_CMD |= XY_COLOR_BLT_WRITE_RGB;
 918                 if (clear_depthmask & 0xff000000)
 919                         D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
 920                 break;
 921         default:
 922                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
 923                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 924                 break;
 925         }
 926
 927         if (nbox > I830_NR_SAREA_CLIPRECTS)
 928                 nbox = I830_NR_SAREA_CLIPRECTS;
 929
 930         for (i = 0; i < nbox; i++, pbox++) {
 931                 if (pbox->x1 > pbox->x2 ||
 932                     pbox->y1 > pbox->y2 ||
 933                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
 934                         continue;
 935
 936                 if (flags & I830_FRONT) {
 937                         DRM_DEBUG("clear front\n");
 938                         BEGIN_LP_RING(6);
 939                         OUT_RING(CMD);
 940                         OUT_RING(BR13);
 941                         OUT_RING((pbox->y1 << 16) | pbox->x1);
 942                         OUT_RING((pbox->y2 << 16) | pbox->x2);
 943                         OUT_RING(dev_priv->front_offset);
 944                         OUT_RING(clear_color);
 945                         ADVANCE_LP_RING();
 946                 }
 947
 948                 if (flags & I830_BACK) {
 949                         DRM_DEBUG("clear back\n");
 950                         BEGIN_LP_RING(6);
 951                         OUT_RING(CMD);
 952                         OUT_RING(BR13);
 953                         OUT_RING((pbox->y1 << 16) | pbox->x1);
 954                         OUT_RING((pbox->y2 << 16) | pbox->x2);
 955                         OUT_RING(dev_priv->back_offset);
 956                         OUT_RING(clear_color);
 957                         ADVANCE_LP_RING();
 958                 }
 959
 960                 if (flags & I830_DEPTH) {
 961                         DRM_DEBUG("clear depth\n");
 962                         BEGIN_LP_RING(6);
 963                         OUT_RING(D_CMD);
 964                         OUT_RING(BR13);
 965                         OUT_RING((pbox->y1 << 16) | pbox->x1);
 966                         OUT_RING((pbox->y2 << 16) | pbox->x2);
 967                         OUT_RING(dev_priv->depth_offset);
 968                         OUT_RING(clear_zval);
 969                         ADVANCE_LP_RING();
 970                 }
 971         }
 972 }
 973
 974 static void i830_dma_dispatch_swap(struct drm_device * dev)
 975 {
 976         drm_i830_private_t *dev_priv = dev->dev_private;
 977         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 978         int nbox = sarea_priv->nbox;
 979         struct drm_clip_rect *pbox = sarea_priv->boxes;
 980         int pitch = dev_priv->pitch;
 981         int cpp = dev_priv->cpp;
 982         int i;
 983         unsigned int CMD, BR13;
 984         RING_LOCALS;
 985
 986         DRM_DEBUG("swapbuffers\n");
 987
 988         i830_kernel_lost_context(dev);
 989
 990         if (dev_priv->do_boxes)
 991                 i830_cp_performance_boxes(dev);
 992
 993         switch (cpp) {
 994         case 2:
 995                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
 996                 CMD = XY_SRC_COPY_BLT_CMD;
 997                 break;
 998         case 4:
 999                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
1000                 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
1001                        XY_SRC_COPY_BLT_WRITE_RGB);
1002                 break;
1003         default:
1004                 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
1005                 CMD = XY_SRC_COPY_BLT_CMD;
1006                 break;
1007         }
1008
1009         if (nbox > I830_NR_SAREA_CLIPRECTS)
1010                 nbox = I830_NR_SAREA_CLIPRECTS;
1011
1012         for (i = 0; i < nbox; i++, pbox++) {
1013                 if (pbox->x1 > pbox->x2 ||
1014                     pbox->y1 > pbox->y2 ||
1015                     pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1016                         continue;
1017
1018                 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1019                           pbox->x1, pbox->y1, pbox->x2, pbox->y2);
1020
1021                 BEGIN_LP_RING(8);
1022                 OUT_RING(CMD);
1023                 OUT_RING(BR13);
1024                 OUT_RING((pbox->y1 << 16) | pbox->x1);
1025                 OUT_RING((pbox->y2 << 16) | pbox->x2);
1026
1027                 if (dev_priv->current_page == 0)
1028                         OUT_RING(dev_priv->front_offset);
1029                 else
1030                         OUT_RING(dev_priv->back_offset);
1031
1032                 OUT_RING((pbox->y1 << 16) | pbox->x1);
1033                 OUT_RING(BR13 & 0xffff);
1034
1035                 if (dev_priv->current_page == 0)
1036                         OUT_RING(dev_priv->back_offset);
1037                 else
1038                         OUT_RING(dev_priv->front_offset);
1039
1040                 ADVANCE_LP_RING();
1041         }
1042 }
1043
1044 static void i830_dma_dispatch_flip(struct drm_device * dev)
1045 {
1046         drm_i830_private_t *dev_priv = dev->dev_private;
1047         RING_LOCALS;
1048
1049         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
1050                   __FUNCTION__,
1051                   dev_priv->current_page,
1052                   dev_priv->sarea_priv->pf_current_page);
1053
1054         i830_kernel_lost_context(dev);
1055
1056         if (dev_priv->do_boxes) {
1057                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1058                 i830_cp_performance_boxes(dev);
1059         }
1060
1061         BEGIN_LP_RING(2);
1062         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1063         OUT_RING(0);
1064         ADVANCE_LP_RING();
1065
1066         BEGIN_LP_RING(6);
1067         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
1068         OUT_RING(0);
1069         if (dev_priv->current_page == 0) {
1070                 OUT_RING(dev_priv->back_offset);
1071                 dev_priv->current_page = 1;
1072         } else {
1073                 OUT_RING(dev_priv->front_offset);
1074                 dev_priv->current_page = 0;
1075         }
1076         OUT_RING(0);
1077         ADVANCE_LP_RING();
1078
1079         BEGIN_LP_RING(2);
1080         OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
1081         OUT_RING(0);
1082         ADVANCE_LP_RING();
1083
1084         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1085 }
1086
1087 static void i830_dma_dispatch_vertex(struct drm_device * dev,
1088                                      struct drm_buf * buf, int discard, int used)
1089 {
1090         drm_i830_private_t *dev_priv = dev->dev_private;
1091         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1092         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1093         struct drm_clip_rect *box = sarea_priv->boxes;
1094         int nbox = sarea_priv->nbox;
1095         unsigned long address = (unsigned long)buf->bus_address;
1096         unsigned long start = address - dev->agp->base;
1097         int i = 0, u;
1098         RING_LOCALS;
1099
1100         i830_kernel_lost_context(dev);
1101
1102         if (nbox > I830_NR_SAREA_CLIPRECTS)
1103                 nbox = I830_NR_SAREA_CLIPRECTS;
1104
1105         if (discard) {
1106                 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1107                             I830_BUF_HARDWARE);
1108                 if (u != I830_BUF_CLIENT) {
1109                         DRM_DEBUG("xxxx 2\n");
1110                 }
1111         }
1112
1113         if (used > 4 * 1023)
1114                 used = 0;
1115
1116         if (sarea_priv->dirty)
1117                 i830EmitState(dev);
1118
1119         DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1120                   address, used, nbox);
1121
1122         dev_priv->counter++;
1123         DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1124         DRM_DEBUG("i830_dma_dispatch\n");
1125         DRM_DEBUG("start : %lx\n", start);
1126         DRM_DEBUG("used : %d\n", used);
1127         DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1128
1129         if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1130                 u32 *vp = buf_priv->kernel_virtual;
1131
1132                 vp[0] = (GFX_OP_PRIMITIVE |
1133                          sarea_priv->vertex_prim | ((used / 4) - 2));
1134
1135                 if (dev_priv->use_mi_batchbuffer_start) {
1136                         vp[used / 4] = MI_BATCH_BUFFER_END;
1137                         used += 4;
1138                 }
1139
1140                 if (used & 4) {
1141                         vp[used / 4] = 0;
1142                         used += 4;
1143                 }
1144
1145                 i830_unmap_buffer(buf);
1146         }
1147
1148         if (used) {
1149                 do {
1150                         if (i < nbox) {
1151                                 BEGIN_LP_RING(6);
1152                                 OUT_RING(GFX_OP_DRAWRECT_INFO);
1153                                 OUT_RING(sarea_priv->
1154                                          BufferState[I830_DESTREG_DR1]);
1155                                 OUT_RING(box[i].x1 | (box[i].y1 << 16));
1156                                 OUT_RING(box[i].x2 | (box[i].y2 << 16));
1157                                 OUT_RING(sarea_priv->
1158                                          BufferState[I830_DESTREG_DR4]);
1159                                 OUT_RING(0);
1160                                 ADVANCE_LP_RING();
1161                         }
1162
1163                         if (dev_priv->use_mi_batchbuffer_start) {
1164                                 BEGIN_LP_RING(2);
1165                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
1166                                 OUT_RING(start | MI_BATCH_NON_SECURE);
1167                                 ADVANCE_LP_RING();
1168                         } else {
1169                                 BEGIN_LP_RING(4);
1170                                 OUT_RING(MI_BATCH_BUFFER);
1171                                 OUT_RING(start | MI_BATCH_NON_SECURE);
1172                                 OUT_RING(start + used - 4);
1173                                 OUT_RING(0);
1174                                 ADVANCE_LP_RING();
1175                         }
1176
1177                 } while (++i < nbox);
1178         }
1179
1180         if (discard) {
1181                 dev_priv->counter++;
1182
1183                 (void)cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1184                               I830_BUF_HARDWARE);
1185
1186                 BEGIN_LP_RING(8);
1187                 OUT_RING(CMD_STORE_DWORD_IDX);
1188                 OUT_RING(20);
1189                 OUT_RING(dev_priv->counter);
1190                 OUT_RING(CMD_STORE_DWORD_IDX);
1191                 OUT_RING(buf_priv->my_use_idx);
1192                 OUT_RING(I830_BUF_FREE);
1193                 OUT_RING(CMD_REPORT_HEAD);
1194                 OUT_RING(0);
1195                 ADVANCE_LP_RING();
1196         }
1197 }
1198
1199 static void i830_dma_quiescent(struct drm_device * dev)
1200 {
1201         drm_i830_private_t *dev_priv = dev->dev_private;
1202         RING_LOCALS;
1203
1204         i830_kernel_lost_context(dev);
1205
1206         BEGIN_LP_RING(4);
1207         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1208         OUT_RING(CMD_REPORT_HEAD);
1209         OUT_RING(0);
1210         OUT_RING(0);
1211         ADVANCE_LP_RING();
1212
1213         i830_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
1214 }
1215
1216 static int i830_flush_queue(struct drm_device * dev)
1217 {
1218         drm_i830_private_t *dev_priv = dev->dev_private;
1219         struct drm_device_dma *dma = dev->dma;
1220         int i, ret = 0;
1221         RING_LOCALS;
1222
1223         i830_kernel_lost_context(dev);
1224
1225         BEGIN_LP_RING(2);
1226         OUT_RING(CMD_REPORT_HEAD);
1227         OUT_RING(0);
1228         ADVANCE_LP_RING();
1229
1230         i830_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
1231
1232         for (i = 0; i < dma->buf_count; i++) {
1233                 struct drm_buf *buf = dma->buflist[i];
1234                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1235
1236                 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1237                                    I830_BUF_FREE);
1238
1239                 if (used == I830_BUF_HARDWARE)
1240                         DRM_DEBUG("reclaimed from HARDWARE\n");
1241                 if (used == I830_BUF_CLIENT)
1242                         DRM_DEBUG("still on client\n");
1243         }
1244
1245         return ret;
1246 }
1247
1248 /* Must be called with the lock held */
1249 static void i830_reclaim_buffers(struct drm_device * dev, struct drm_file *file_priv)
1250 {
1251         struct drm_device_dma *dma = dev->dma;
1252         int i;
1253
1254         if (!dma)
1255                 return;
1256         if (!dev->dev_private)
1257                 return;
1258         if (!dma->buflist)
1259                 return;
1260
1261         i830_flush_queue(dev);
1262
1263         for (i = 0; i < dma->buf_count; i++) {
1264                 struct drm_buf *buf = dma->buflist[i];
1265                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1266
1267                 if (buf->file_priv == file_priv && buf_priv) {
1268                         int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1269                                            I830_BUF_FREE);
1270
1271                         if (used == I830_BUF_CLIENT)
1272                                 DRM_DEBUG("reclaimed from client\n");
1273                         if (buf_priv->currently_mapped == I830_BUF_MAPPED)
1274                                 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1275                 }
1276         }
1277 }
1278
1279 static int i830_flush_ioctl(struct inode *inode, struct drm_file *file_priv,
1280                             unsigned int cmd, unsigned long arg)
1281 {
1282         struct drm_device *dev = file_priv->head->dev;
1283
1284         LOCK_TEST_WITH_RETURN(dev, file_priv);
1285
1286         i830_flush_queue(dev);
1287         return 0;
1288 }
1289
1290 static int i830_dma_vertex(struct inode *inode, struct drm_file *file_priv,
1291                            unsigned int cmd, unsigned long arg)
1292 {
1293         struct drm_device *dev = file_priv->head->dev;
1294         struct drm_device_dma *dma = dev->dma;
1295         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1296         u32 *hw_status = dev_priv->hw_status_page;
1297         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1298             dev_priv->sarea_priv;
1299         drm_i830_vertex_t vertex;
1300
1301         if (copy_from_user
1302             (&vertex, (drm_i830_vertex_t __user *) arg, sizeof(vertex)))
1303                 return -EFAULT;
1304
1305         LOCK_TEST_WITH_RETURN(dev, file_priv);
1306
1307         DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1308                   vertex.idx, vertex.used, vertex.discard);
1309
1310         if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1311                 return -EINVAL;
1312
1313         i830_dma_dispatch_vertex(dev,
1314                                  dma->buflist[vertex.idx],
1315                                  vertex.discard, vertex.used);
1316
1317         sarea_priv->last_enqueue = dev_priv->counter - 1;
1318         sarea_priv->last_dispatch = (int)hw_status[5];
1319
1320         return 0;
1321 }
1322
1323 static int i830_clear_bufs(struct inode *inode, struct drm_file *file_priv,
1324                            unsigned int cmd, unsigned long arg)
1325 {
1326         struct drm_device *dev = file_priv->head->dev;
1327         drm_i830_clear_t clear;
1328
1329         if (copy_from_user
1330             (&clear, (drm_i830_clear_t __user *) arg, sizeof(clear)))
1331                 return -EFAULT;
1332
1333         LOCK_TEST_WITH_RETURN(dev, file_priv);
1334
1335         /* GH: Someone's doing nasty things... */
1336         if (!dev->dev_private) {
1337                 return -EINVAL;
1338         }
1339
1340         i830_dma_dispatch_clear(dev, clear.flags,
1341                                 clear.clear_color,
1342                                 clear.clear_depth, clear.clear_depthmask);
1343         return 0;
1344 }
1345
1346 static int i830_swap_bufs(struct inode *inode, struct drm_file *file_priv,
1347                           unsigned int cmd, unsigned long arg)
1348 {
1349         struct drm_device *dev = file_priv->head->dev;
1350
1351         DRM_DEBUG("i830_swap_bufs\n");
1352
1353         LOCK_TEST_WITH_RETURN(dev, file_priv);
1354
1355         i830_dma_dispatch_swap(dev);
1356         return 0;
1357 }
1358
1359 /* Not sure why this isn't set all the time:
1360  */
1361 static void i830_do_init_pageflip(struct drm_device * dev)
1362 {
1363         drm_i830_private_t *dev_priv = dev->dev_private;
1364
1365         DRM_DEBUG("%s\n", __FUNCTION__);
1366         dev_priv->page_flipping = 1;
1367         dev_priv->current_page = 0;
1368         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1369 }
1370
1371 static int i830_do_cleanup_pageflip(struct drm_device * dev)
1372 {
1373         drm_i830_private_t *dev_priv = dev->dev_private;
1374
1375         DRM_DEBUG("%s\n", __FUNCTION__);
1376         if (dev_priv->current_page != 0)
1377                 i830_dma_dispatch_flip(dev);
1378
1379         dev_priv->page_flipping = 0;
1380         return 0;
1381 }
1382
1383 static int i830_flip_bufs(struct inode *inode, struct drm_file *file_priv,
1384                           unsigned int cmd, unsigned long arg)
1385 {
1386         struct drm_device *dev = file_priv->head->dev;
1387         drm_i830_private_t *dev_priv = dev->dev_private;
1388
1389         DRM_DEBUG("%s\n", __FUNCTION__);
1390
1391         LOCK_TEST_WITH_RETURN(dev, file_priv);
1392
1393         if (!dev_priv->page_flipping)
1394                 i830_do_init_pageflip(dev);
1395
1396         i830_dma_dispatch_flip(dev);
1397         return 0;
1398 }
1399
1400 static int i830_getage(struct inode *inode, struct drm_file *file_priv, unsigned int cmd,
1401                        unsigned long arg)
1402 {
1403         struct drm_device *dev = file_priv->head->dev;
1404         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1405         u32 *hw_status = dev_priv->hw_status_page;
1406         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1407             dev_priv->sarea_priv;
1408
1409         sarea_priv->last_dispatch = (int)hw_status[5];
1410         return 0;
1411 }
1412
1413 static int i830_getbuf(struct inode *inode, struct drm_file *file_priv,
1414                        unsigned int cmd, unsigned long arg)
1415 {
1416         struct drm_device *dev = file_priv->head->dev;
1417         int retcode = 0;
1418         drm_i830_dma_t d;
1419         drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1420         u32 *hw_status = dev_priv->hw_status_page;
1421         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1422             dev_priv->sarea_priv;
1423
1424         DRM_DEBUG("getbuf\n");
1425         if (copy_from_user(&d, (drm_i830_dma_t __user *) arg, sizeof(d)))
1426                 return -EFAULT;
1427
1428         LOCK_TEST_WITH_RETURN(dev, file_priv);
1429
1430         d.granted = 0;
1431
1432         retcode = i830_dma_get_buffer(dev, &d, file_priv);
1433
1434         DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1435                   current->pid, retcode, d.granted);
1436
1437         if (copy_to_user((void __user *) arg, &d, sizeof(d)))
1438                 return -EFAULT;
1439         sarea_priv->last_dispatch = (int)hw_status[5];
1440
1441         return retcode;
1442 }
1443
1444 static int i830_copybuf(struct inode *inode,
1445                         struct drm_file *file_priv, unsigned int cmd, unsigned long arg)
1446 {
1447         /* Never copy - 2.4.x doesn't need it */
1448         return 0;
1449 }
1450
1451 static int i830_docopy(struct inode *inode, struct drm_file *file_priv, unsigned int cmd,
1452                        unsigned long arg)
1453 {
1454         return 0;
1455 }
1456
1457 static int i830_getparam(struct inode *inode, struct drm_file *file_priv,
1458                          unsigned int cmd, unsigned long arg)
1459 {
1460         struct drm_device *dev = file_priv->head->dev;
1461         drm_i830_private_t *dev_priv = dev->dev_private;
1462         drm_i830_getparam_t param;
1463         int value;
1464
1465         if (!dev_priv) {
1466                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1467                 return -EINVAL;
1468         }
1469
1470         if (copy_from_user
1471             (&param, (drm_i830_getparam_t __user *) arg, sizeof(param)))
1472                 return -EFAULT;
1473
1474         switch (param.param) {
1475         case I830_PARAM_IRQ_ACTIVE:
1476                 value = dev->irq_enabled;
1477                 break;
1478         default:
1479                 return -EINVAL;
1480         }
1481
1482         if (copy_to_user(param.value, &value, sizeof(int))) {
1483                 DRM_ERROR("copy_to_user\n");
1484                 return -EFAULT;
1485         }
1486
1487         return 0;
1488 }
1489
1490 static int i830_setparam(struct inode *inode, struct drm_file *file_priv,
1491                          unsigned int cmd, unsigned long arg)
1492 {
1493         struct drm_device *dev = file_priv->head->dev;
1494         drm_i830_private_t *dev_priv = dev->dev_private;
1495         drm_i830_setparam_t param;
1496
1497         if (!dev_priv) {
1498                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1499                 return -EINVAL;
1500         }
1501
1502         if (copy_from_user
1503             (&param, (drm_i830_setparam_t __user *) arg, sizeof(param)))
1504                 return -EFAULT;
1505
1506         switch (param.param) {
1507         case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1508                 dev_priv->use_mi_batchbuffer_start = param.value;
1509                 break;
1510         default:
1511                 return -EINVAL;
1512         }
1513
1514         return 0;
1515 }
1516
1517 int i830_driver_load(struct drm_device *dev, unsigned long flags)
1518 {
1519         /* i830 has 4 more counters */
1520         dev->counters += 4;
1521         dev->types[6] = _DRM_STAT_IRQ;
1522         dev->types[7] = _DRM_STAT_PRIMARY;
1523         dev->types[8] = _DRM_STAT_SECONDARY;
1524         dev->types[9] = _DRM_STAT_DMA;
1525
1526         return 0;
1527 }
1528
1529 void i830_driver_lastclose(struct drm_device * dev)
1530 {
1531         i830_dma_cleanup(dev);
1532 }
1533
1534 void i830_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1535 {
1536         if (dev->dev_private) {
1537                 drm_i830_private_t *dev_priv = dev->dev_private;
1538                 if (dev_priv->page_flipping) {
1539                         i830_do_cleanup_pageflip(dev);
1540                 }
1541         }
1542 }
1543
1544 void i830_driver_reclaim_buffers_locked(struct drm_device * dev, struct drm_file *file_priv)
1545 {
1546         i830_reclaim_buffers(dev, file_priv);
1547 }
1548
1549 int i830_driver_dma_quiescent(struct drm_device * dev)
1550 {
1551         i830_dma_quiescent(dev);
1552         return 0;
1553 }
1554
1555 drm_ioctl_desc_t i830_ioctls[] = {
1556         [DRM_IOCTL_NR(DRM_I830_INIT)] = {i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
1557         [DRM_IOCTL_NR(DRM_I830_VERTEX)] = {i830_dma_vertex, DRM_AUTH},
1558         [DRM_IOCTL_NR(DRM_I830_CLEAR)] = {i830_clear_bufs, DRM_AUTH},
1559         [DRM_IOCTL_NR(DRM_I830_FLUSH)] = {i830_flush_ioctl, DRM_AUTH},
1560         [DRM_IOCTL_NR(DRM_I830_GETAGE)] = {i830_getage, DRM_AUTH},
1561         [DRM_IOCTL_NR(DRM_I830_GETBUF)] = {i830_getbuf, DRM_AUTH},
1562         [DRM_IOCTL_NR(DRM_I830_SWAP)] = {i830_swap_bufs, DRM_AUTH},
1563         [DRM_IOCTL_NR(DRM_I830_COPY)] = {i830_copybuf, DRM_AUTH},
1564         [DRM_IOCTL_NR(DRM_I830_DOCOPY)] = {i830_docopy, DRM_AUTH},
1565         [DRM_IOCTL_NR(DRM_I830_FLIP)] = {i830_flip_bufs, DRM_AUTH},
1566         [DRM_IOCTL_NR(DRM_I830_IRQ_EMIT)] = {i830_irq_emit, DRM_AUTH},
1567         [DRM_IOCTL_NR(DRM_I830_IRQ_WAIT)] = {i830_irq_wait, DRM_AUTH},
1568         [DRM_IOCTL_NR(DRM_I830_GETPARAM)] = {i830_getparam, DRM_AUTH},
1569         [DRM_IOCTL_NR(DRM_I830_SETPARAM)] = {i830_setparam, DRM_AUTH}
1570 };
1571
1572 int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
1573
1574 /**
1575  * Determine if the device really is AGP or not.
1576  *
1577  * All Intel graphics chipsets are treated as AGP, even if they are really
1578  * PCI-e.
1579  *
1580  * \param dev   The device to be tested.
1581  *
1582  * \returns
1583  * A value of 1 is always retured to indictate every i8xx is AGP.
1584  */
1585 int i830_driver_device_is_agp(struct drm_device * dev)
1586 {
1587         return 1;
1588 }