]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blob - drivers/char/drm/drm_os_linux.h
drm: Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
[linux-2.6-omap-h63xx.git] / drivers / char / drm / drm_os_linux.h
1 /**
2  * \file drm_os_linux.h
3  * OS abstraction macros.
4  */
5
6 #include <linux/interrupt.h>    /* For task queue support */
7 #include <linux/delay.h>
8
9 /** Current process ID */
10 #define DRM_CURRENTPID                  current->pid
11 #define DRM_SUSER(p)                    capable(CAP_SYS_ADMIN)
12 #define DRM_UDELAY(d)                   udelay(d)
13 /** Read a byte from a MMIO region */
14 #define DRM_READ8(map, offset)          readb(((void __iomem *)(map)->handle) + (offset))
15 /** Read a word from a MMIO region */
16 #define DRM_READ16(map, offset)         readw(((void __iomem *)(map)->handle) + (offset))
17 /** Read a dword from a MMIO region */
18 #define DRM_READ32(map, offset)         readl(((void __iomem *)(map)->handle) + (offset))
19 /** Write a byte into a MMIO region */
20 #define DRM_WRITE8(map, offset, val)    writeb(val, ((void __iomem *)(map)->handle) + (offset))
21 /** Write a word into a MMIO region */
22 #define DRM_WRITE16(map, offset, val)   writew(val, ((void __iomem *)(map)->handle) + (offset))
23 /** Write a dword into a MMIO region */
24 #define DRM_WRITE32(map, offset, val)   writel(val, ((void __iomem *)(map)->handle) + (offset))
25 /** Read memory barrier */
26 #define DRM_READMEMORYBARRIER()         rmb()
27 /** Write memory barrier */
28 #define DRM_WRITEMEMORYBARRIER()        wmb()
29 /** Read/write memory barrier */
30 #define DRM_MEMORYBARRIER()             mb()
31
32 /** IRQ handler arguments and return type and values */
33 #define DRM_IRQ_ARGS            int irq, void *arg
34
35 /** AGP types */
36 #if __OS_HAS_AGP
37 #define DRM_AGP_MEM             struct agp_memory
38 #define DRM_AGP_KERN            struct agp_kern_info
39 #else
40 /* define some dummy types for non AGP supporting kernels */
41 struct no_agp_kern {
42         unsigned long aper_base;
43         unsigned long aper_size;
44 };
45 #define DRM_AGP_MEM             int
46 #define DRM_AGP_KERN            struct no_agp_kern
47 #endif
48
49 #if !(__OS_HAS_MTRR)
50 static __inline__ int mtrr_add(unsigned long base, unsigned long size,
51                                unsigned int type, char increment)
52 {
53         return -ENODEV;
54 }
55
56 static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size)
57 {
58         return -ENODEV;
59 }
60
61 #define MTRR_TYPE_WRCOMB     1
62
63 #endif
64
65 /** For data going into the kernel through the ioctl argument */
66 #define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3)      \
67         if ( copy_from_user(&arg1, arg2, arg3) )        \
68                 return -EFAULT
69 /** For data going from the kernel through the ioctl argument */
70 #define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3)        \
71         if ( copy_to_user(arg1, &arg2, arg3) )          \
72                 return -EFAULT
73 /** Other copying of data to kernel space */
74 #define DRM_COPY_FROM_USER(arg1, arg2, arg3)            \
75         copy_from_user(arg1, arg2, arg3)
76 /** Other copying of data from kernel space */
77 #define DRM_COPY_TO_USER(arg1, arg2, arg3)              \
78         copy_to_user(arg1, arg2, arg3)
79 /* Macros for copyfrom user, but checking readability only once */
80 #define DRM_VERIFYAREA_READ( uaddr, size )              \
81         (access_ok( VERIFY_READ, uaddr, size ) ? 0 : -EFAULT)
82 #define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3)  \
83         __copy_from_user(arg1, arg2, arg3)
84 #define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3)    \
85         __copy_to_user(arg1, arg2, arg3)
86 #define DRM_GET_USER_UNCHECKED(val, uaddr)              \
87         __get_user(val, uaddr)
88
89 #define DRM_HZ HZ
90
91 #define DRM_WAIT_ON( ret, queue, timeout, condition )           \
92 do {                                                            \
93         DECLARE_WAITQUEUE(entry, current);                      \
94         unsigned long end = jiffies + (timeout);                \
95         add_wait_queue(&(queue), &entry);                       \
96                                                                 \
97         for (;;) {                                              \
98                 __set_current_state(TASK_INTERRUPTIBLE);        \
99                 if (condition)                                  \
100                         break;                                  \
101                 if (time_after_eq(jiffies, end)) {              \
102                         ret = -EBUSY;                           \
103                         break;                                  \
104                 }                                               \
105                 schedule_timeout((HZ/100 > 1) ? HZ/100 : 1);    \
106                 if (signal_pending(current)) {                  \
107                         ret = -EINTR;                           \
108                         break;                                  \
109                 }                                               \
110         }                                                       \
111         __set_current_state(TASK_RUNNING);                      \
112         remove_wait_queue(&(queue), &entry);                    \
113 } while (0)
114
115 #define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
116 #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )