2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002,2006 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/notifier.h>
28 #include <linux/cpu.h>
29 #include <linux/kallsyms.h>
30 #include <linux/acpi.h>
32 #include <acpi/achware.h> /* for PM timer frequency */
33 #include <acpi/acpi_bus.h>
35 #include <asm/8253pit.h>
36 #include <asm/pgtable.h>
37 #include <asm/vsyscall.h>
38 #include <asm/timex.h>
39 #include <asm/proto.h>
41 #include <asm/sections.h>
42 #include <linux/cpufreq.h>
43 #include <linux/hpet.h>
46 #ifdef CONFIG_CPU_FREQ
47 static void cpufreq_delayed_get(void);
49 extern void i8254_timer_resume(void);
50 extern int using_apic_timer;
52 static char *timename = NULL;
54 DEFINE_SPINLOCK(rtc_lock);
55 EXPORT_SYMBOL(rtc_lock);
56 DEFINE_SPINLOCK(i8253_lock);
58 int nohpet __initdata = 0;
59 static int notsc __initdata = 0;
61 #define USEC_PER_TICK (USEC_PER_SEC / HZ)
62 #define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
63 #define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
65 #define NS_SCALE 10 /* 2^10, carefully chosen */
66 #define US_SCALE 32 /* 2^32, arbitralrily chosen */
68 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
69 EXPORT_SYMBOL(cpu_khz);
70 static unsigned long hpet_period; /* fsecs / HPET clock */
71 unsigned long hpet_tick; /* HPET clocks / interrupt */
72 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
73 unsigned long vxtime_hz = PIT_TICK_RATE;
74 int report_lost_ticks; /* command line option */
75 unsigned long long monotonic_base;
77 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
79 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
80 struct timespec __xtime __section_xtime;
81 struct timezone __sys_tz __section_sys_tz;
84 * do_gettimeoffset() returns microseconds since last timer interrupt was
85 * triggered by hardware. A memory read of HPET is slower than a register read
86 * of TSC, but much more reliable. It's also synchronized to the timer
87 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
88 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
89 * This is not a problem, because jiffies hasn't updated either. They are bound
90 * together by xtime_lock.
93 static inline unsigned int do_gettimeoffset_tsc(void)
97 t = get_cycles_sync();
98 if (t < vxtime.last_tsc)
99 t = vxtime.last_tsc; /* hack */
100 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
104 static inline unsigned int do_gettimeoffset_hpet(void)
106 /* cap counter read to one tick to avoid inconsistencies */
107 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
108 return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
111 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
114 * This version of gettimeofday() has microsecond resolution and better than
115 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
119 void do_gettimeofday(struct timeval *tv)
122 unsigned int sec, usec;
125 seq = read_seqbegin(&xtime_lock);
128 usec = xtime.tv_nsec / NSEC_PER_USEC;
130 /* i386 does some correction here to keep the clock
131 monotonous even when ntpd is fixing drift.
132 But they didn't work for me, there is a non monotonic
133 clock anyways with ntp.
134 I dropped all corrections now until a real solution can
135 be found. Note when you fix it here you need to do the same
136 in arch/x86_64/kernel/vsyscall.c and export all needed
137 variables in vmlinux.lds. -AK */
138 usec += do_gettimeoffset();
140 } while (read_seqretry(&xtime_lock, seq));
142 tv->tv_sec = sec + usec / USEC_PER_SEC;
143 tv->tv_usec = usec % USEC_PER_SEC;
146 EXPORT_SYMBOL(do_gettimeofday);
149 * settimeofday() first undoes the correction that gettimeofday would do
150 * on the time, and then saves it. This is ugly, but has been like this for
154 int do_settimeofday(struct timespec *tv)
156 time_t wtm_sec, sec = tv->tv_sec;
157 long wtm_nsec, nsec = tv->tv_nsec;
159 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
162 write_seqlock_irq(&xtime_lock);
164 nsec -= do_gettimeoffset() * NSEC_PER_USEC;
166 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
167 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
169 set_normalized_timespec(&xtime, sec, nsec);
170 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
174 write_sequnlock_irq(&xtime_lock);
179 EXPORT_SYMBOL(do_settimeofday);
181 unsigned long profile_pc(struct pt_regs *regs)
183 unsigned long pc = instruction_pointer(regs);
185 /* Assume the lock function has either no stack frame or a copy
187 Eflags always has bits 22 and up cleared unlike kernel addresses. */
188 if (!user_mode(regs) && in_lock_functions(pc)) {
189 unsigned long *sp = (unsigned long *)regs->rsp;
197 EXPORT_SYMBOL(profile_pc);
200 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
201 * ms after the second nowtime has started, because when nowtime is written
202 * into the registers of the CMOS clock, it will jump to the next second
203 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
207 static void set_rtc_mmss(unsigned long nowtime)
209 int real_seconds, real_minutes, cmos_minutes;
210 unsigned char control, freq_select;
213 * IRQs are disabled when we're called from the timer interrupt,
214 * no need for spin_lock_irqsave()
217 spin_lock(&rtc_lock);
220 * Tell the clock it's being set and stop it.
223 control = CMOS_READ(RTC_CONTROL);
224 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
226 freq_select = CMOS_READ(RTC_FREQ_SELECT);
227 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
229 cmos_minutes = CMOS_READ(RTC_MINUTES);
230 BCD_TO_BIN(cmos_minutes);
233 * since we're only adjusting minutes and seconds, don't interfere with hour
234 * overflow. This avoids messing with unknown time zones but requires your RTC
235 * not to be off by more than 15 minutes. Since we're calling it only when
236 * our clock is externally synchronized using NTP, this shouldn't be a problem.
239 real_seconds = nowtime % 60;
240 real_minutes = nowtime / 60;
241 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
242 real_minutes += 30; /* correct for half hour time zone */
245 if (abs(real_minutes - cmos_minutes) >= 30) {
246 printk(KERN_WARNING "time.c: can't update CMOS clock "
247 "from %d to %d\n", cmos_minutes, real_minutes);
249 BIN_TO_BCD(real_seconds);
250 BIN_TO_BCD(real_minutes);
251 CMOS_WRITE(real_seconds, RTC_SECONDS);
252 CMOS_WRITE(real_minutes, RTC_MINUTES);
256 * The following flags have to be released exactly in this order, otherwise the
257 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
258 * not reset the oscillator and will not update precisely 500 ms later. You
259 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
260 * believes data sheets anyway ... -- Markus Kuhn
263 CMOS_WRITE(control, RTC_CONTROL);
264 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
266 spin_unlock(&rtc_lock);
270 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
271 * Note: This function is required to return accurate
272 * time even in the absence of multiple timer ticks.
274 static inline unsigned long long cycles_2_ns(unsigned long long cyc);
275 unsigned long long monotonic_clock(void)
278 u32 last_offset, this_offset, offset;
279 unsigned long long base;
281 if (vxtime.mode == VXTIME_HPET) {
283 seq = read_seqbegin(&xtime_lock);
285 last_offset = vxtime.last;
286 base = monotonic_base;
287 this_offset = hpet_readl(HPET_COUNTER);
288 } while (read_seqretry(&xtime_lock, seq));
289 offset = (this_offset - last_offset);
290 offset *= NSEC_PER_TICK / hpet_tick;
293 seq = read_seqbegin(&xtime_lock);
295 last_offset = vxtime.last_tsc;
296 base = monotonic_base;
297 } while (read_seqretry(&xtime_lock, seq));
298 this_offset = get_cycles_sync();
299 offset = cycles_2_ns(this_offset - last_offset);
301 return base + offset;
303 EXPORT_SYMBOL(monotonic_clock);
305 static noinline void handle_lost_ticks(int lost)
307 static long lost_count;
309 if (report_lost_ticks) {
310 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
311 print_symbol("rip %s)\n", get_irq_regs()->rip);
314 if (lost_count == 1000 && !warned) {
315 printk(KERN_WARNING "warning: many lost ticks.\n"
316 KERN_WARNING "Your time source seems to be instable or "
317 "some driver is hogging interupts\n");
318 print_symbol("rip %s\n", get_irq_regs()->rip);
319 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
320 printk(KERN_WARNING "Falling back to HPET\n");
322 vxtime.last = hpet_readl(HPET_T0_CMP) -
325 vxtime.last = hpet_readl(HPET_COUNTER);
326 vxtime.mode = VXTIME_HPET;
327 do_gettimeoffset = do_gettimeoffset_hpet;
329 /* else should fall back to PIT, but code missing. */
334 #ifdef CONFIG_CPU_FREQ
335 /* In some cases the CPU can change frequency without us noticing
336 Give cpufreq a change to catch up. */
337 if ((lost_count+1) % 25 == 0)
338 cpufreq_delayed_get();
342 void main_timer_handler(void)
344 static unsigned long rtc_update = 0;
346 int delay = 0, offset = 0, lost = 0;
349 * Here we are in the timer irq handler. We have irqs locally disabled (so we
350 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
351 * on the other CPU, so we need a lock. We also need to lock the vsyscall
352 * variables, because both do_timer() and us change them -arca+vojtech
355 write_seqlock(&xtime_lock);
357 if (vxtime.hpet_address)
358 offset = hpet_readl(HPET_COUNTER);
360 if (hpet_use_timer) {
361 /* if we're using the hpet timer functionality,
362 * we can more accurately know the counter value
363 * when the timer interrupt occured.
365 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
366 delay = hpet_readl(HPET_COUNTER) - offset;
367 } else if (!pmtmr_ioport) {
368 spin_lock(&i8253_lock);
371 delay |= inb(0x40) << 8;
372 spin_unlock(&i8253_lock);
373 delay = LATCH - 1 - delay;
376 tsc = get_cycles_sync();
378 if (vxtime.mode == VXTIME_HPET) {
379 if (offset - vxtime.last > hpet_tick) {
380 lost = (offset - vxtime.last) / hpet_tick - 1;
384 (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
386 vxtime.last = offset;
387 #ifdef CONFIG_X86_PM_TIMER
388 } else if (vxtime.mode == VXTIME_PMTMR) {
389 lost = pmtimer_mark_offset();
392 offset = (((tsc - vxtime.last_tsc) *
393 vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
398 if (offset > USEC_PER_TICK) {
399 lost = offset / USEC_PER_TICK;
400 offset %= USEC_PER_TICK;
403 monotonic_base += cycles_2_ns(tsc - vxtime.last_tsc);
405 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
407 if ((((tsc - vxtime.last_tsc) *
408 vxtime.tsc_quot) >> US_SCALE) < offset)
409 vxtime.last_tsc = tsc -
410 (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
414 handle_lost_ticks(lost);
419 * Do the timer stuff.
424 update_process_times(user_mode(get_irq_regs()));
428 * In the SMP case we use the local APIC timer interrupt to do the profiling,
429 * except when we simulate SMP mode on a uniprocessor system, in that case we
430 * have to call the local interrupt handler.
433 if (!using_apic_timer)
434 smp_local_timer_interrupt();
437 * If we have an externally synchronized Linux clock, then update CMOS clock
438 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
439 * closest to exactly 500 ms before the next second. If the update fails, we
440 * don't care, as it'll be updated on the next turn, and the problem (time way
441 * off) isn't likely to go away much sooner anyway.
444 if (ntp_synced() && xtime.tv_sec > rtc_update &&
445 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
446 set_rtc_mmss(xtime.tv_sec);
447 rtc_update = xtime.tv_sec + 660;
450 write_sequnlock(&xtime_lock);
453 static irqreturn_t timer_interrupt(int irq, void *dev_id)
455 if (apic_runs_main_timer > 1)
457 main_timer_handler();
458 if (using_apic_timer)
459 smp_send_timer_broadcast_ipi();
463 static unsigned int cyc2ns_scale __read_mostly;
465 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
467 cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
470 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
472 return (cyc * cyc2ns_scale) >> NS_SCALE;
475 unsigned long long sched_clock(void)
480 /* Don't do a HPET read here. Using TSC always is much faster
481 and HPET may not be mapped yet when the scheduler first runs.
482 Disadvantage is a small drift between CPUs in some configurations,
483 but that should be tolerable. */
484 if (__vxtime.mode == VXTIME_HPET)
485 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
488 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
489 which means it is not completely exact and may not be monotonous between
490 CPUs. But the errors should be too small to matter for scheduling
494 return cycles_2_ns(a);
497 static unsigned long get_cmos_time(void)
499 unsigned int year, mon, day, hour, min, sec;
501 unsigned century = 0;
503 spin_lock_irqsave(&rtc_lock, flags);
506 sec = CMOS_READ(RTC_SECONDS);
507 min = CMOS_READ(RTC_MINUTES);
508 hour = CMOS_READ(RTC_HOURS);
509 day = CMOS_READ(RTC_DAY_OF_MONTH);
510 mon = CMOS_READ(RTC_MONTH);
511 year = CMOS_READ(RTC_YEAR);
513 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
514 acpi_gbl_FADT.century)
515 century = CMOS_READ(acpi_gbl_FADT.century);
517 } while (sec != CMOS_READ(RTC_SECONDS));
519 spin_unlock_irqrestore(&rtc_lock, flags);
522 * We know that x86-64 always uses BCD format, no need to check the
535 year += century * 100;
536 printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
539 * x86-64 systems only exists since 2002.
540 * This will work up to Dec 31, 2100
545 return mktime(year, mon, day, hour, min, sec);
548 #ifdef CONFIG_CPU_FREQ
550 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
553 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
554 not that important because current Opteron setups do not support
555 scaling on SMP anyroads.
557 Should fix up last_tsc too. Currently gettimeofday in the
558 first tick after the change will be slightly wrong. */
560 #include <linux/workqueue.h>
562 static unsigned int cpufreq_delayed_issched = 0;
563 static unsigned int cpufreq_init = 0;
564 static struct work_struct cpufreq_delayed_get_work;
566 static void handle_cpufreq_delayed_get(struct work_struct *v)
569 for_each_online_cpu(cpu) {
572 cpufreq_delayed_issched = 0;
575 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
576 * to verify the CPU frequency the timing core thinks the CPU is running
577 * at is still correct.
579 static void cpufreq_delayed_get(void)
582 if (cpufreq_init && !cpufreq_delayed_issched) {
583 cpufreq_delayed_issched = 1;
587 "Losing some ticks... checking if CPU frequency changed.\n");
589 schedule_work(&cpufreq_delayed_get_work);
593 static unsigned int ref_freq = 0;
594 static unsigned long loops_per_jiffy_ref = 0;
596 static unsigned long cpu_khz_ref = 0;
598 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
601 struct cpufreq_freqs *freq = data;
602 unsigned long *lpj, dummy;
604 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
608 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
610 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
612 lpj = &boot_cpu_data.loops_per_jiffy;
616 ref_freq = freq->old;
617 loops_per_jiffy_ref = *lpj;
618 cpu_khz_ref = cpu_khz;
620 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
621 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
622 (val == CPUFREQ_RESUMECHANGE)) {
624 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
626 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
627 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
628 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
631 set_cyc2ns_scale(cpu_khz_ref);
636 static struct notifier_block time_cpufreq_notifier_block = {
637 .notifier_call = time_cpufreq_notifier
640 static int __init cpufreq_tsc(void)
642 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get);
643 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
644 CPUFREQ_TRANSITION_NOTIFIER))
649 core_initcall(cpufreq_tsc);
654 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
655 * it to the HPET timer of known frequency.
658 #define TICK_COUNT 100000000
659 #define TICK_MIN 5000
660 #define MAX_READ_RETRIES 5
663 * Some platforms take periodic SMI interrupts with 5ms duration. Make sure none
664 * occurs between the reads of the hpet & TSC.
666 static void __init read_hpet_tsc(int *hpet, int *tsc)
668 int tsc1, tsc2, hpet1, retries = 0;
672 tsc1 = get_cycles_sync();
673 hpet1 = hpet_readl(HPET_COUNTER);
674 tsc2 = get_cycles_sync();
675 } while (tsc2 - tsc1 > TICK_MIN && retries++ < MAX_READ_RETRIES);
676 if (retries >= MAX_READ_RETRIES && !msg++)
678 "hpet.c: exceeded max retries to read HPET & TSC\n");
684 static unsigned int __init hpet_calibrate_tsc(void)
686 int tsc_start, hpet_start;
687 int tsc_now, hpet_now;
690 local_irq_save(flags);
693 read_hpet_tsc(&hpet_start, &tsc_start);
697 read_hpet_tsc(&hpet_now, &tsc_now);
698 local_irq_restore(flags);
699 } while ((tsc_now - tsc_start) < TICK_COUNT &&
700 (hpet_now - hpet_start) < TICK_COUNT);
702 return (tsc_now - tsc_start) * 1000000000L
703 / ((hpet_now - hpet_start) * hpet_period / 1000);
708 * pit_calibrate_tsc() uses the speaker output (channel 2) of
709 * the PIT. This is better than using the timer interrupt output,
710 * because we can read the value of the speaker with just one inb(),
711 * where we need three i/o operations for the interrupt channel.
712 * We count how many ticks the TSC does in 50 ms.
715 static unsigned int __init pit_calibrate_tsc(void)
717 unsigned long start, end;
720 spin_lock_irqsave(&i8253_lock, flags);
722 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
725 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
726 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
727 start = get_cycles_sync();
728 while ((inb(0x61) & 0x20) == 0);
729 end = get_cycles_sync();
731 spin_unlock_irqrestore(&i8253_lock, flags);
733 return (end - start) / 50;
737 static __init int late_hpet_init(void)
742 if (!vxtime.hpet_address)
745 memset(&hd, 0, sizeof (hd));
747 ntimer = hpet_readl(HPET_ID);
748 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
752 * Register with driver.
753 * Timer0 and Timer1 is used by platform.
755 hd.hd_phys_address = vxtime.hpet_address;
756 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
757 hd.hd_nirqs = ntimer;
758 hd.hd_flags = HPET_DATA_PLATFORM;
759 hpet_reserve_timer(&hd, 0);
760 #ifdef CONFIG_HPET_EMULATE_RTC
761 hpet_reserve_timer(&hd, 1);
763 hd.hd_irq[0] = HPET_LEGACY_8254;
764 hd.hd_irq[1] = HPET_LEGACY_RTC;
767 struct hpet_timer *timer;
770 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
771 timer = &hpet->hpet_timers[2];
772 for (i = 2; i < ntimer; timer++, i++)
773 hd.hd_irq[i] = (timer->hpet_config &
774 Tn_INT_ROUTE_CNF_MASK) >>
775 Tn_INT_ROUTE_CNF_SHIFT;
782 fs_initcall(late_hpet_init);
785 static int hpet_timer_stop_set_go(unsigned long tick)
790 * Stop the timers and reset the main counter.
793 cfg = hpet_readl(HPET_CFG);
794 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
795 hpet_writel(cfg, HPET_CFG);
796 hpet_writel(0, HPET_COUNTER);
797 hpet_writel(0, HPET_COUNTER + 4);
800 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
801 * and period also hpet_tick.
803 if (hpet_use_timer) {
804 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
805 HPET_TN_32BIT, HPET_T0_CFG);
806 hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
807 hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
808 cfg |= HPET_CFG_LEGACY;
814 cfg |= HPET_CFG_ENABLE;
815 hpet_writel(cfg, HPET_CFG);
820 static int hpet_init(void)
824 if (!vxtime.hpet_address)
826 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
827 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
830 * Read the period, compute tick and quotient.
833 id = hpet_readl(HPET_ID);
835 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
838 hpet_period = hpet_readl(HPET_PERIOD);
839 if (hpet_period < 100000 || hpet_period > 100000000)
842 hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
844 hpet_use_timer = (id & HPET_ID_LEGSUP);
846 return hpet_timer_stop_set_go(hpet_tick);
849 static int hpet_reenable(void)
851 return hpet_timer_stop_set_go(hpet_tick);
854 #define PIT_MODE 0x43
857 static void __init __pit_init(int val, u8 mode)
861 spin_lock_irqsave(&i8253_lock, flags);
862 outb_p(mode, PIT_MODE);
863 outb_p(val & 0xff, PIT_CH0); /* LSB */
864 outb_p(val >> 8, PIT_CH0); /* MSB */
865 spin_unlock_irqrestore(&i8253_lock, flags);
868 void __init pit_init(void)
870 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
873 void __init pit_stop_interrupt(void)
875 __pit_init(0, 0x30); /* mode 0 */
878 void __init stop_timer_interrupt(void)
881 if (vxtime.hpet_address) {
883 hpet_timer_stop_set_go(0);
886 pit_stop_interrupt();
888 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
891 int __init time_setup(char *str)
893 report_lost_ticks = 1;
897 static struct irqaction irq0 = {
898 timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
901 void __init time_init(void)
904 vxtime.hpet_address = 0;
906 xtime.tv_sec = get_cmos_time();
909 set_normalized_timespec(&wall_to_monotonic,
910 -xtime.tv_sec, -xtime.tv_nsec);
913 vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
915 vxtime.hpet_address = 0;
917 if (hpet_use_timer) {
918 /* set tick_nsec to use the proper rate for HPET */
919 tick_nsec = TICK_NSEC_HPET;
920 cpu_khz = hpet_calibrate_tsc();
922 #ifdef CONFIG_X86_PM_TIMER
923 } else if (pmtmr_ioport && !vxtime.hpet_address) {
924 vxtime_hz = PM_TIMER_FREQUENCY;
927 cpu_khz = pit_calibrate_tsc();
931 cpu_khz = pit_calibrate_tsc();
935 vxtime.mode = VXTIME_TSC;
936 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
937 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
938 vxtime.last_tsc = get_cycles_sync();
939 set_cyc2ns_scale(cpu_khz);
948 * Make an educated guess if the TSC is trustworthy and synchronized
951 __cpuinit int unsynchronized_tsc(void)
954 if (apic_is_clustered_box())
957 /* Most intel systems have synchronized TSCs except for
958 multi node systems */
959 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
961 /* But TSC doesn't tick in C3 so don't use it there */
962 if (acpi_gbl_FADT.header.length > 0 && acpi_gbl_FADT.C3latency < 1000)
968 /* Assume multi socket systems are not synchronized */
969 return num_present_cpus() > 1;
973 * Decide what mode gettimeofday should use.
975 void time_init_gtod(void)
979 if (unsynchronized_tsc())
982 if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
983 vgetcpu_mode = VGETCPU_RDTSCP;
985 vgetcpu_mode = VGETCPU_LSL;
987 if (vxtime.hpet_address && notsc) {
988 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
990 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
992 vxtime.last = hpet_readl(HPET_COUNTER);
993 vxtime.mode = VXTIME_HPET;
994 do_gettimeoffset = do_gettimeoffset_hpet;
995 #ifdef CONFIG_X86_PM_TIMER
996 /* Using PM for gettimeofday is quite slow, but we have no other
997 choice because the TSC is too unreliable on some systems. */
998 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
1000 do_gettimeoffset = do_gettimeoffset_pm;
1001 vxtime.mode = VXTIME_PMTMR;
1002 sysctl_vsyscall = 0;
1003 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
1006 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
1007 vxtime.mode = VXTIME_TSC;
1010 printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
1011 vxtime_hz / 1000000, vxtime_hz % 1000000, timename, timetype);
1012 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
1013 cpu_khz / 1000, cpu_khz % 1000);
1014 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
1015 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
1016 vxtime.last_tsc = get_cycles_sync();
1018 set_cyc2ns_scale(cpu_khz);
1021 __setup("report_lost_ticks", time_setup);
1023 static long clock_cmos_diff;
1024 static unsigned long sleep_start;
1027 * sysfs support for the timer.
1030 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1033 * Estimate time zone so that set_time can update the clock
1035 long cmos_time = get_cmos_time();
1037 clock_cmos_diff = -cmos_time;
1038 clock_cmos_diff += get_seconds();
1039 sleep_start = cmos_time;
1043 static int timer_resume(struct sys_device *dev)
1045 unsigned long flags;
1047 unsigned long ctime = get_cmos_time();
1048 long sleep_length = (ctime - sleep_start) * HZ;
1050 if (sleep_length < 0) {
1051 printk(KERN_WARNING "Time skew detected in timer resume!\n");
1052 /* The time after the resume must not be earlier than the time
1053 * before the suspend or some nasty things will happen
1056 ctime = sleep_start;
1058 if (vxtime.hpet_address)
1061 i8254_timer_resume();
1063 sec = ctime + clock_cmos_diff;
1064 write_seqlock_irqsave(&xtime_lock,flags);
1067 if (vxtime.mode == VXTIME_HPET) {
1069 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1071 vxtime.last = hpet_readl(HPET_COUNTER);
1072 #ifdef CONFIG_X86_PM_TIMER
1073 } else if (vxtime.mode == VXTIME_PMTMR) {
1077 vxtime.last_tsc = get_cycles_sync();
1078 write_sequnlock_irqrestore(&xtime_lock,flags);
1079 jiffies += sleep_length;
1080 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1081 touch_softlockup_watchdog();
1085 static struct sysdev_class timer_sysclass = {
1086 .resume = timer_resume,
1087 .suspend = timer_suspend,
1088 set_kset_name("timer"),
1091 /* XXX this driverfs stuff should probably go elsewhere later -john */
1092 static struct sys_device device_timer = {
1094 .cls = &timer_sysclass,
1097 static int time_init_device(void)
1099 int error = sysdev_class_register(&timer_sysclass);
1101 error = sysdev_register(&device_timer);
1105 device_initcall(time_init_device);
1107 #ifdef CONFIG_HPET_EMULATE_RTC
1108 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1109 * is enabled, we support RTC interrupt functionality in software.
1110 * RTC has 3 kinds of interrupts:
1111 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1113 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1114 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1115 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1116 * (1) and (2) above are implemented using polling at a frequency of
1117 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1118 * overhead. (DEFAULT_RTC_INT_FREQ)
1119 * For (3), we use interrupts at 64Hz or user specified periodic
1120 * frequency, whichever is higher.
1122 #include <linux/rtc.h>
1124 #define DEFAULT_RTC_INT_FREQ 64
1125 #define RTC_NUM_INTS 1
1127 static unsigned long UIE_on;
1128 static unsigned long prev_update_sec;
1130 static unsigned long AIE_on;
1131 static struct rtc_time alarm_time;
1133 static unsigned long PIE_on;
1134 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1135 static unsigned long PIE_count;
1137 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1138 static unsigned int hpet_t1_cmp; /* cached comparator register */
1140 int is_hpet_enabled(void)
1142 return vxtime.hpet_address != 0;
1146 * Timer 1 for RTC, we do not use periodic interrupt feature,
1147 * even if HPET supports periodic interrupts on Timer 1.
1148 * The reason being, to set up a periodic interrupt in HPET, we need to
1149 * stop the main counter. And if we do that everytime someone diables/enables
1150 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1151 * So, for the time being, simulate the periodic interrupt in software.
1153 * hpet_rtc_timer_init() is called for the first time and during subsequent
1154 * interuppts reinit happens through hpet_rtc_timer_reinit().
1156 int hpet_rtc_timer_init(void)
1158 unsigned int cfg, cnt;
1159 unsigned long flags;
1161 if (!is_hpet_enabled())
1164 * Set the counter 1 and enable the interrupts.
1166 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1167 hpet_rtc_int_freq = PIE_freq;
1169 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1171 local_irq_save(flags);
1173 cnt = hpet_readl(HPET_COUNTER);
1174 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1175 hpet_writel(cnt, HPET_T1_CMP);
1178 cfg = hpet_readl(HPET_T1_CFG);
1179 cfg &= ~HPET_TN_PERIODIC;
1180 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1181 hpet_writel(cfg, HPET_T1_CFG);
1183 local_irq_restore(flags);
1188 static void hpet_rtc_timer_reinit(void)
1190 unsigned int cfg, cnt, ticks_per_int, lost_ints;
1192 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1193 cfg = hpet_readl(HPET_T1_CFG);
1194 cfg &= ~HPET_TN_ENABLE;
1195 hpet_writel(cfg, HPET_T1_CFG);
1199 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1200 hpet_rtc_int_freq = PIE_freq;
1202 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1204 /* It is more accurate to use the comparator value than current count.*/
1205 ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq;
1206 hpet_t1_cmp += ticks_per_int;
1207 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1210 * If the interrupt handler was delayed too long, the write above tries
1211 * to schedule the next interrupt in the past and the hardware would
1212 * not interrupt until the counter had wrapped around.
1213 * So we have to check that the comparator wasn't set to a past time.
1215 cnt = hpet_readl(HPET_COUNTER);
1216 if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) {
1217 lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1;
1218 /* Make sure that, even with the time needed to execute
1219 * this code, the next scheduled interrupt has been moved
1220 * back to the future: */
1223 hpet_t1_cmp += lost_ints * ticks_per_int;
1224 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1227 PIE_count += lost_ints;
1229 printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n",
1235 * The functions below are called from rtc driver.
1236 * Return 0 if HPET is not being used.
1237 * Otherwise do the necessary changes and return 1.
1239 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1241 if (!is_hpet_enabled())
1244 if (bit_mask & RTC_UIE)
1246 if (bit_mask & RTC_PIE)
1248 if (bit_mask & RTC_AIE)
1254 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1256 int timer_init_reqd = 0;
1258 if (!is_hpet_enabled())
1261 if (!(PIE_on | AIE_on | UIE_on))
1262 timer_init_reqd = 1;
1264 if (bit_mask & RTC_UIE) {
1267 if (bit_mask & RTC_PIE) {
1271 if (bit_mask & RTC_AIE) {
1275 if (timer_init_reqd)
1276 hpet_rtc_timer_init();
1281 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1283 if (!is_hpet_enabled())
1286 alarm_time.tm_hour = hrs;
1287 alarm_time.tm_min = min;
1288 alarm_time.tm_sec = sec;
1293 int hpet_set_periodic_freq(unsigned long freq)
1295 if (!is_hpet_enabled())
1304 int hpet_rtc_dropped_irq(void)
1306 if (!is_hpet_enabled())
1312 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1314 struct rtc_time curr_time;
1315 unsigned long rtc_int_flag = 0;
1316 int call_rtc_interrupt = 0;
1318 hpet_rtc_timer_reinit();
1320 if (UIE_on | AIE_on) {
1321 rtc_get_rtc_time(&curr_time);
1324 if (curr_time.tm_sec != prev_update_sec) {
1325 /* Set update int info, call real rtc int routine */
1326 call_rtc_interrupt = 1;
1327 rtc_int_flag = RTC_UF;
1328 prev_update_sec = curr_time.tm_sec;
1333 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1334 /* Set periodic int info, call real rtc int routine */
1335 call_rtc_interrupt = 1;
1336 rtc_int_flag |= RTC_PF;
1341 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1342 (curr_time.tm_min == alarm_time.tm_min) &&
1343 (curr_time.tm_hour == alarm_time.tm_hour)) {
1344 /* Set alarm int info, call real rtc int routine */
1345 call_rtc_interrupt = 1;
1346 rtc_int_flag |= RTC_AF;
1349 if (call_rtc_interrupt) {
1350 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1351 rtc_interrupt(rtc_int_flag, dev_id);
1357 static int __init nohpet_setup(char *s)
1363 __setup("nohpet", nohpet_setup);
1365 int __init notsc_setup(char *s)
1371 __setup("notsc", notsc_setup);